mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-29 15:28:50 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
47
drivers/usb/misc/sisusbvga/Kconfig
Normal file
47
drivers/usb/misc/sisusbvga/Kconfig
Normal file
|
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@ -0,0 +1,47 @@
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config USB_SISUSBVGA
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tristate "USB 2.0 SVGA dongle support (Net2280/SiS315)"
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depends on (USB_MUSB_HDRC || USB_EHCI_HCD)
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select FONT_SUPPORT if USB_SISUSBVGA_CON
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---help---
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Say Y here if you intend to attach a USB2VGA dongle based on a
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||||
Net2280 and a SiS315 chip.
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Note that this device requires a USB 2.0 host controller. It will not
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work with USB 1.x controllers.
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||||
To compile this driver as a module, choose M here; the module will be
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called sisusbvga. If unsure, say N.
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config USB_SISUSBVGA_CON
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bool "Text console and mode switching support" if USB_SISUSBVGA
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depends on VT
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select FONT_8x16
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---help---
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Say Y here if you want a VGA text console via the USB dongle or
|
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want to support userland applications that utilize the driver's
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display mode switching capabilities.
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|
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Note that this console supports VGA/EGA text mode only.
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By default, the console part of the driver will not kick in when
|
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the driver is initialized. If you want the driver to take over
|
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one or more of the consoles, you need to specify the number of
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the first and last consoles (starting at 1) as driver parameters.
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For example, if the driver is compiled as a module:
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modprobe sisusbvga first=1 last=5
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If you use hotplug, add this to your modutils config files with
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the "options" keyword, such as eg.
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options sisusbvga first=1 last=5
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If the driver is compiled into the kernel image, the parameters
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must be given in the kernel command like, such as
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sisusbvga.first=1 sisusbvga.last=5
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7
drivers/usb/misc/sisusbvga/Makefile
Normal file
7
drivers/usb/misc/sisusbvga/Makefile
Normal file
|
|
@ -0,0 +1,7 @@
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#
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# Makefile for the sisusb driver (if driver is inside kernel tree).
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#
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obj-$(CONFIG_USB_SISUSBVGA) += sisusbvga.o
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sisusbvga-y := sisusb.o sisusb_init.o sisusb_con.o
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3289
drivers/usb/misc/sisusbvga/sisusb.c
Normal file
3289
drivers/usb/misc/sisusbvga/sisusb.c
Normal file
File diff suppressed because it is too large
Load diff
311
drivers/usb/misc/sisusbvga/sisusb.h
Normal file
311
drivers/usb/misc/sisusbvga/sisusb.h
Normal file
|
|
@ -0,0 +1,311 @@
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|||
/*
|
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* sisusb - usb kernel driver for Net2280/SiS315 based USB2VGA dongles
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||||
*
|
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* Copyright (C) 2005 by Thomas Winischhofer, Vienna, Austria
|
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*
|
||||
* If distributed as part of the Linux kernel, this code is licensed under the
|
||||
* terms of the GPL v2.
|
||||
*
|
||||
* Otherwise, the following license terms apply:
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1) Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2) Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3) The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Author: Thomas Winischhofer <thomas@winischhofer.net>
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||||
*
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||||
*/
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#ifndef _SISUSB_H_
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#define _SISUSB_H_
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#ifdef CONFIG_COMPAT
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#define SISUSB_NEW_CONFIG_COMPAT
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#endif
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#include <linux/mutex.h>
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/* For older kernels, support for text consoles is by default
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* off. To enable text console support, change the following:
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*/
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/* #define CONFIG_USB_SISUSBVGA_CON */
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/* Version Information */
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#define SISUSB_VERSION 0
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#define SISUSB_REVISION 0
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#define SISUSB_PATCHLEVEL 8
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|
||||
/* Include console and mode switching code? */
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|
||||
#ifdef CONFIG_USB_SISUSBVGA_CON
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#define INCL_SISUSB_CON 1
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#endif
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||||
#include <linux/console.h>
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#include <linux/vt_kern.h>
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#include "sisusb_struct.h"
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/* USB related */
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#define SISUSB_MINOR 133 /* official */
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/* Size of the sisusb input/output buffers */
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#define SISUSB_IBUF_SIZE 0x01000
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#define SISUSB_OBUF_SIZE 0x10000 /* fixed */
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#define NUMOBUFS 8 /* max number of output buffers/output URBs */
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|
||||
/* About endianness:
|
||||
*
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||||
* 1) I/O ports, PCI config registers. The read/write()
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||||
* calls emulate inX/outX. Hence, the data is
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* expected/delivered in machine endiannes by this
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* driver.
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* 2) Video memory. The data is copied 1:1. There is
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* no swapping. Ever. This means for userland that
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* the data has to be prepared properly. (Hint:
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* think graphics data format, command queue,
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* hardware cursor.)
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* 3) MMIO. Data is copied 1:1. MMIO must be swapped
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* properly by userland.
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*
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*/
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#ifdef __BIG_ENDIAN
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#define SISUSB_CORRECT_ENDIANNESS_PACKET(p) \
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do { \
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p->header = cpu_to_le16(p->header); \
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p->address = cpu_to_le32(p->address); \
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p->data = cpu_to_le32(p->data); \
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} while(0)
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#else
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#define SISUSB_CORRECT_ENDIANNESS_PACKET(p)
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#endif
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struct sisusb_usb_data;
|
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|
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struct sisusb_urb_context { /* urb->context for outbound bulk URBs */
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||||
struct sisusb_usb_data *sisusb;
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||||
int urbindex;
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int *actual_length;
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};
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struct sisusb_usb_data {
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struct usb_device *sisusb_dev;
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struct usb_interface *interface;
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struct kref kref;
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wait_queue_head_t wait_q; /* for syncind and timeouts */
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struct mutex lock; /* general race avoidance */
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unsigned int ifnum; /* interface number of the USB device */
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int minor; /* minor (for logging clarity) */
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int isopen; /* !=0 if open */
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int present; /* !=0 if device is present on the bus */
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||||
int ready; /* !=0 if device is ready for userland */
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int numobufs; /* number of obufs = number of out urbs */
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char *obuf[NUMOBUFS], *ibuf; /* transfer buffers */
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int obufsize, ibufsize;
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struct urb *sisurbout[NUMOBUFS];
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struct urb *sisurbin;
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unsigned char urbstatus[NUMOBUFS];
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unsigned char completein;
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struct sisusb_urb_context urbout_context[NUMOBUFS];
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||||
unsigned long flagb0;
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||||
unsigned long vrambase; /* framebuffer base */
|
||||
unsigned int vramsize; /* framebuffer size (bytes) */
|
||||
unsigned long mmiobase;
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||||
unsigned int mmiosize;
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||||
unsigned long ioportbase;
|
||||
unsigned char devinit; /* device initialized? */
|
||||
unsigned char gfxinit; /* graphics core initialized? */
|
||||
unsigned short chipid, chipvendor;
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||||
unsigned short chiprevision;
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||||
#ifdef INCL_SISUSB_CON
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struct SiS_Private *SiS_Pr;
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unsigned long scrbuf;
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unsigned int scrbuf_size;
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int haveconsole, con_first, con_last;
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int havethisconsole[MAX_NR_CONSOLES];
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int textmodedestroyed;
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||||
unsigned int sisusb_num_columns; /* real number, not vt's idea */
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int cur_start_addr, con_rolled_over;
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int sisusb_cursor_loc, bad_cursor_pos;
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int sisusb_cursor_size_from;
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int sisusb_cursor_size_to;
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int current_font_height, current_font_512;
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int font_backup_size, font_backup_height, font_backup_512;
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char *font_backup;
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int font_slot;
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struct vc_data *sisusb_display_fg;
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int is_gfx;
|
||||
int con_blanked;
|
||||
#endif
|
||||
};
|
||||
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#define to_sisusb_dev(d) container_of(d, struct sisusb_usb_data, kref)
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||||
/* USB transport related */
|
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|
||||
/* urbstatus */
|
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#define SU_URB_BUSY 1
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#define SU_URB_ALLOC 2
|
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|
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/* Endpoints */
|
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|
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#define SISUSB_EP_GFX_IN 0x0e /* gfx std packet out(0e)/in(8e) */
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#define SISUSB_EP_GFX_OUT 0x0e
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|
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#define SISUSB_EP_GFX_BULK_OUT 0x01 /* gfx mem bulk out/in */
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#define SISUSB_EP_GFX_BULK_IN 0x02 /* ? 2 is "OUT" ? */
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#define SISUSB_EP_GFX_LBULK_OUT 0x03 /* gfx large mem bulk out */
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#define SISUSB_EP_UNKNOWN_04 0x04 /* ? 4 is "OUT" ? - unused */
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#define SISUSB_EP_BRIDGE_IN 0x0d /* Net2280 out(0d)/in(8d) */
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#define SISUSB_EP_BRIDGE_OUT 0x0d
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|
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#define SISUSB_TYPE_MEM 0
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#define SISUSB_TYPE_IO 1
|
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|
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struct sisusb_packet {
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unsigned short header;
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u32 address;
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u32 data;
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} __attribute__ ((__packed__));
|
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#define CLEARPACKET(packet) memset(packet, 0, 10)
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|
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/* PCI bridge related */
|
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#define SISUSB_PCI_MEMBASE 0xd0000000
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#define SISUSB_PCI_MMIOBASE 0xe4000000
|
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#define SISUSB_PCI_IOPORTBASE 0x0000d000
|
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|
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#define SISUSB_PCI_PSEUDO_MEMBASE 0x10000000
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#define SISUSB_PCI_PSEUDO_MMIOBASE 0x20000000
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#define SISUSB_PCI_PSEUDO_IOPORTBASE 0x0000d000
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#define SISUSB_PCI_PSEUDO_PCIBASE 0x00010000
|
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|
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#define SISUSB_PCI_MMIOSIZE (128*1024)
|
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#define SISUSB_PCI_PCONFSIZE 0x5c
|
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|
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/* graphics core related */
|
||||
|
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#define AROFFSET 0x40
|
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#define ARROFFSET 0x41
|
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#define GROFFSET 0x4e
|
||||
#define SROFFSET 0x44
|
||||
#define CROFFSET 0x54
|
||||
#define MISCROFFSET 0x4c
|
||||
#define MISCWOFFSET 0x42
|
||||
#define INPUTSTATOFFSET 0x5A
|
||||
#define PART1OFFSET 0x04
|
||||
#define PART2OFFSET 0x10
|
||||
#define PART3OFFSET 0x12
|
||||
#define PART4OFFSET 0x14
|
||||
#define PART5OFFSET 0x16
|
||||
#define CAPTUREOFFSET 0x00
|
||||
#define VIDEOOFFSET 0x02
|
||||
#define COLREGOFFSET 0x48
|
||||
#define PELMASKOFFSET 0x46
|
||||
#define VGAENABLE 0x43
|
||||
|
||||
#define SISAR SISUSB_PCI_IOPORTBASE + AROFFSET
|
||||
#define SISARR SISUSB_PCI_IOPORTBASE + ARROFFSET
|
||||
#define SISGR SISUSB_PCI_IOPORTBASE + GROFFSET
|
||||
#define SISSR SISUSB_PCI_IOPORTBASE + SROFFSET
|
||||
#define SISCR SISUSB_PCI_IOPORTBASE + CROFFSET
|
||||
#define SISMISCR SISUSB_PCI_IOPORTBASE + MISCROFFSET
|
||||
#define SISMISCW SISUSB_PCI_IOPORTBASE + MISCWOFFSET
|
||||
#define SISINPSTAT SISUSB_PCI_IOPORTBASE + INPUTSTATOFFSET
|
||||
#define SISPART1 SISUSB_PCI_IOPORTBASE + PART1OFFSET
|
||||
#define SISPART2 SISUSB_PCI_IOPORTBASE + PART2OFFSET
|
||||
#define SISPART3 SISUSB_PCI_IOPORTBASE + PART3OFFSET
|
||||
#define SISPART4 SISUSB_PCI_IOPORTBASE + PART4OFFSET
|
||||
#define SISPART5 SISUSB_PCI_IOPORTBASE + PART5OFFSET
|
||||
#define SISCAP SISUSB_PCI_IOPORTBASE + CAPTUREOFFSET
|
||||
#define SISVID SISUSB_PCI_IOPORTBASE + VIDEOOFFSET
|
||||
#define SISCOLIDXR SISUSB_PCI_IOPORTBASE + COLREGOFFSET - 1
|
||||
#define SISCOLIDX SISUSB_PCI_IOPORTBASE + COLREGOFFSET
|
||||
#define SISCOLDATA SISUSB_PCI_IOPORTBASE + COLREGOFFSET + 1
|
||||
#define SISCOL2IDX SISPART5
|
||||
#define SISCOL2DATA SISPART5 + 1
|
||||
#define SISPEL SISUSB_PCI_IOPORTBASE + PELMASKOFFSET
|
||||
#define SISVGAEN SISUSB_PCI_IOPORTBASE + VGAENABLE
|
||||
#define SISDACA SISCOLIDX
|
||||
#define SISDACD SISCOLDATA
|
||||
|
||||
/* ioctl related */
|
||||
|
||||
/* Structure argument for SISUSB_GET_INFO ioctl */
|
||||
struct sisusb_info {
|
||||
__u32 sisusb_id; /* for identifying sisusb */
|
||||
#define SISUSB_ID 0x53495355 /* Identify myself with 'SISU' */
|
||||
__u8 sisusb_version;
|
||||
__u8 sisusb_revision;
|
||||
__u8 sisusb_patchlevel;
|
||||
__u8 sisusb_gfxinit; /* graphics core initialized? */
|
||||
|
||||
__u32 sisusb_vrambase;
|
||||
__u32 sisusb_mmiobase;
|
||||
__u32 sisusb_iobase;
|
||||
__u32 sisusb_pcibase;
|
||||
|
||||
__u32 sisusb_vramsize; /* framebuffer size in bytes */
|
||||
|
||||
__u32 sisusb_minor;
|
||||
|
||||
__u32 sisusb_fbdevactive; /* != 0 if framebuffer device active */
|
||||
|
||||
__u32 sisusb_conactive; /* != 0 if console driver active */
|
||||
|
||||
__u8 sisusb_reserved[28]; /* for future use */
|
||||
};
|
||||
|
||||
struct sisusb_command {
|
||||
__u8 operation; /* see below */
|
||||
__u8 data0; /* operation dependent */
|
||||
__u8 data1; /* operation dependent */
|
||||
__u8 data2; /* operation dependent */
|
||||
__u32 data3; /* operation dependent */
|
||||
__u32 data4; /* for future use */
|
||||
};
|
||||
|
||||
#define SUCMD_GET 0x01 /* for all: data0 = index, data3 = port */
|
||||
#define SUCMD_SET 0x02 /* data1 = value */
|
||||
#define SUCMD_SETOR 0x03 /* data1 = or */
|
||||
#define SUCMD_SETAND 0x04 /* data1 = and */
|
||||
#define SUCMD_SETANDOR 0x05 /* data1 = and, data2 = or */
|
||||
#define SUCMD_SETMASK 0x06 /* data1 = data, data2 = mask */
|
||||
|
||||
#define SUCMD_CLRSCR 0x07 /* data0:1:2 = length, data3 = address */
|
||||
|
||||
#define SUCMD_HANDLETEXTMODE 0x08 /* Reset/destroy text mode */
|
||||
|
||||
#define SUCMD_SETMODE 0x09 /* Set a display mode (data3 = SiS mode) */
|
||||
#define SUCMD_SETVESAMODE 0x0a /* Set a display mode (data3 = VESA mode) */
|
||||
|
||||
#define SISUSB_COMMAND _IOWR(0xF3,0x3D,struct sisusb_command)
|
||||
#define SISUSB_GET_CONFIG_SIZE _IOR(0xF3,0x3E,__u32)
|
||||
#define SISUSB_GET_CONFIG _IOR(0xF3,0x3F,struct sisusb_info)
|
||||
|
||||
#endif /* SISUSB_H */
|
||||
1568
drivers/usb/misc/sisusbvga/sisusb_con.c
Normal file
1568
drivers/usb/misc/sisusbvga/sisusb_con.c
Normal file
File diff suppressed because it is too large
Load diff
958
drivers/usb/misc/sisusbvga/sisusb_init.c
Normal file
958
drivers/usb/misc/sisusbvga/sisusb_init.c
Normal file
|
|
@ -0,0 +1,958 @@
|
|||
/*
|
||||
* sisusb - usb kernel driver for SiS315(E) based USB2VGA dongles
|
||||
*
|
||||
* Display mode initializing code
|
||||
*
|
||||
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
|
||||
*
|
||||
* If distributed as part of the Linux kernel, this code is licensed under the
|
||||
* terms of the GPL v2.
|
||||
*
|
||||
* Otherwise, the following license terms apply:
|
||||
*
|
||||
* * Redistribution and use in source and binary forms, with or without
|
||||
* * modification, are permitted provided that the following conditions
|
||||
* * are met:
|
||||
* * 1) Redistributions of source code must retain the above copyright
|
||||
* * notice, this list of conditions and the following disclaimer.
|
||||
* * 2) Redistributions in binary form must reproduce the above copyright
|
||||
* * notice, this list of conditions and the following disclaimer in the
|
||||
* * documentation and/or other materials provided with the distribution.
|
||||
* * 3) The name of the author may not be used to endorse or promote products
|
||||
* * derived from this software without specific prior written permission.
|
||||
* *
|
||||
* * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Author: Thomas Winischhofer <thomas@winischhofer.net>
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/poll.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
#include "sisusb.h"
|
||||
|
||||
#ifdef INCL_SISUSB_CON
|
||||
|
||||
#include "sisusb_init.h"
|
||||
|
||||
/*********************************************/
|
||||
/* POINTER INITIALIZATION */
|
||||
/*********************************************/
|
||||
|
||||
static void SiSUSB_InitPtr(struct SiS_Private *SiS_Pr)
|
||||
{
|
||||
SiS_Pr->SiS_ModeResInfo = SiSUSB_ModeResInfo;
|
||||
SiS_Pr->SiS_StandTable = SiSUSB_StandTable;
|
||||
|
||||
SiS_Pr->SiS_SModeIDTable = SiSUSB_SModeIDTable;
|
||||
SiS_Pr->SiS_EModeIDTable = SiSUSB_EModeIDTable;
|
||||
SiS_Pr->SiS_RefIndex = SiSUSB_RefIndex;
|
||||
SiS_Pr->SiS_CRT1Table = SiSUSB_CRT1Table;
|
||||
|
||||
SiS_Pr->SiS_VCLKData = SiSUSB_VCLKData;
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* HELPER: SetReg, GetReg */
|
||||
/*********************************************/
|
||||
|
||||
static void
|
||||
SiS_SetReg(struct SiS_Private *SiS_Pr, unsigned long port,
|
||||
unsigned short index, unsigned short data)
|
||||
{
|
||||
sisusb_setidxreg(SiS_Pr->sisusb, port, index, data);
|
||||
}
|
||||
|
||||
static void
|
||||
SiS_SetRegByte(struct SiS_Private *SiS_Pr, unsigned long port,
|
||||
unsigned short data)
|
||||
{
|
||||
sisusb_setreg(SiS_Pr->sisusb, port, data);
|
||||
}
|
||||
|
||||
static unsigned char
|
||||
SiS_GetReg(struct SiS_Private *SiS_Pr, unsigned long port, unsigned short index)
|
||||
{
|
||||
u8 data;
|
||||
|
||||
sisusb_getidxreg(SiS_Pr->sisusb, port, index, &data);
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
static unsigned char
|
||||
SiS_GetRegByte(struct SiS_Private *SiS_Pr, unsigned long port)
|
||||
{
|
||||
u8 data;
|
||||
|
||||
sisusb_getreg(SiS_Pr->sisusb, port, &data);
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
static void
|
||||
SiS_SetRegANDOR(struct SiS_Private *SiS_Pr, unsigned long port,
|
||||
unsigned short index, unsigned short DataAND,
|
||||
unsigned short DataOR)
|
||||
{
|
||||
sisusb_setidxregandor(SiS_Pr->sisusb, port, index, DataAND, DataOR);
|
||||
}
|
||||
|
||||
static void
|
||||
SiS_SetRegAND(struct SiS_Private *SiS_Pr, unsigned long port,
|
||||
unsigned short index, unsigned short DataAND)
|
||||
{
|
||||
sisusb_setidxregand(SiS_Pr->sisusb, port, index, DataAND);
|
||||
}
|
||||
|
||||
static void
|
||||
SiS_SetRegOR(struct SiS_Private *SiS_Pr, unsigned long port,
|
||||
unsigned short index, unsigned short DataOR)
|
||||
{
|
||||
sisusb_setidxregor(SiS_Pr->sisusb, port, index, DataOR);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* HELPER: DisplayOn, DisplayOff */
|
||||
/*********************************************/
|
||||
|
||||
static void SiS_DisplayOn(struct SiS_Private *SiS_Pr)
|
||||
{
|
||||
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x01, 0xDF);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* HELPER: Init Port Addresses */
|
||||
/*********************************************/
|
||||
|
||||
static void SiSUSBRegInit(struct SiS_Private *SiS_Pr, unsigned long BaseAddr)
|
||||
{
|
||||
SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
|
||||
SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
|
||||
SiS_Pr->SiS_P3c0 = BaseAddr + 0x10;
|
||||
SiS_Pr->SiS_P3ce = BaseAddr + 0x1e;
|
||||
SiS_Pr->SiS_P3c2 = BaseAddr + 0x12;
|
||||
SiS_Pr->SiS_P3ca = BaseAddr + 0x1a;
|
||||
SiS_Pr->SiS_P3c6 = BaseAddr + 0x16;
|
||||
SiS_Pr->SiS_P3c7 = BaseAddr + 0x17;
|
||||
SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
|
||||
SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
|
||||
SiS_Pr->SiS_P3cb = BaseAddr + 0x1b;
|
||||
SiS_Pr->SiS_P3cc = BaseAddr + 0x1c;
|
||||
SiS_Pr->SiS_P3cd = BaseAddr + 0x1d;
|
||||
SiS_Pr->SiS_P3da = BaseAddr + 0x2a;
|
||||
SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* HELPER: GetSysFlags */
|
||||
/*********************************************/
|
||||
|
||||
static void SiS_GetSysFlags(struct SiS_Private *SiS_Pr)
|
||||
{
|
||||
SiS_Pr->SiS_MyCR63 = 0x63;
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* HELPER: Init PCI & Engines */
|
||||
/*********************************************/
|
||||
|
||||
static void SiSInitPCIetc(struct SiS_Private *SiS_Pr)
|
||||
{
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x20, 0xa1);
|
||||
/* - Enable 2D (0x40)
|
||||
* - Enable 3D (0x02)
|
||||
* - Enable 3D vertex command fetch (0x10)
|
||||
* - Enable 3D command parser (0x08)
|
||||
* - Enable 3D G/L transformation engine (0x80)
|
||||
*/
|
||||
SiS_SetRegOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x1E, 0xDA);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* HELPER: SET SEGMENT REGISTERS */
|
||||
/*********************************************/
|
||||
|
||||
static void SiS_SetSegRegLower(struct SiS_Private *SiS_Pr, unsigned short value)
|
||||
{
|
||||
unsigned short temp;
|
||||
|
||||
value &= 0x00ff;
|
||||
temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb) & 0xf0;
|
||||
temp |= (value >> 4);
|
||||
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb, temp);
|
||||
temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd) & 0xf0;
|
||||
temp |= (value & 0x0f);
|
||||
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd, temp);
|
||||
}
|
||||
|
||||
static void SiS_SetSegRegUpper(struct SiS_Private *SiS_Pr, unsigned short value)
|
||||
{
|
||||
unsigned short temp;
|
||||
|
||||
value &= 0x00ff;
|
||||
temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb) & 0x0f;
|
||||
temp |= (value & 0xf0);
|
||||
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cb, temp);
|
||||
temp = SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd) & 0x0f;
|
||||
temp |= (value << 4);
|
||||
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3cd, temp);
|
||||
}
|
||||
|
||||
static void SiS_SetSegmentReg(struct SiS_Private *SiS_Pr, unsigned short value)
|
||||
{
|
||||
SiS_SetSegRegLower(SiS_Pr, value);
|
||||
SiS_SetSegRegUpper(SiS_Pr, value);
|
||||
}
|
||||
|
||||
static void SiS_ResetSegmentReg(struct SiS_Private *SiS_Pr)
|
||||
{
|
||||
SiS_SetSegmentReg(SiS_Pr, 0);
|
||||
}
|
||||
|
||||
static void
|
||||
SiS_SetSegmentRegOver(struct SiS_Private *SiS_Pr, unsigned short value)
|
||||
{
|
||||
unsigned short temp = value >> 8;
|
||||
|
||||
temp &= 0x07;
|
||||
temp |= (temp << 4);
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x1d, temp);
|
||||
SiS_SetSegmentReg(SiS_Pr, value);
|
||||
}
|
||||
|
||||
static void SiS_ResetSegmentRegOver(struct SiS_Private *SiS_Pr)
|
||||
{
|
||||
SiS_SetSegmentRegOver(SiS_Pr, 0);
|
||||
}
|
||||
|
||||
static void SiS_ResetSegmentRegisters(struct SiS_Private *SiS_Pr)
|
||||
{
|
||||
SiS_ResetSegmentReg(SiS_Pr);
|
||||
SiS_ResetSegmentRegOver(SiS_Pr);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* HELPER: SearchModeID */
|
||||
/*********************************************/
|
||||
|
||||
static int
|
||||
SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
|
||||
unsigned short *ModeIdIndex)
|
||||
{
|
||||
if ((*ModeNo) <= 0x13) {
|
||||
|
||||
if ((*ModeNo) != 0x03)
|
||||
return 0;
|
||||
|
||||
(*ModeIdIndex) = 0;
|
||||
|
||||
} else {
|
||||
|
||||
for (*ModeIdIndex = 0;; (*ModeIdIndex)++) {
|
||||
|
||||
if (SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID ==
|
||||
(*ModeNo))
|
||||
break;
|
||||
|
||||
if (SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID ==
|
||||
0xFF)
|
||||
return 0;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* HELPER: ENABLE CRT1 */
|
||||
/*********************************************/
|
||||
|
||||
static void SiS_HandleCRT1(struct SiS_Private *SiS_Pr)
|
||||
{
|
||||
/* Enable CRT1 gating */
|
||||
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3d4, SiS_Pr->SiS_MyCR63, 0xbf);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* HELPER: GetColorDepth */
|
||||
/*********************************************/
|
||||
|
||||
static unsigned short
|
||||
SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
||||
unsigned short ModeIdIndex)
|
||||
{
|
||||
static const unsigned short ColorDepth[6] = { 1, 2, 4, 4, 6, 8 };
|
||||
unsigned short modeflag;
|
||||
short index;
|
||||
|
||||
if (ModeNo <= 0x13) {
|
||||
modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
|
||||
} else {
|
||||
modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
|
||||
}
|
||||
|
||||
index = (modeflag & ModeTypeMask) - ModeEGA;
|
||||
if (index < 0)
|
||||
index = 0;
|
||||
return ColorDepth[index];
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* HELPER: GetOffset */
|
||||
/*********************************************/
|
||||
|
||||
static unsigned short
|
||||
SiS_GetOffset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
||||
unsigned short ModeIdIndex, unsigned short rrti)
|
||||
{
|
||||
unsigned short xres, temp, colordepth, infoflag;
|
||||
|
||||
infoflag = SiS_Pr->SiS_RefIndex[rrti].Ext_InfoFlag;
|
||||
xres = SiS_Pr->SiS_RefIndex[rrti].XRes;
|
||||
|
||||
colordepth = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex);
|
||||
|
||||
temp = xres / 16;
|
||||
|
||||
if (infoflag & InterlaceMode)
|
||||
temp <<= 1;
|
||||
|
||||
temp *= colordepth;
|
||||
|
||||
if (xres % 16)
|
||||
temp += (colordepth >> 1);
|
||||
|
||||
return temp;
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* SEQ */
|
||||
/*********************************************/
|
||||
|
||||
static void
|
||||
SiS_SetSeqRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
|
||||
{
|
||||
unsigned char SRdata;
|
||||
int i;
|
||||
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x00, 0x03);
|
||||
|
||||
SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20;
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x01, SRdata);
|
||||
|
||||
for (i = 2; i <= 4; i++) {
|
||||
SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1];
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, i, SRdata);
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* MISC */
|
||||
/*********************************************/
|
||||
|
||||
static void
|
||||
SiS_SetMiscRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
|
||||
{
|
||||
unsigned char Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC;
|
||||
|
||||
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c2, Miscdata);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* CRTC */
|
||||
/*********************************************/
|
||||
|
||||
static void
|
||||
SiS_SetCRTCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
|
||||
{
|
||||
unsigned char CRTCdata;
|
||||
unsigned short i;
|
||||
|
||||
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3d4, 0x11, 0x7f);
|
||||
|
||||
for (i = 0; i <= 0x18; i++) {
|
||||
CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, i, CRTCdata);
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* ATT */
|
||||
/*********************************************/
|
||||
|
||||
static void
|
||||
SiS_SetATTRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
|
||||
{
|
||||
unsigned char ARdata;
|
||||
unsigned short i;
|
||||
|
||||
for (i = 0; i <= 0x13; i++) {
|
||||
ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i];
|
||||
SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3da);
|
||||
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, i);
|
||||
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, ARdata);
|
||||
}
|
||||
SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3da);
|
||||
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, 0x14);
|
||||
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, 0x00);
|
||||
|
||||
SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3da);
|
||||
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c0, 0x20);
|
||||
SiS_GetRegByte(SiS_Pr, SiS_Pr->SiS_P3da);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* GRC */
|
||||
/*********************************************/
|
||||
|
||||
static void
|
||||
SiS_SetGRCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
|
||||
{
|
||||
unsigned char GRdata;
|
||||
unsigned short i;
|
||||
|
||||
for (i = 0; i <= 0x08; i++) {
|
||||
GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i];
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3ce, i, GRdata);
|
||||
}
|
||||
|
||||
if (SiS_Pr->SiS_ModeType > ModeVGA) {
|
||||
/* 256 color disable */
|
||||
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3ce, 0x05, 0xBF);
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* CLEAR EXTENDED REGISTERS */
|
||||
/*********************************************/
|
||||
|
||||
static void SiS_ClearExt1Regs(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0x0A; i <= 0x0E; i++) {
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, i, 0x00);
|
||||
}
|
||||
|
||||
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x37, 0xFE);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* Get rate index */
|
||||
/*********************************************/
|
||||
|
||||
static unsigned short
|
||||
SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
||||
unsigned short ModeIdIndex)
|
||||
{
|
||||
unsigned short rrti, i, index, temp;
|
||||
|
||||
if (ModeNo <= 0x13)
|
||||
return 0xFFFF;
|
||||
|
||||
index = SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x33) & 0x0F;
|
||||
if (index > 0)
|
||||
index--;
|
||||
|
||||
rrti = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
|
||||
ModeNo = SiS_Pr->SiS_RefIndex[rrti].ModeID;
|
||||
|
||||
i = 0;
|
||||
do {
|
||||
if (SiS_Pr->SiS_RefIndex[rrti + i].ModeID != ModeNo)
|
||||
break;
|
||||
|
||||
temp =
|
||||
SiS_Pr->SiS_RefIndex[rrti + i].Ext_InfoFlag & ModeTypeMask;
|
||||
if (temp < SiS_Pr->SiS_ModeType)
|
||||
break;
|
||||
|
||||
i++;
|
||||
index--;
|
||||
} while (index != 0xFFFF);
|
||||
|
||||
i--;
|
||||
|
||||
return (rrti + i);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* SYNC */
|
||||
/*********************************************/
|
||||
|
||||
static void SiS_SetCRT1Sync(struct SiS_Private *SiS_Pr, unsigned short rrti)
|
||||
{
|
||||
unsigned short sync = SiS_Pr->SiS_RefIndex[rrti].Ext_InfoFlag >> 8;
|
||||
sync &= 0xC0;
|
||||
sync |= 0x2f;
|
||||
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c2, sync);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* CRTC/2 */
|
||||
/*********************************************/
|
||||
|
||||
static void
|
||||
SiS_SetCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
||||
unsigned short ModeIdIndex, unsigned short rrti)
|
||||
{
|
||||
unsigned char index;
|
||||
unsigned short temp, i, j, modeflag;
|
||||
|
||||
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3d4, 0x11, 0x7f);
|
||||
|
||||
modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
|
||||
|
||||
index = SiS_Pr->SiS_RefIndex[rrti].Ext_CRT1CRTC;
|
||||
|
||||
for (i = 0, j = 0; i <= 7; i++, j++) {
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, j,
|
||||
SiS_Pr->SiS_CRT1Table[index].CR[i]);
|
||||
}
|
||||
for (j = 0x10; i <= 10; i++, j++) {
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, j,
|
||||
SiS_Pr->SiS_CRT1Table[index].CR[i]);
|
||||
}
|
||||
for (j = 0x15; i <= 12; i++, j++) {
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, j,
|
||||
SiS_Pr->SiS_CRT1Table[index].CR[i]);
|
||||
}
|
||||
for (j = 0x0A; i <= 15; i++, j++) {
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, j,
|
||||
SiS_Pr->SiS_CRT1Table[index].CR[i]);
|
||||
}
|
||||
|
||||
temp = SiS_Pr->SiS_CRT1Table[index].CR[16] & 0xE0;
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0E, temp);
|
||||
|
||||
temp = ((SiS_Pr->SiS_CRT1Table[index].CR[16]) & 0x01) << 5;
|
||||
if (modeflag & DoubleScanMode)
|
||||
temp |= 0x80;
|
||||
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3d4, 0x09, 0x5F, temp);
|
||||
|
||||
if (SiS_Pr->SiS_ModeType > ModeVGA)
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x14, 0x4F);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* OFFSET & PITCH */
|
||||
/*********************************************/
|
||||
/* (partly overruled by SetPitch() in XF86) */
|
||||
/*********************************************/
|
||||
|
||||
static void
|
||||
SiS_SetCRT1Offset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
||||
unsigned short ModeIdIndex, unsigned short rrti)
|
||||
{
|
||||
unsigned short du = SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, rrti);
|
||||
unsigned short infoflag = SiS_Pr->SiS_RefIndex[rrti].Ext_InfoFlag;
|
||||
unsigned short temp;
|
||||
|
||||
temp = (du >> 8) & 0x0f;
|
||||
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0E, 0xF0, temp);
|
||||
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x13, (du & 0xFF));
|
||||
|
||||
if (infoflag & InterlaceMode)
|
||||
du >>= 1;
|
||||
|
||||
du <<= 5;
|
||||
temp = (du >> 8) & 0xff;
|
||||
if (du & 0xff)
|
||||
temp++;
|
||||
temp++;
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x10, temp);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* VCLK */
|
||||
/*********************************************/
|
||||
|
||||
static void
|
||||
SiS_SetCRT1VCLK(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
||||
unsigned short rrti)
|
||||
{
|
||||
unsigned short index = SiS_Pr->SiS_RefIndex[rrti].Ext_CRTVCLK;
|
||||
unsigned short clka = SiS_Pr->SiS_VCLKData[index].SR2B;
|
||||
unsigned short clkb = SiS_Pr->SiS_VCLKData[index].SR2C;
|
||||
|
||||
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x31, 0xCF);
|
||||
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x2B, clka);
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x2C, clkb);
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x2D, 0x01);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* FIFO */
|
||||
/*********************************************/
|
||||
|
||||
static void
|
||||
SiS_SetCRT1FIFO_310(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
||||
unsigned short mi)
|
||||
{
|
||||
unsigned short modeflag = SiS_Pr->SiS_EModeIDTable[mi].Ext_ModeFlag;
|
||||
|
||||
/* disable auto-threshold */
|
||||
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x3D, 0xFE);
|
||||
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x08, 0xAE);
|
||||
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x09, 0xF0);
|
||||
|
||||
if (ModeNo <= 0x13)
|
||||
return;
|
||||
|
||||
if ((!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) {
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x08, 0x34);
|
||||
SiS_SetRegOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x3D, 0x01);
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* MODE REGISTERS */
|
||||
/*********************************************/
|
||||
|
||||
static void
|
||||
SiS_SetVCLKState(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
||||
unsigned short rrti)
|
||||
{
|
||||
unsigned short data = 0, VCLK = 0, index = 0;
|
||||
|
||||
if (ModeNo > 0x13) {
|
||||
index = SiS_Pr->SiS_RefIndex[rrti].Ext_CRTVCLK;
|
||||
VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
|
||||
}
|
||||
|
||||
if (VCLK >= 166)
|
||||
data |= 0x0c;
|
||||
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x32, 0xf3, data);
|
||||
|
||||
if (VCLK >= 166)
|
||||
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x1f, 0xe7);
|
||||
|
||||
/* DAC speed */
|
||||
data = 0x03;
|
||||
if (VCLK >= 260)
|
||||
data = 0x00;
|
||||
else if (VCLK >= 160)
|
||||
data = 0x01;
|
||||
else if (VCLK >= 135)
|
||||
data = 0x02;
|
||||
|
||||
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x07, 0xF8, data);
|
||||
}
|
||||
|
||||
static void
|
||||
SiS_SetCRT1ModeRegs(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
||||
unsigned short ModeIdIndex, unsigned short rrti)
|
||||
{
|
||||
unsigned short data, infoflag = 0, modeflag;
|
||||
|
||||
if (ModeNo <= 0x13)
|
||||
modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
|
||||
else {
|
||||
modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
|
||||
infoflag = SiS_Pr->SiS_RefIndex[rrti].Ext_InfoFlag;
|
||||
}
|
||||
|
||||
/* Disable DPMS */
|
||||
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x1F, 0x3F);
|
||||
|
||||
data = 0;
|
||||
if (ModeNo > 0x13) {
|
||||
if (SiS_Pr->SiS_ModeType > ModeEGA) {
|
||||
data |= 0x02;
|
||||
data |= ((SiS_Pr->SiS_ModeType - ModeVGA) << 2);
|
||||
}
|
||||
if (infoflag & InterlaceMode)
|
||||
data |= 0x20;
|
||||
}
|
||||
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x06, 0xC0, data);
|
||||
|
||||
data = 0;
|
||||
if (infoflag & InterlaceMode) {
|
||||
/* data = (Hsync / 8) - ((Htotal / 8) / 2) + 3 */
|
||||
unsigned short hrs =
|
||||
(SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x04) |
|
||||
((SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0b) & 0xc0) << 2))
|
||||
- 3;
|
||||
unsigned short hto =
|
||||
(SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x00) |
|
||||
((SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0b) & 0x03) << 8))
|
||||
+ 5;
|
||||
data = hrs - (hto >> 1) + 3;
|
||||
}
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x19, (data & 0xFF));
|
||||
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3d4, 0x1a, 0xFC, (data >> 8));
|
||||
|
||||
if (modeflag & HalfDCLK)
|
||||
SiS_SetRegOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x01, 0x08);
|
||||
|
||||
data = 0;
|
||||
if (modeflag & LineCompareOff)
|
||||
data = 0x08;
|
||||
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0F, 0xB7, data);
|
||||
|
||||
if ((SiS_Pr->SiS_ModeType == ModeEGA) && (ModeNo > 0x13))
|
||||
SiS_SetRegOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x0F, 0x40);
|
||||
|
||||
SiS_SetRegAND(SiS_Pr, SiS_Pr->SiS_P3c4, 0x31, 0xfb);
|
||||
|
||||
data = 0x60;
|
||||
if (SiS_Pr->SiS_ModeType != ModeText) {
|
||||
data ^= 0x60;
|
||||
if (SiS_Pr->SiS_ModeType != ModeEGA)
|
||||
data ^= 0xA0;
|
||||
}
|
||||
SiS_SetRegANDOR(SiS_Pr, SiS_Pr->SiS_P3c4, 0x21, 0x1F, data);
|
||||
|
||||
SiS_SetVCLKState(SiS_Pr, ModeNo, rrti);
|
||||
|
||||
if (SiS_GetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x31) & 0x40)
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x52, 0x2c);
|
||||
else
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x52, 0x6c);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* LOAD DAC */
|
||||
/*********************************************/
|
||||
|
||||
static void
|
||||
SiS_WriteDAC(struct SiS_Private *SiS_Pr, unsigned long DACData,
|
||||
unsigned short shiftflag, unsigned short dl, unsigned short ah,
|
||||
unsigned short al, unsigned short dh)
|
||||
{
|
||||
unsigned short d1, d2, d3;
|
||||
|
||||
switch (dl) {
|
||||
case 0:
|
||||
d1 = dh;
|
||||
d2 = ah;
|
||||
d3 = al;
|
||||
break;
|
||||
case 1:
|
||||
d1 = ah;
|
||||
d2 = al;
|
||||
d3 = dh;
|
||||
break;
|
||||
default:
|
||||
d1 = al;
|
||||
d2 = dh;
|
||||
d3 = ah;
|
||||
}
|
||||
SiS_SetRegByte(SiS_Pr, DACData, (d1 << shiftflag));
|
||||
SiS_SetRegByte(SiS_Pr, DACData, (d2 << shiftflag));
|
||||
SiS_SetRegByte(SiS_Pr, DACData, (d3 << shiftflag));
|
||||
}
|
||||
|
||||
static void
|
||||
SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
||||
unsigned short mi)
|
||||
{
|
||||
unsigned short data, data2, time, i, j, k, m, n, o;
|
||||
unsigned short si, di, bx, sf;
|
||||
unsigned long DACAddr, DACData;
|
||||
const unsigned char *table = NULL;
|
||||
|
||||
if (ModeNo < 0x13)
|
||||
data = SiS_Pr->SiS_SModeIDTable[mi].St_ModeFlag;
|
||||
else
|
||||
data = SiS_Pr->SiS_EModeIDTable[mi].Ext_ModeFlag;
|
||||
|
||||
data &= DACInfoFlag;
|
||||
|
||||
j = time = 64;
|
||||
if (data == 0x00)
|
||||
table = SiS_MDA_DAC;
|
||||
else if (data == 0x08)
|
||||
table = SiS_CGA_DAC;
|
||||
else if (data == 0x10)
|
||||
table = SiS_EGA_DAC;
|
||||
else {
|
||||
j = 16;
|
||||
time = 256;
|
||||
table = SiS_VGA_DAC;
|
||||
}
|
||||
|
||||
DACAddr = SiS_Pr->SiS_P3c8;
|
||||
DACData = SiS_Pr->SiS_P3c9;
|
||||
sf = 0;
|
||||
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c6, 0xFF);
|
||||
|
||||
SiS_SetRegByte(SiS_Pr, DACAddr, 0x00);
|
||||
|
||||
for (i = 0; i < j; i++) {
|
||||
data = table[i];
|
||||
for (k = 0; k < 3; k++) {
|
||||
data2 = 0;
|
||||
if (data & 0x01)
|
||||
data2 += 0x2A;
|
||||
if (data & 0x02)
|
||||
data2 += 0x15;
|
||||
SiS_SetRegByte(SiS_Pr, DACData, (data2 << sf));
|
||||
data >>= 2;
|
||||
}
|
||||
}
|
||||
|
||||
if (time == 256) {
|
||||
for (i = 16; i < 32; i++) {
|
||||
data = table[i] << sf;
|
||||
for (k = 0; k < 3; k++)
|
||||
SiS_SetRegByte(SiS_Pr, DACData, data);
|
||||
}
|
||||
si = 32;
|
||||
for (m = 0; m < 9; m++) {
|
||||
di = si;
|
||||
bx = si + 4;
|
||||
for (n = 0; n < 3; n++) {
|
||||
for (o = 0; o < 5; o++) {
|
||||
SiS_WriteDAC(SiS_Pr, DACData, sf, n,
|
||||
table[di], table[bx],
|
||||
table[si]);
|
||||
si++;
|
||||
}
|
||||
si -= 2;
|
||||
for (o = 0; o < 3; o++) {
|
||||
SiS_WriteDAC(SiS_Pr, DACData, sf, n,
|
||||
table[di], table[si],
|
||||
table[bx]);
|
||||
si--;
|
||||
}
|
||||
}
|
||||
si += 5;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* SET CRT1 REGISTER GROUP */
|
||||
/*********************************************/
|
||||
|
||||
static void
|
||||
SiS_SetCRT1Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
|
||||
unsigned short ModeIdIndex)
|
||||
{
|
||||
unsigned short StandTableIndex, rrti;
|
||||
|
||||
SiS_Pr->SiS_CRT1Mode = ModeNo;
|
||||
|
||||
if (ModeNo <= 0x13)
|
||||
StandTableIndex = 0;
|
||||
else
|
||||
StandTableIndex = 1;
|
||||
|
||||
SiS_ResetSegmentRegisters(SiS_Pr);
|
||||
SiS_SetSeqRegs(SiS_Pr, StandTableIndex);
|
||||
SiS_SetMiscRegs(SiS_Pr, StandTableIndex);
|
||||
SiS_SetCRTCRegs(SiS_Pr, StandTableIndex);
|
||||
SiS_SetATTRegs(SiS_Pr, StandTableIndex);
|
||||
SiS_SetGRCRegs(SiS_Pr, StandTableIndex);
|
||||
SiS_ClearExt1Regs(SiS_Pr, ModeNo);
|
||||
|
||||
rrti = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex);
|
||||
|
||||
if (rrti != 0xFFFF) {
|
||||
SiS_SetCRT1Sync(SiS_Pr, rrti);
|
||||
SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, rrti);
|
||||
SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, rrti);
|
||||
SiS_SetCRT1VCLK(SiS_Pr, ModeNo, rrti);
|
||||
}
|
||||
|
||||
SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex);
|
||||
|
||||
SiS_SetCRT1ModeRegs(SiS_Pr, ModeNo, ModeIdIndex, rrti);
|
||||
|
||||
SiS_LoadDAC(SiS_Pr, ModeNo, ModeIdIndex);
|
||||
|
||||
SiS_DisplayOn(SiS_Pr);
|
||||
}
|
||||
|
||||
/*********************************************/
|
||||
/* SiSSetMode() */
|
||||
/*********************************************/
|
||||
|
||||
int SiSUSBSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
|
||||
{
|
||||
unsigned short ModeIdIndex;
|
||||
unsigned long BaseAddr = SiS_Pr->IOAddress;
|
||||
|
||||
SiSUSB_InitPtr(SiS_Pr);
|
||||
SiSUSBRegInit(SiS_Pr, BaseAddr);
|
||||
SiS_GetSysFlags(SiS_Pr);
|
||||
|
||||
if (!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex)))
|
||||
return 0;
|
||||
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3c4, 0x05, 0x86);
|
||||
|
||||
SiSInitPCIetc(SiS_Pr);
|
||||
|
||||
ModeNo &= 0x7f;
|
||||
|
||||
SiS_Pr->SiS_ModeType =
|
||||
SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag & ModeTypeMask;
|
||||
|
||||
SiS_Pr->SiS_SetFlag = LowModeTests;
|
||||
|
||||
/* Set mode on CRT1 */
|
||||
SiS_SetCRT1Group(SiS_Pr, ModeNo, ModeIdIndex);
|
||||
|
||||
SiS_HandleCRT1(SiS_Pr);
|
||||
|
||||
SiS_DisplayOn(SiS_Pr);
|
||||
SiS_SetRegByte(SiS_Pr, SiS_Pr->SiS_P3c6, 0xFF);
|
||||
|
||||
/* Store mode number */
|
||||
SiS_SetReg(SiS_Pr, SiS_Pr->SiS_P3d4, 0x34, ModeNo);
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
int SiSUSBSetVESAMode(struct SiS_Private *SiS_Pr, unsigned short VModeNo)
|
||||
{
|
||||
unsigned short ModeNo = 0;
|
||||
int i;
|
||||
|
||||
SiSUSB_InitPtr(SiS_Pr);
|
||||
|
||||
if (VModeNo == 0x03) {
|
||||
|
||||
ModeNo = 0x03;
|
||||
|
||||
} else {
|
||||
|
||||
i = 0;
|
||||
do {
|
||||
|
||||
if (SiS_Pr->SiS_EModeIDTable[i].Ext_VESAID == VModeNo) {
|
||||
ModeNo = SiS_Pr->SiS_EModeIDTable[i].Ext_ModeID;
|
||||
break;
|
||||
}
|
||||
|
||||
} while (SiS_Pr->SiS_EModeIDTable[i++].Ext_ModeID != 0xff);
|
||||
|
||||
}
|
||||
|
||||
if (!ModeNo)
|
||||
return 0;
|
||||
|
||||
return SiSUSBSetMode(SiS_Pr, ModeNo);
|
||||
}
|
||||
|
||||
#endif /* INCL_SISUSB_CON */
|
||||
841
drivers/usb/misc/sisusbvga/sisusb_init.h
Normal file
841
drivers/usb/misc/sisusbvga/sisusb_init.h
Normal file
|
|
@ -0,0 +1,841 @@
|
|||
/* $XFree86$ */
|
||||
/* $XdotOrg$ */
|
||||
/*
|
||||
* Data and prototypes for init.c
|
||||
*
|
||||
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
|
||||
*
|
||||
* If distributed as part of the Linux kernel, the following license terms
|
||||
* apply:
|
||||
*
|
||||
* * This program is free software; you can redistribute it and/or modify
|
||||
* * it under the terms of the GNU General Public License as published by
|
||||
* * the Free Software Foundation; either version 2 of the named License,
|
||||
* * or any later version.
|
||||
* *
|
||||
* * This program is distributed in the hope that it will be useful,
|
||||
* * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* * GNU General Public License for more details.
|
||||
* *
|
||||
* * You should have received a copy of the GNU General Public License
|
||||
* * along with this program; if not, write to the Free Software
|
||||
* * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
|
||||
*
|
||||
* Otherwise, the following license terms apply:
|
||||
*
|
||||
* * Redistribution and use in source and binary forms, with or without
|
||||
* * modification, are permitted provided that the following conditions
|
||||
* * are met:
|
||||
* * 1) Redistributions of source code must retain the above copyright
|
||||
* * notice, this list of conditions and the following disclaimer.
|
||||
* * 2) Redistributions in binary form must reproduce the above copyright
|
||||
* * notice, this list of conditions and the following disclaimer in the
|
||||
* * documentation and/or other materials provided with the distribution.
|
||||
* * 3) The name of the author may not be used to endorse or promote products
|
||||
* * derived from this software without specific prior written permission.
|
||||
* *
|
||||
* * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Author: Thomas Winischhofer <thomas@winischhofer.net>
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SISUSB_INIT_H_
|
||||
#define _SISUSB_INIT_H_
|
||||
|
||||
/* SiS_ModeType */
|
||||
#define ModeText 0x00
|
||||
#define ModeCGA 0x01
|
||||
#define ModeEGA 0x02
|
||||
#define ModeVGA 0x03
|
||||
#define Mode15Bpp 0x04
|
||||
#define Mode16Bpp 0x05
|
||||
#define Mode24Bpp 0x06
|
||||
#define Mode32Bpp 0x07
|
||||
|
||||
#define ModeTypeMask 0x07
|
||||
#define IsTextMode 0x07
|
||||
|
||||
#define DACInfoFlag 0x0018
|
||||
#define MemoryInfoFlag 0x01E0
|
||||
#define MemorySizeShift 5
|
||||
|
||||
/* modeflag */
|
||||
#define Charx8Dot 0x0200
|
||||
#define LineCompareOff 0x0400
|
||||
#define CRT2Mode 0x0800
|
||||
#define HalfDCLK 0x1000
|
||||
#define NoSupportSimuTV 0x2000
|
||||
#define NoSupportLCDScale 0x4000 /* SiS bridge: No scaling possible (no matter what panel) */
|
||||
#define DoubleScanMode 0x8000
|
||||
|
||||
/* Infoflag */
|
||||
#define SupportTV 0x0008
|
||||
#define SupportTV1024 0x0800
|
||||
#define SupportCHTV 0x0800
|
||||
#define Support64048060Hz 0x0800 /* Special for 640x480 LCD */
|
||||
#define SupportHiVision 0x0010
|
||||
#define SupportYPbPr750p 0x1000
|
||||
#define SupportLCD 0x0020
|
||||
#define SupportRAMDAC2 0x0040 /* All (<= 100Mhz) */
|
||||
#define SupportRAMDAC2_135 0x0100 /* All except DH (<= 135Mhz) */
|
||||
#define SupportRAMDAC2_162 0x0200 /* B, C (<= 162Mhz) */
|
||||
#define SupportRAMDAC2_202 0x0400 /* C (<= 202Mhz) */
|
||||
#define InterlaceMode 0x0080
|
||||
#define SyncPP 0x0000
|
||||
#define SyncPN 0x4000
|
||||
#define SyncNP 0x8000
|
||||
#define SyncNN 0xc000
|
||||
|
||||
/* SetFlag */
|
||||
#define ProgrammingCRT2 0x0001
|
||||
#define LowModeTests 0x0002
|
||||
#define LCDVESATiming 0x0008
|
||||
#define EnableLVDSDDA 0x0010
|
||||
#define SetDispDevSwitchFlag 0x0020
|
||||
#define CheckWinDos 0x0040
|
||||
#define SetDOSMode 0x0080
|
||||
|
||||
/* Index in ModeResInfo table */
|
||||
#define SIS_RI_320x200 0
|
||||
#define SIS_RI_320x240 1
|
||||
#define SIS_RI_320x400 2
|
||||
#define SIS_RI_400x300 3
|
||||
#define SIS_RI_512x384 4
|
||||
#define SIS_RI_640x400 5
|
||||
#define SIS_RI_640x480 6
|
||||
#define SIS_RI_800x600 7
|
||||
#define SIS_RI_1024x768 8
|
||||
#define SIS_RI_1280x1024 9
|
||||
#define SIS_RI_1600x1200 10
|
||||
#define SIS_RI_1920x1440 11
|
||||
#define SIS_RI_2048x1536 12
|
||||
#define SIS_RI_720x480 13
|
||||
#define SIS_RI_720x576 14
|
||||
#define SIS_RI_1280x960 15
|
||||
#define SIS_RI_800x480 16
|
||||
#define SIS_RI_1024x576 17
|
||||
#define SIS_RI_1280x720 18
|
||||
#define SIS_RI_856x480 19
|
||||
#define SIS_RI_1280x768 20
|
||||
#define SIS_RI_1400x1050 21
|
||||
#define SIS_RI_1152x864 22 /* Up to here SiS conforming */
|
||||
#define SIS_RI_848x480 23
|
||||
#define SIS_RI_1360x768 24
|
||||
#define SIS_RI_1024x600 25
|
||||
#define SIS_RI_1152x768 26
|
||||
#define SIS_RI_768x576 27
|
||||
#define SIS_RI_1360x1024 28
|
||||
#define SIS_RI_1680x1050 29
|
||||
#define SIS_RI_1280x800 30
|
||||
#define SIS_RI_1920x1080 31
|
||||
#define SIS_RI_960x540 32
|
||||
#define SIS_RI_960x600 33
|
||||
|
||||
#define SIS_VIDEO_CAPTURE 0x00 - 0x30
|
||||
#define SIS_VIDEO_PLAYBACK 0x02 - 0x30
|
||||
#define SIS_CRT2_PORT_04 0x04 - 0x30
|
||||
|
||||
/* Mode numbers */
|
||||
static const unsigned short ModeIndex_320x200[] = { 0x59, 0x41, 0x00, 0x4f };
|
||||
static const unsigned short ModeIndex_320x240[] = { 0x50, 0x56, 0x00, 0x53 };
|
||||
static const unsigned short ModeIndex_400x300[] = { 0x51, 0x57, 0x00, 0x54 };
|
||||
static const unsigned short ModeIndex_512x384[] = { 0x52, 0x58, 0x00, 0x5c };
|
||||
static const unsigned short ModeIndex_640x400[] = { 0x2f, 0x5d, 0x00, 0x5e };
|
||||
static const unsigned short ModeIndex_640x480[] = { 0x2e, 0x44, 0x00, 0x62 };
|
||||
static const unsigned short ModeIndex_720x480[] = { 0x31, 0x33, 0x00, 0x35 };
|
||||
static const unsigned short ModeIndex_720x576[] = { 0x32, 0x34, 0x00, 0x36 };
|
||||
static const unsigned short ModeIndex_768x576[] = { 0x5f, 0x60, 0x00, 0x61 };
|
||||
static const unsigned short ModeIndex_800x480[] = { 0x70, 0x7a, 0x00, 0x76 };
|
||||
static const unsigned short ModeIndex_800x600[] = { 0x30, 0x47, 0x00, 0x63 };
|
||||
static const unsigned short ModeIndex_848x480[] = { 0x39, 0x3b, 0x00, 0x3e };
|
||||
static const unsigned short ModeIndex_856x480[] = { 0x3f, 0x42, 0x00, 0x45 };
|
||||
static const unsigned short ModeIndex_960x540[] = { 0x1d, 0x1e, 0x00, 0x1f };
|
||||
static const unsigned short ModeIndex_960x600[] = { 0x20, 0x21, 0x00, 0x22 };
|
||||
static const unsigned short ModeIndex_1024x768[] = { 0x38, 0x4a, 0x00, 0x64 };
|
||||
static const unsigned short ModeIndex_1024x576[] = { 0x71, 0x74, 0x00, 0x77 };
|
||||
static const unsigned short ModeIndex_1152x864[] = { 0x29, 0x2a, 0x00, 0x2b };
|
||||
static const unsigned short ModeIndex_1280x720[] = { 0x79, 0x75, 0x00, 0x78 };
|
||||
static const unsigned short ModeIndex_1280x768[] = { 0x23, 0x24, 0x00, 0x25 };
|
||||
static const unsigned short ModeIndex_1280x1024[] = { 0x3a, 0x4d, 0x00, 0x65 };
|
||||
|
||||
static const unsigned char SiS_MDA_DAC[] = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
|
||||
0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
|
||||
0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
|
||||
0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15, 0x15,
|
||||
0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F
|
||||
};
|
||||
|
||||
static const unsigned char SiS_CGA_DAC[] = {
|
||||
0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
|
||||
0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
|
||||
0x2A, 0x3A, 0x2E, 0x3E, 0x2B, 0x3B, 0x2F, 0x3F,
|
||||
0x2A, 0x3A, 0x2E, 0x3E, 0x2B, 0x3B, 0x2F, 0x3F,
|
||||
0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
|
||||
0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
|
||||
0x2A, 0x3A, 0x2E, 0x3E, 0x2B, 0x3B, 0x2F, 0x3F,
|
||||
0x2A, 0x3A, 0x2E, 0x3E, 0x2B, 0x3B, 0x2F, 0x3F
|
||||
};
|
||||
|
||||
static const unsigned char SiS_EGA_DAC[] = {
|
||||
0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x05, 0x15,
|
||||
0x20, 0x30, 0x24, 0x34, 0x21, 0x31, 0x25, 0x35,
|
||||
0x08, 0x18, 0x0C, 0x1C, 0x09, 0x19, 0x0D, 0x1D,
|
||||
0x28, 0x38, 0x2C, 0x3C, 0x29, 0x39, 0x2D, 0x3D,
|
||||
0x02, 0x12, 0x06, 0x16, 0x03, 0x13, 0x07, 0x17,
|
||||
0x22, 0x32, 0x26, 0x36, 0x23, 0x33, 0x27, 0x37,
|
||||
0x0A, 0x1A, 0x0E, 0x1E, 0x0B, 0x1B, 0x0F, 0x1F,
|
||||
0x2A, 0x3A, 0x2E, 0x3E, 0x2B, 0x3B, 0x2F, 0x3F
|
||||
};
|
||||
|
||||
static const unsigned char SiS_VGA_DAC[] = {
|
||||
0x00, 0x10, 0x04, 0x14, 0x01, 0x11, 0x09, 0x15,
|
||||
0x2A, 0x3A, 0x2E, 0x3E, 0x2B, 0x3B, 0x2F, 0x3F,
|
||||
0x00, 0x05, 0x08, 0x0B, 0x0E, 0x11, 0x14, 0x18,
|
||||
0x1C, 0x20, 0x24, 0x28, 0x2D, 0x32, 0x38, 0x3F,
|
||||
0x00, 0x10, 0x1F, 0x2F, 0x3F, 0x1F, 0x27, 0x2F,
|
||||
0x37, 0x3F, 0x2D, 0x31, 0x36, 0x3A, 0x3F, 0x00,
|
||||
0x07, 0x0E, 0x15, 0x1C, 0x0E, 0x11, 0x15, 0x18,
|
||||
0x1C, 0x14, 0x16, 0x18, 0x1A, 0x1C, 0x00, 0x04,
|
||||
0x08, 0x0C, 0x10, 0x08, 0x0A, 0x0C, 0x0E, 0x10,
|
||||
0x0B, 0x0C, 0x0D, 0x0F, 0x10
|
||||
};
|
||||
|
||||
static const struct SiS_St SiSUSB_SModeIDTable[] = {
|
||||
{0x03, 0x0010, 0x18, 0x02, 0x02, 0x00, 0x01, 0x03, 0x40},
|
||||
{0xff, 0x0000, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
|
||||
};
|
||||
|
||||
static const struct SiS_StResInfo_S SiSUSB_StResInfo[] = {
|
||||
{640, 400},
|
||||
{640, 350},
|
||||
{720, 400},
|
||||
{720, 350},
|
||||
{640, 480}
|
||||
};
|
||||
|
||||
static const struct SiS_ModeResInfo SiSUSB_ModeResInfo[] = {
|
||||
{320, 200, 8, 8}, /* 0x00 */
|
||||
{320, 240, 8, 8}, /* 0x01 */
|
||||
{320, 400, 8, 8}, /* 0x02 */
|
||||
{400, 300, 8, 8}, /* 0x03 */
|
||||
{512, 384, 8, 8}, /* 0x04 */
|
||||
{640, 400, 8, 16}, /* 0x05 */
|
||||
{640, 480, 8, 16}, /* 0x06 */
|
||||
{800, 600, 8, 16}, /* 0x07 */
|
||||
{1024, 768, 8, 16}, /* 0x08 */
|
||||
{1280, 1024, 8, 16}, /* 0x09 */
|
||||
{1600, 1200, 8, 16}, /* 0x0a */
|
||||
{1920, 1440, 8, 16}, /* 0x0b */
|
||||
{2048, 1536, 8, 16}, /* 0x0c */
|
||||
{720, 480, 8, 16}, /* 0x0d */
|
||||
{720, 576, 8, 16}, /* 0x0e */
|
||||
{1280, 960, 8, 16}, /* 0x0f */
|
||||
{800, 480, 8, 16}, /* 0x10 */
|
||||
{1024, 576, 8, 16}, /* 0x11 */
|
||||
{1280, 720, 8, 16}, /* 0x12 */
|
||||
{856, 480, 8, 16}, /* 0x13 */
|
||||
{1280, 768, 8, 16}, /* 0x14 */
|
||||
{1400, 1050, 8, 16}, /* 0x15 */
|
||||
{1152, 864, 8, 16}, /* 0x16 */
|
||||
{848, 480, 8, 16}, /* 0x17 */
|
||||
{1360, 768, 8, 16}, /* 0x18 */
|
||||
{1024, 600, 8, 16}, /* 0x19 */
|
||||
{1152, 768, 8, 16}, /* 0x1a */
|
||||
{768, 576, 8, 16}, /* 0x1b */
|
||||
{1360, 1024, 8, 16}, /* 0x1c */
|
||||
{1680, 1050, 8, 16}, /* 0x1d */
|
||||
{1280, 800, 8, 16}, /* 0x1e */
|
||||
{1920, 1080, 8, 16}, /* 0x1f */
|
||||
{960, 540, 8, 16}, /* 0x20 */
|
||||
{960, 600, 8, 16} /* 0x21 */
|
||||
};
|
||||
|
||||
static const struct SiS_StandTable SiSUSB_StandTable[] = {
|
||||
/* MD_3_400 - mode 0x03 - 400 */
|
||||
{
|
||||
0x50, 0x18, 0x10, 0x1000,
|
||||
{0x00, 0x03, 0x00, 0x02},
|
||||
0x67,
|
||||
{0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
|
||||
0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
|
||||
0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
|
||||
0xff},
|
||||
{0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
|
||||
0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
|
||||
0x0c, 0x00, 0x0f, 0x08},
|
||||
{0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff}
|
||||
},
|
||||
/* Generic for VGA and higher */
|
||||
{
|
||||
0x00, 0x00, 0x00, 0x0000,
|
||||
{0x01, 0x0f, 0x00, 0x0e},
|
||||
0x23,
|
||||
{0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
|
||||
0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xea, 0x8c, 0xdf, 0x28, 0x40, 0xe7, 0x04, 0xa3,
|
||||
0xff},
|
||||
{0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
|
||||
0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
|
||||
0x01, 0x00, 0x00, 0x00},
|
||||
{0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f, 0xff}
|
||||
}
|
||||
};
|
||||
|
||||
static const struct SiS_Ext SiSUSB_EModeIDTable[] = {
|
||||
{0x2e, 0x0a1b, 0x0101, SIS_RI_640x480, 0x00, 0x00, 0x05, 0x05, 0x08, 2}, /* 640x480x8 */
|
||||
{0x2f, 0x0a1b, 0x0100, SIS_RI_640x400, 0x00, 0x00, 0x05, 0x05, 0x10, 0}, /* 640x400x8 */
|
||||
{0x30, 0x2a1b, 0x0103, SIS_RI_800x600, 0x00, 0x00, 0x07, 0x06, 0x00, 3}, /* 800x600x8 */
|
||||
{0x31, 0x4a1b, 0x0000, SIS_RI_720x480, 0x00, 0x00, 0x06, 0x06, 0x11, -1}, /* 720x480x8 */
|
||||
{0x32, 0x4a1b, 0x0000, SIS_RI_720x576, 0x00, 0x00, 0x06, 0x06, 0x12, -1}, /* 720x576x8 */
|
||||
{0x33, 0x4a1d, 0x0000, SIS_RI_720x480, 0x00, 0x00, 0x06, 0x06, 0x11, -1}, /* 720x480x16 */
|
||||
{0x34, 0x6a1d, 0x0000, SIS_RI_720x576, 0x00, 0x00, 0x06, 0x06, 0x12, -1}, /* 720x576x16 */
|
||||
{0x35, 0x4a1f, 0x0000, SIS_RI_720x480, 0x00, 0x00, 0x06, 0x06, 0x11, -1}, /* 720x480x32 */
|
||||
{0x36, 0x6a1f, 0x0000, SIS_RI_720x576, 0x00, 0x00, 0x06, 0x06, 0x12, -1}, /* 720x576x32 */
|
||||
{0x38, 0x0a1b, 0x0105, SIS_RI_1024x768, 0x00, 0x00, 0x08, 0x07, 0x13, 4}, /* 1024x768x8 */
|
||||
{0x3a, 0x0e3b, 0x0107, SIS_RI_1280x1024, 0x00, 0x00, 0x00, 0x00, 0x2f, 8}, /* 1280x1024x8 */
|
||||
{0x41, 0x9a1d, 0x010e, SIS_RI_320x200, 0x00, 0x00, 0x04, 0x04, 0x1a, 0}, /* 320x200x16 */
|
||||
{0x44, 0x0a1d, 0x0111, SIS_RI_640x480, 0x00, 0x00, 0x05, 0x05, 0x08, 2}, /* 640x480x16 */
|
||||
{0x47, 0x2a1d, 0x0114, SIS_RI_800x600, 0x00, 0x00, 0x07, 0x06, 0x00, 3}, /* 800x600x16 */
|
||||
{0x4a, 0x0a3d, 0x0117, SIS_RI_1024x768, 0x00, 0x00, 0x08, 0x07, 0x13, 4}, /* 1024x768x16 */
|
||||
{0x4d, 0x0e7d, 0x011a, SIS_RI_1280x1024, 0x00, 0x00, 0x00, 0x00, 0x2f, 8}, /* 1280x1024x16 */
|
||||
{0x50, 0x9a1b, 0x0132, SIS_RI_320x240, 0x00, 0x00, 0x04, 0x04, 0x1b, 2}, /* 320x240x8 */
|
||||
{0x51, 0xba1b, 0x0133, SIS_RI_400x300, 0x00, 0x00, 0x07, 0x07, 0x1c, 3}, /* 400x300x8 */
|
||||
{0x52, 0xba1b, 0x0134, SIS_RI_512x384, 0x00, 0x00, 0x00, 0x00, 0x1d, 4}, /* 512x384x8 */
|
||||
{0x56, 0x9a1d, 0x0135, SIS_RI_320x240, 0x00, 0x00, 0x04, 0x04, 0x1b, 2}, /* 320x240x16 */
|
||||
{0x57, 0xba1d, 0x0136, SIS_RI_400x300, 0x00, 0x00, 0x07, 0x07, 0x1c, 3}, /* 400x300x16 */
|
||||
{0x58, 0xba1d, 0x0137, SIS_RI_512x384, 0x00, 0x00, 0x00, 0x00, 0x1d, 4}, /* 512x384x16 */
|
||||
{0x59, 0x9a1b, 0x0138, SIS_RI_320x200, 0x00, 0x00, 0x04, 0x04, 0x1a, 0}, /* 320x200x8 */
|
||||
{0x5c, 0xba1f, 0x0000, SIS_RI_512x384, 0x00, 0x00, 0x00, 0x00, 0x1d, 4}, /* 512x384x32 */
|
||||
{0x5d, 0x0a1d, 0x0139, SIS_RI_640x400, 0x00, 0x00, 0x05, 0x07, 0x10, 0}, /* 640x400x16 */
|
||||
{0x5e, 0x0a1f, 0x0000, SIS_RI_640x400, 0x00, 0x00, 0x05, 0x07, 0x10, 0}, /* 640x400x32 */
|
||||
{0x62, 0x0a3f, 0x013a, SIS_RI_640x480, 0x00, 0x00, 0x05, 0x05, 0x08, 2}, /* 640x480x32 */
|
||||
{0x63, 0x2a3f, 0x013b, SIS_RI_800x600, 0x00, 0x00, 0x07, 0x06, 0x00, 3}, /* 800x600x32 */
|
||||
{0x64, 0x0a7f, 0x013c, SIS_RI_1024x768, 0x00, 0x00, 0x08, 0x07, 0x13, 4}, /* 1024x768x32 */
|
||||
{0x65, 0x0eff, 0x013d, SIS_RI_1280x1024, 0x00, 0x00, 0x00, 0x00, 0x2f, 8}, /* 1280x1024x32 */
|
||||
{0x70, 0x6a1b, 0x0000, SIS_RI_800x480, 0x00, 0x00, 0x07, 0x07, 0x1e, -1}, /* 800x480x8 */
|
||||
{0x71, 0x4a1b, 0x0000, SIS_RI_1024x576, 0x00, 0x00, 0x00, 0x00, 0x21, -1}, /* 1024x576x8 */
|
||||
{0x74, 0x4a1d, 0x0000, SIS_RI_1024x576, 0x00, 0x00, 0x00, 0x00, 0x21, -1}, /* 1024x576x16 */
|
||||
{0x75, 0x0a3d, 0x0000, SIS_RI_1280x720, 0x00, 0x00, 0x00, 0x00, 0x24, 5}, /* 1280x720x16 */
|
||||
{0x76, 0x6a1f, 0x0000, SIS_RI_800x480, 0x00, 0x00, 0x07, 0x07, 0x1e, -1}, /* 800x480x32 */
|
||||
{0x77, 0x4a1f, 0x0000, SIS_RI_1024x576, 0x00, 0x00, 0x00, 0x00, 0x21, -1}, /* 1024x576x32 */
|
||||
{0x78, 0x0a3f, 0x0000, SIS_RI_1280x720, 0x00, 0x00, 0x00, 0x00, 0x24, 5}, /* 1280x720x32 */
|
||||
{0x79, 0x0a3b, 0x0000, SIS_RI_1280x720, 0x00, 0x00, 0x00, 0x00, 0x24, 5}, /* 1280x720x8 */
|
||||
{0x7a, 0x6a1d, 0x0000, SIS_RI_800x480, 0x00, 0x00, 0x07, 0x07, 0x1e, -1}, /* 800x480x16 */
|
||||
{0x23, 0x0e3b, 0x0000, SIS_RI_1280x768, 0x00, 0x00, 0x00, 0x00, 0x27, 6}, /* 1280x768x8 */
|
||||
{0x24, 0x0e7d, 0x0000, SIS_RI_1280x768, 0x00, 0x00, 0x00, 0x00, 0x27, 6}, /* 1280x768x16 */
|
||||
{0x25, 0x0eff, 0x0000, SIS_RI_1280x768, 0x00, 0x00, 0x00, 0x00, 0x27, 6}, /* 1280x768x32 */
|
||||
{0x39, 0x6a1b, 0x0000, SIS_RI_848x480, 0x00, 0x00, 0x00, 0x00, 0x28, -1}, /* 848x480 */
|
||||
{0x3b, 0x6a3d, 0x0000, SIS_RI_848x480, 0x00, 0x00, 0x00, 0x00, 0x28,
|
||||
-1},
|
||||
{0x3e, 0x6a7f, 0x0000, SIS_RI_848x480, 0x00, 0x00, 0x00, 0x00, 0x28,
|
||||
-1},
|
||||
{0x3f, 0x6a1b, 0x0000, SIS_RI_856x480, 0x00, 0x00, 0x00, 0x00, 0x2a, -1}, /* 856x480 */
|
||||
{0x42, 0x6a3d, 0x0000, SIS_RI_856x480, 0x00, 0x00, 0x00, 0x00, 0x2a,
|
||||
-1},
|
||||
{0x45, 0x6a7f, 0x0000, SIS_RI_856x480, 0x00, 0x00, 0x00, 0x00, 0x2a,
|
||||
-1},
|
||||
{0x4f, 0x9a1f, 0x0000, SIS_RI_320x200, 0x00, 0x00, 0x04, 0x04, 0x1a, 0}, /* 320x200x32 */
|
||||
{0x53, 0x9a1f, 0x0000, SIS_RI_320x240, 0x00, 0x00, 0x04, 0x04, 0x1b, 2}, /* 320x240x32 */
|
||||
{0x54, 0xba1f, 0x0000, SIS_RI_400x300, 0x00, 0x00, 0x07, 0x07, 0x1c, 3}, /* 400x300x32 */
|
||||
{0x5f, 0x6a1b, 0x0000, SIS_RI_768x576, 0x00, 0x00, 0x06, 0x06, 0x2c, -1}, /* 768x576 */
|
||||
{0x60, 0x6a1d, 0x0000, SIS_RI_768x576, 0x00, 0x00, 0x06, 0x06, 0x2c,
|
||||
-1},
|
||||
{0x61, 0x6a3f, 0x0000, SIS_RI_768x576, 0x00, 0x00, 0x06, 0x06, 0x2c,
|
||||
-1},
|
||||
{0x1d, 0x6a1b, 0x0000, SIS_RI_960x540, 0x00, 0x00, 0x00, 0x00, 0x2d, -1}, /* 960x540 */
|
||||
{0x1e, 0x6a3d, 0x0000, SIS_RI_960x540, 0x00, 0x00, 0x00, 0x00, 0x2d,
|
||||
-1},
|
||||
{0x1f, 0x6a7f, 0x0000, SIS_RI_960x540, 0x00, 0x00, 0x00, 0x00, 0x2d,
|
||||
-1},
|
||||
{0x20, 0x6a1b, 0x0000, SIS_RI_960x600, 0x00, 0x00, 0x00, 0x00, 0x2e, -1}, /* 960x600 */
|
||||
{0x21, 0x6a3d, 0x0000, SIS_RI_960x600, 0x00, 0x00, 0x00, 0x00, 0x2e,
|
||||
-1},
|
||||
{0x22, 0x6a7f, 0x0000, SIS_RI_960x600, 0x00, 0x00, 0x00, 0x00, 0x2e,
|
||||
-1},
|
||||
{0x29, 0x4e1b, 0x0000, SIS_RI_1152x864, 0x00, 0x00, 0x00, 0x00, 0x33, -1}, /* 1152x864 */
|
||||
{0x2a, 0x4e3d, 0x0000, SIS_RI_1152x864, 0x00, 0x00, 0x00, 0x00, 0x33,
|
||||
-1},
|
||||
{0x2b, 0x4e7f, 0x0000, SIS_RI_1152x864, 0x00, 0x00, 0x00, 0x00, 0x33,
|
||||
-1},
|
||||
{0xff, 0x0000, 0x0000, 0, 0x00, 0x00, 0x00, 0x00, 0x00, -1}
|
||||
};
|
||||
|
||||
static const struct SiS_Ext2 SiSUSB_RefIndex[] = {
|
||||
{0x085f, 0x0d, 0x03, 0x05, 0x05, 0x30, 800, 600, 0x40, 0x00, 0x00}, /* 0x0 */
|
||||
{0x0067, 0x0e, 0x04, 0x05, 0x05, 0x30, 800, 600, 0x40, 0x00, 0x00}, /* 0x1 */
|
||||
{0x0067, 0x0f, 0x08, 0x48, 0x05, 0x30, 800, 600, 0x40, 0x00, 0x00}, /* 0x2 */
|
||||
{0x0067, 0x10, 0x07, 0x8b, 0x05, 0x30, 800, 600, 0x40, 0x00, 0x00}, /* 0x3 */
|
||||
{0x0047, 0x11, 0x0a, 0x00, 0x05, 0x30, 800, 600, 0x40, 0x00, 0x00}, /* 0x4 */
|
||||
{0x0047, 0x12, 0x0d, 0x00, 0x05, 0x30, 800, 600, 0x40, 0x00, 0x00}, /* 0x5 */
|
||||
{0x0047, 0x13, 0x13, 0x00, 0x05, 0x30, 800, 600, 0x20, 0x00, 0x00}, /* 0x6 */
|
||||
{0x0107, 0x14, 0x1c, 0x00, 0x05, 0x30, 800, 600, 0x20, 0x00, 0x00}, /* 0x7 */
|
||||
{0xc85f, 0x05, 0x00, 0x04, 0x04, 0x2e, 640, 480, 0x40, 0x00, 0x00}, /* 0x8 */
|
||||
{0xc067, 0x06, 0x02, 0x04, 0x04, 0x2e, 640, 480, 0x40, 0x00, 0x00}, /* 0x9 */
|
||||
{0xc067, 0x07, 0x02, 0x47, 0x04, 0x2e, 640, 480, 0x40, 0x00, 0x00}, /* 0xa */
|
||||
{0xc067, 0x08, 0x03, 0x8a, 0x04, 0x2e, 640, 480, 0x40, 0x00, 0x00}, /* 0xb */
|
||||
{0xc047, 0x09, 0x05, 0x00, 0x04, 0x2e, 640, 480, 0x40, 0x00, 0x00}, /* 0xc */
|
||||
{0xc047, 0x0a, 0x09, 0x00, 0x04, 0x2e, 640, 480, 0x40, 0x00, 0x00}, /* 0xd */
|
||||
{0xc047, 0x0b, 0x0e, 0x00, 0x04, 0x2e, 640, 480, 0x40, 0x00, 0x00}, /* 0xe */
|
||||
{0xc047, 0x0c, 0x15, 0x00, 0x04, 0x2e, 640, 480, 0x40, 0x00, 0x00}, /* 0xf */
|
||||
{0x487f, 0x04, 0x00, 0x00, 0x00, 0x2f, 640, 400, 0x30, 0x55, 0x6e}, /* 0x10 */
|
||||
{0xc06f, 0x3c, 0x01, 0x06, 0x13, 0x31, 720, 480, 0x30, 0x00, 0x00}, /* 0x11 */
|
||||
{0x006f, 0x3d, 0x6f, 0x06, 0x14, 0x32, 720, 576, 0x30, 0x00, 0x00}, /* 0x12 (6f was 03) */
|
||||
{0x0087, 0x15, 0x06, 0x00, 0x06, 0x38, 1024, 768, 0x30, 0x00, 0x00}, /* 0x13 */
|
||||
{0xc877, 0x16, 0x0b, 0x06, 0x06, 0x38, 1024, 768, 0x20, 0x00, 0x00}, /* 0x14 */
|
||||
{0xc067, 0x17, 0x0f, 0x49, 0x06, 0x38, 1024, 768, 0x20, 0x00, 0x00}, /* 0x15 */
|
||||
{0x0067, 0x18, 0x11, 0x00, 0x06, 0x38, 1024, 768, 0x20, 0x00, 0x00}, /* 0x16 */
|
||||
{0x0047, 0x19, 0x16, 0x8c, 0x06, 0x38, 1024, 768, 0x20, 0x00, 0x00}, /* 0x17 */
|
||||
{0x0107, 0x1a, 0x1b, 0x00, 0x06, 0x38, 1024, 768, 0x10, 0x00, 0x00}, /* 0x18 */
|
||||
{0x0107, 0x1b, 0x1f, 0x00, 0x06, 0x38, 1024, 768, 0x10, 0x00, 0x00}, /* 0x19 */
|
||||
{0x407f, 0x00, 0x00, 0x00, 0x00, 0x41, 320, 200, 0x30, 0x56, 0x4e}, /* 0x1a */
|
||||
{0xc07f, 0x01, 0x00, 0x04, 0x04, 0x50, 320, 240, 0x30, 0x00, 0x00}, /* 0x1b */
|
||||
{0x007f, 0x02, 0x04, 0x05, 0x05, 0x51, 400, 300, 0x30, 0x00, 0x00}, /* 0x1c */
|
||||
{0xc077, 0x03, 0x0b, 0x06, 0x06, 0x52, 512, 384, 0x30, 0x00, 0x00}, /* 0x1d */
|
||||
{0x0077, 0x32, 0x40, 0x08, 0x18, 0x70, 800, 480, 0x30, 0x00, 0x00}, /* 0x1e */
|
||||
{0x0047, 0x33, 0x07, 0x08, 0x18, 0x70, 800, 480, 0x30, 0x00, 0x00}, /* 0x1f */
|
||||
{0x0047, 0x34, 0x0a, 0x08, 0x18, 0x70, 800, 480, 0x30, 0x00, 0x00}, /* 0x20 */
|
||||
{0x0077, 0x35, 0x0b, 0x09, 0x19, 0x71, 1024, 576, 0x30, 0x00, 0x00}, /* 0x21 */
|
||||
{0x0047, 0x36, 0x11, 0x09, 0x19, 0x71, 1024, 576, 0x30, 0x00, 0x00}, /* 0x22 */
|
||||
{0x0047, 0x37, 0x16, 0x09, 0x19, 0x71, 1024, 576, 0x30, 0x00, 0x00}, /* 0x23 */
|
||||
{0x1137, 0x38, 0x19, 0x0a, 0x0c, 0x75, 1280, 720, 0x30, 0x00, 0x00}, /* 0x24 */
|
||||
{0x1107, 0x39, 0x1e, 0x0a, 0x0c, 0x75, 1280, 720, 0x30, 0x00, 0x00}, /* 0x25 */
|
||||
{0x1307, 0x3a, 0x20, 0x0a, 0x0c, 0x75, 1280, 720, 0x30, 0x00, 0x00}, /* 0x26 */
|
||||
{0x0077, 0x42, 0x5b, 0x08, 0x11, 0x23, 1280, 768, 0x30, 0x00, 0x00}, /* 0x27 */
|
||||
{0x0087, 0x45, 0x57, 0x00, 0x16, 0x39, 848, 480, 0x30, 0x00, 0x00}, /* 0x28 38Hzi */
|
||||
{0xc067, 0x46, 0x55, 0x0b, 0x16, 0x39, 848, 480, 0x30, 0x00, 0x00}, /* 0x29 848x480-60Hz */
|
||||
{0x0087, 0x47, 0x57, 0x00, 0x17, 0x3f, 856, 480, 0x30, 0x00, 0x00}, /* 0x2a 856x480-38Hzi */
|
||||
{0xc067, 0x48, 0x57, 0x00, 0x17, 0x3f, 856, 480, 0x30, 0x00, 0x00}, /* 0x2b 856x480-60Hz */
|
||||
{0x006f, 0x4d, 0x71, 0x06, 0x15, 0x5f, 768, 576, 0x30, 0x00, 0x00}, /* 0x2c 768x576-56Hz */
|
||||
{0x0067, 0x52, 0x6a, 0x00, 0x1c, 0x1d, 960, 540, 0x30, 0x00, 0x00}, /* 0x2d 960x540 60Hz */
|
||||
{0x0077, 0x53, 0x6b, 0x0b, 0x1d, 0x20, 960, 600, 0x30, 0x00, 0x00}, /* 0x2e 960x600 60Hz */
|
||||
{0x0087, 0x1c, 0x11, 0x00, 0x07, 0x3a, 1280, 1024, 0x30, 0x00, 0x00}, /* 0x2f */
|
||||
{0x0137, 0x1d, 0x19, 0x07, 0x07, 0x3a, 1280, 1024, 0x00, 0x00, 0x00}, /* 0x30 */
|
||||
{0x0107, 0x1e, 0x1e, 0x00, 0x07, 0x3a, 1280, 1024, 0x00, 0x00, 0x00}, /* 0x31 */
|
||||
{0x0207, 0x1f, 0x20, 0x00, 0x07, 0x3a, 1280, 1024, 0x00, 0x00, 0x00}, /* 0x32 */
|
||||
{0x0127, 0x54, 0x6d, 0x00, 0x1a, 0x29, 1152, 864, 0x30, 0x00, 0x00}, /* 0x33 1152x864-60Hz */
|
||||
{0x0127, 0x44, 0x19, 0x00, 0x1a, 0x29, 1152, 864, 0x30, 0x00, 0x00}, /* 0x34 1152x864-75Hz */
|
||||
{0x0127, 0x4a, 0x1e, 0x00, 0x1a, 0x29, 1152, 864, 0x30, 0x00, 0x00}, /* 0x35 1152x864-85Hz */
|
||||
{0xffff, 0x00, 0x00, 0x00, 0x00, 0x00, 0, 0, 0, 0x00, 0x00}
|
||||
};
|
||||
|
||||
static const struct SiS_CRT1Table SiSUSB_CRT1Table[] = {
|
||||
{{0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0xbf, 0x1f,
|
||||
0x9c, 0x8e, 0x8f, 0x96, 0xb9, 0x30, 0x00, 0x00,
|
||||
0x00}}, /* 0x0 */
|
||||
{{0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0x0b, 0x3e,
|
||||
0xe9, 0x8b, 0xdf, 0xe7, 0x04, 0x00, 0x00, 0x00,
|
||||
0x00}}, /* 0x1 */
|
||||
{{0x3d, 0x31, 0x31, 0x81, 0x37, 0x1f, 0x72, 0xf0,
|
||||
0x58, 0x8c, 0x57, 0x57, 0x73, 0x20, 0x00, 0x05,
|
||||
0x01}}, /* 0x2 */
|
||||
{{0x4f, 0x3f, 0x3f, 0x93, 0x45, 0x0d, 0x24, 0xf5,
|
||||
0x02, 0x88, 0xff, 0xff, 0x25, 0x10, 0x00, 0x01,
|
||||
0x01}}, /* 0x3 */
|
||||
{{0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
|
||||
0x9c, 0x8e, 0x8f, 0x96, 0xb9, 0x30, 0x00, 0x05,
|
||||
0x00}}, /* 0x4 */
|
||||
{{0x5f, 0x4f, 0x4f, 0x83, 0x55, 0x81, 0x0b, 0x3e,
|
||||
0xe9, 0x8b, 0xdf, 0xe8, 0x0c, 0x00, 0x00, 0x05,
|
||||
0x00}}, /* 0x5 */
|
||||
{{0x63, 0x4f, 0x4f, 0x87, 0x56, 0x9b, 0x06, 0x3e,
|
||||
0xe8, 0x8a, 0xdf, 0xe7, 0x07, 0x00, 0x00, 0x01,
|
||||
0x00}}, /* 0x6 */
|
||||
{{0x64, 0x4f, 0x4f, 0x88, 0x55, 0x9d, 0xf2, 0x1f,
|
||||
0xe0, 0x83, 0xdf, 0xdf, 0xf3, 0x10, 0x00, 0x01,
|
||||
0x00}}, /* 0x7 */
|
||||
{{0x63, 0x4f, 0x4f, 0x87, 0x5a, 0x81, 0xfb, 0x1f,
|
||||
0xe0, 0x83, 0xdf, 0xdf, 0xfc, 0x10, 0x00, 0x05,
|
||||
0x00}}, /* 0x8 */
|
||||
{{0x65, 0x4f, 0x4f, 0x89, 0x58, 0x80, 0xfb, 0x1f,
|
||||
0xe0, 0x83, 0xdf, 0xdf, 0xfc, 0x10, 0x00, 0x05,
|
||||
0x61}}, /* 0x9 */
|
||||
{{0x65, 0x4f, 0x4f, 0x89, 0x58, 0x80, 0x01, 0x3e,
|
||||
0xe0, 0x83, 0xdf, 0xdf, 0x02, 0x00, 0x00, 0x05,
|
||||
0x61}}, /* 0xa */
|
||||
{{0x67, 0x4f, 0x4f, 0x8b, 0x58, 0x81, 0x0d, 0x3e,
|
||||
0xe0, 0x83, 0xdf, 0xdf, 0x0e, 0x00, 0x00, 0x05,
|
||||
0x61}}, /* 0xb */
|
||||
{{0x65, 0x4f, 0x4f, 0x89, 0x57, 0x9f, 0xfb, 0x1f,
|
||||
0xe6, 0x8a, 0xdf, 0xdf, 0xfc, 0x10, 0x00, 0x01,
|
||||
0x00}}, /* 0xc */
|
||||
{{0x7b, 0x63, 0x63, 0x9f, 0x6a, 0x93, 0x6f, 0xf0,
|
||||
0x58, 0x8a, 0x57, 0x57, 0x70, 0x20, 0x00, 0x05,
|
||||
0x01}}, /* 0xd */
|
||||
{{0x7f, 0x63, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xf0,
|
||||
0x58, 0x8c, 0x57, 0x57, 0x73, 0x20, 0x00, 0x06,
|
||||
0x01}}, /* 0xe */
|
||||
{{0x7d, 0x63, 0x63, 0x81, 0x6e, 0x1d, 0x98, 0xf0,
|
||||
0x7c, 0x82, 0x57, 0x57, 0x99, 0x00, 0x00, 0x06,
|
||||
0x01}}, /* 0xf */
|
||||
{{0x7f, 0x63, 0x63, 0x83, 0x69, 0x13, 0x6f, 0xf0,
|
||||
0x58, 0x8b, 0x57, 0x57, 0x70, 0x20, 0x00, 0x06,
|
||||
0x01}}, /* 0x10 */
|
||||
{{0x7e, 0x63, 0x63, 0x82, 0x6b, 0x13, 0x75, 0xf0,
|
||||
0x58, 0x8b, 0x57, 0x57, 0x76, 0x20, 0x00, 0x06,
|
||||
0x01}}, /* 0x11 */
|
||||
{{0x81, 0x63, 0x63, 0x85, 0x6d, 0x18, 0x7a, 0xf0,
|
||||
0x58, 0x8b, 0x57, 0x57, 0x7b, 0x20, 0x00, 0x06,
|
||||
0x61}}, /* 0x12 */
|
||||
{{0x83, 0x63, 0x63, 0x87, 0x6e, 0x19, 0x81, 0xf0,
|
||||
0x58, 0x8b, 0x57, 0x57, 0x82, 0x20, 0x00, 0x06,
|
||||
0x61}}, /* 0x13 */
|
||||
{{0x85, 0x63, 0x63, 0x89, 0x6f, 0x1a, 0x91, 0xf0,
|
||||
0x58, 0x8b, 0x57, 0x57, 0x92, 0x20, 0x00, 0x06,
|
||||
0x61}}, /* 0x14 */
|
||||
{{0x99, 0x7f, 0x7f, 0x9d, 0x84, 0x1a, 0x96, 0x1f,
|
||||
0x7f, 0x83, 0x7f, 0x7f, 0x97, 0x10, 0x00, 0x02,
|
||||
0x00}}, /* 0x15 */
|
||||
{{0xa3, 0x7f, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
|
||||
0x02, 0x88, 0xff, 0xff, 0x25, 0x10, 0x00, 0x02,
|
||||
0x01}}, /* 0x16 */
|
||||
{{0xa1, 0x7f, 0x7f, 0x85, 0x86, 0x97, 0x24, 0xf5,
|
||||
0x02, 0x88, 0xff, 0xff, 0x25, 0x10, 0x00, 0x02,
|
||||
0x01}}, /* 0x17 */
|
||||
{{0x9f, 0x7f, 0x7f, 0x83, 0x85, 0x91, 0x1e, 0xf5,
|
||||
0x00, 0x83, 0xff, 0xff, 0x1f, 0x10, 0x00, 0x02,
|
||||
0x01}}, /* 0x18 */
|
||||
{{0xa7, 0x7f, 0x7f, 0x8b, 0x89, 0x95, 0x26, 0xf5,
|
||||
0x00, 0x83, 0xff, 0xff, 0x27, 0x10, 0x00, 0x02,
|
||||
0x01}}, /* 0x19 */
|
||||
{{0xa9, 0x7f, 0x7f, 0x8d, 0x8c, 0x9a, 0x2c, 0xf5,
|
||||
0x00, 0x83, 0xff, 0xff, 0x2d, 0x14, 0x00, 0x02,
|
||||
0x62}}, /* 0x1a */
|
||||
{{0xab, 0x7f, 0x7f, 0x8f, 0x8d, 0x9b, 0x35, 0xf5,
|
||||
0x00, 0x83, 0xff, 0xff, 0x36, 0x14, 0x00, 0x02,
|
||||
0x62}}, /* 0x1b */
|
||||
{{0xcf, 0x9f, 0x9f, 0x93, 0xb2, 0x01, 0x14, 0xba,
|
||||
0x00, 0x83, 0xff, 0xff, 0x15, 0x00, 0x00, 0x03,
|
||||
0x00}}, /* 0x1c */
|
||||
{{0xce, 0x9f, 0x9f, 0x92, 0xa9, 0x17, 0x28, 0x5a,
|
||||
0x00, 0x83, 0xff, 0xff, 0x29, 0x09, 0x00, 0x07,
|
||||
0x01}}, /* 0x1d */
|
||||
{{0xce, 0x9f, 0x9f, 0x92, 0xa5, 0x17, 0x28, 0x5a,
|
||||
0x00, 0x83, 0xff, 0xff, 0x29, 0x09, 0x00, 0x07,
|
||||
0x01}}, /* 0x1e */
|
||||
{{0xd3, 0x9f, 0x9f, 0x97, 0xab, 0x1f, 0x2e, 0x5a,
|
||||
0x00, 0x83, 0xff, 0xff, 0x2f, 0x09, 0x00, 0x07,
|
||||
0x01}}, /* 0x1f */
|
||||
{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
|
||||
0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
|
||||
0x00}}, /* 0x20 */
|
||||
{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
|
||||
0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
|
||||
0x00}}, /* 0x21 */
|
||||
{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
|
||||
0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
|
||||
0x00}}, /* 0x22 */
|
||||
{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
|
||||
0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
|
||||
0x00}}, /* 0x23 */
|
||||
{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
|
||||
0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
|
||||
0x00}}, /* 0x24 */
|
||||
{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
|
||||
0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
|
||||
0x00}}, /* 0x25 */
|
||||
{{0x09, 0xc7, 0xc7, 0x8d, 0xd3, 0x0b, 0xe0, 0x10,
|
||||
0xb0, 0x83, 0xaf, 0xaf, 0xe1, 0x2f, 0x01, 0x04,
|
||||
0x00}}, /* 0x26 */
|
||||
{{0x40, 0xef, 0xef, 0x84, 0x03, 0x1d, 0xda, 0x1f,
|
||||
0xa0, 0x83, 0x9f, 0x9f, 0xdb, 0x1f, 0x41, 0x01,
|
||||
0x00}}, /* 0x27 */
|
||||
{{0x43, 0xef, 0xef, 0x87, 0x06, 0x00, 0xd4, 0x1f,
|
||||
0xa0, 0x83, 0x9f, 0x9f, 0xd5, 0x1f, 0x41, 0x05,
|
||||
0x63}}, /* 0x28 */
|
||||
{{0x45, 0xef, 0xef, 0x89, 0x07, 0x01, 0xd9, 0x1f,
|
||||
0xa0, 0x83, 0x9f, 0x9f, 0xda, 0x1f, 0x41, 0x05,
|
||||
0x63}}, /* 0x29 */
|
||||
{{0x40, 0xef, 0xef, 0x84, 0x03, 0x1d, 0xda, 0x1f,
|
||||
0xa0, 0x83, 0x9f, 0x9f, 0xdb, 0x1f, 0x41, 0x01,
|
||||
0x00}}, /* 0x2a */
|
||||
{{0x40, 0xef, 0xef, 0x84, 0x03, 0x1d, 0xda, 0x1f,
|
||||
0xa0, 0x83, 0x9f, 0x9f, 0xdb, 0x1f, 0x41, 0x01,
|
||||
0x00}}, /* 0x2b */
|
||||
{{0x40, 0xef, 0xef, 0x84, 0x03, 0x1d, 0xda, 0x1f,
|
||||
0xa0, 0x83, 0x9f, 0x9f, 0xdb, 0x1f, 0x41, 0x01,
|
||||
0x00}}, /* 0x2c */
|
||||
{{0x59, 0xff, 0xff, 0x9d, 0x17, 0x13, 0x33, 0xba,
|
||||
0x00, 0x83, 0xff, 0xff, 0x34, 0x0f, 0x41, 0x05,
|
||||
0x44}}, /* 0x2d */
|
||||
{{0x5b, 0xff, 0xff, 0x9f, 0x18, 0x14, 0x38, 0xba,
|
||||
0x00, 0x83, 0xff, 0xff, 0x39, 0x0f, 0x41, 0x05,
|
||||
0x44}}, /* 0x2e */
|
||||
{{0x5b, 0xff, 0xff, 0x9f, 0x18, 0x14, 0x3d, 0xba,
|
||||
0x00, 0x83, 0xff, 0xff, 0x3e, 0x0f, 0x41, 0x05,
|
||||
0x44}}, /* 0x2f */
|
||||
{{0x5d, 0xff, 0xff, 0x81, 0x19, 0x95, 0x41, 0xba,
|
||||
0x00, 0x84, 0xff, 0xff, 0x42, 0x0f, 0x41, 0x05,
|
||||
0x44}}, /* 0x30 */
|
||||
{{0x55, 0xff, 0xff, 0x99, 0x0d, 0x0c, 0x3e, 0xba,
|
||||
0x00, 0x84, 0xff, 0xff, 0x3f, 0x0f, 0x41, 0x05,
|
||||
0x00}}, /* 0x31 */
|
||||
{{0x7f, 0x63, 0x63, 0x83, 0x6c, 0x1c, 0x72, 0xba,
|
||||
0x27, 0x8b, 0xdf, 0xdf, 0x73, 0x00, 0x00, 0x06,
|
||||
0x01}}, /* 0x32 */
|
||||
{{0x7f, 0x63, 0x63, 0x83, 0x69, 0x13, 0x6f, 0xba,
|
||||
0x26, 0x89, 0xdf, 0xdf, 0x6f, 0x00, 0x00, 0x06,
|
||||
0x01}}, /* 0x33 */
|
||||
{{0x7f, 0x63, 0x63, 0x82, 0x6b, 0x13, 0x75, 0xba,
|
||||
0x29, 0x8c, 0xdf, 0xdf, 0x75, 0x00, 0x00, 0x06,
|
||||
0x01}}, /* 0x34 */
|
||||
{{0xa3, 0x7f, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf1,
|
||||
0xaf, 0x85, 0x3f, 0x3f, 0x25, 0x30, 0x00, 0x02,
|
||||
0x01}}, /* 0x35 */
|
||||
{{0x9f, 0x7f, 0x7f, 0x83, 0x85, 0x91, 0x1e, 0xf1,
|
||||
0xad, 0x81, 0x3f, 0x3f, 0x1f, 0x30, 0x00, 0x02,
|
||||
0x01}}, /* 0x36 */
|
||||
{{0xa7, 0x7f, 0x7f, 0x88, 0x89, 0x95, 0x26, 0xf1,
|
||||
0xb1, 0x85, 0x3f, 0x3f, 0x27, 0x30, 0x00, 0x02,
|
||||
0x01}}, /* 0x37 */
|
||||
{{0xce, 0x9f, 0x9f, 0x92, 0xa9, 0x17, 0x28, 0xc4,
|
||||
0x7a, 0x8e, 0xcf, 0xcf, 0x29, 0x21, 0x00, 0x07,
|
||||
0x01}}, /* 0x38 */
|
||||
{{0xce, 0x9f, 0x9f, 0x92, 0xa5, 0x17, 0x28, 0xd4,
|
||||
0x7a, 0x8e, 0xcf, 0xcf, 0x29, 0x21, 0x00, 0x07,
|
||||
0x01}}, /* 0x39 */
|
||||
{{0xd3, 0x9f, 0x9f, 0x97, 0xab, 0x1f, 0x2e, 0xd4,
|
||||
0x7d, 0x81, 0xcf, 0xcf, 0x2f, 0x21, 0x00, 0x07,
|
||||
0x01}}, /* 0x3a */
|
||||
{{0xdc, 0x9f, 0x9f, 0x80, 0xaf, 0x9d, 0xe6, 0xff,
|
||||
0xc0, 0x83, 0xbf, 0xbf, 0xe7, 0x10, 0x00, 0x07,
|
||||
0x01}}, /* 0x3b */
|
||||
{{0x6b, 0x59, 0x59, 0x8f, 0x5e, 0x8c, 0x0b, 0x3e,
|
||||
0xe9, 0x8b, 0xdf, 0xe7, 0x04, 0x00, 0x00, 0x05,
|
||||
0x00}}, /* 0x3c */
|
||||
{{0x6d, 0x59, 0x59, 0x91, 0x60, 0x89, 0x53, 0xf0,
|
||||
0x41, 0x84, 0x3f, 0x3f, 0x54, 0x00, 0x00, 0x05,
|
||||
0x41}}, /* 0x3d */
|
||||
{{0x86, 0x6a, 0x6a, 0x8a, 0x74, 0x06, 0x8c, 0x15,
|
||||
0x4f, 0x83, 0xef, 0xef, 0x8d, 0x30, 0x00, 0x02,
|
||||
0x00}}, /* 0x3e */
|
||||
{{0x81, 0x6a, 0x6a, 0x85, 0x70, 0x00, 0x0f, 0x3e,
|
||||
0xeb, 0x8e, 0xdf, 0xdf, 0x10, 0x00, 0x00, 0x02,
|
||||
0x00}}, /* 0x3f */
|
||||
{{0xa3, 0x7f, 0x7f, 0x87, 0x86, 0x97, 0x1e, 0xf1,
|
||||
0xae, 0x85, 0x57, 0x57, 0x1f, 0x30, 0x00, 0x02,
|
||||
0x01}}, /* 0x40 */
|
||||
{{0xa3, 0x7f, 0x7f, 0x87, 0x86, 0x97, 0x24, 0xf5,
|
||||
0x02, 0x88, 0xff, 0xff, 0x25, 0x10, 0x00, 0x02,
|
||||
0x01}}, /* 0x41 */
|
||||
{{0xce, 0x9f, 0x9f, 0x92, 0xa9, 0x17, 0x20, 0xf5,
|
||||
0x03, 0x88, 0xff, 0xff, 0x21, 0x10, 0x00, 0x07,
|
||||
0x01}}, /* 0x42 */
|
||||
{{0xe6, 0xae, 0xae, 0x8a, 0xbd, 0x90, 0x3d, 0x10,
|
||||
0x1a, 0x8d, 0x19, 0x19, 0x3e, 0x2f, 0x00, 0x03,
|
||||
0x00}}, /* 0x43 */
|
||||
{{0xc3, 0x8f, 0x8f, 0x87, 0x9b, 0x0b, 0x82, 0xef,
|
||||
0x60, 0x83, 0x5f, 0x5f, 0x83, 0x10, 0x00, 0x07,
|
||||
0x01}}, /* 0x44 */
|
||||
{{0x86, 0x69, 0x69, 0x8A, 0x74, 0x06, 0x8C, 0x15,
|
||||
0x4F, 0x83, 0xEF, 0xEF, 0x8D, 0x30, 0x00, 0x02,
|
||||
0x00}}, /* 0x45 */
|
||||
{{0x83, 0x69, 0x69, 0x87, 0x6f, 0x1d, 0x03, 0x3E,
|
||||
0xE5, 0x8d, 0xDF, 0xe4, 0x04, 0x00, 0x00, 0x06,
|
||||
0x00}}, /* 0x46 */
|
||||
{{0x86, 0x6A, 0x6A, 0x8A, 0x74, 0x06, 0x8C, 0x15,
|
||||
0x4F, 0x83, 0xEF, 0xEF, 0x8D, 0x30, 0x00, 0x02,
|
||||
0x00}}, /* 0x47 */
|
||||
{{0x81, 0x6A, 0x6A, 0x85, 0x70, 0x00, 0x0F, 0x3E,
|
||||
0xEB, 0x8E, 0xDF, 0xDF, 0x10, 0x00, 0x00, 0x02,
|
||||
0x00}}, /* 0x48 */
|
||||
{{0xdd, 0xa9, 0xa9, 0x81, 0xb4, 0x97, 0x26, 0xfd,
|
||||
0x01, 0x8d, 0xff, 0x00, 0x27, 0x10, 0x00, 0x03,
|
||||
0x01}}, /* 0x49 */
|
||||
{{0xd9, 0x8f, 0x8f, 0x9d, 0xba, 0x0a, 0x8a, 0xff,
|
||||
0x60, 0x8b, 0x5f, 0x5f, 0x8b, 0x10, 0x00, 0x03,
|
||||
0x01}}, /* 0x4a */
|
||||
{{0xea, 0xae, 0xae, 0x8e, 0xba, 0x82, 0x40, 0x10,
|
||||
0x1b, 0x87, 0x19, 0x1a, 0x41, 0x0f, 0x00, 0x03,
|
||||
0x00}}, /* 0x4b */
|
||||
{{0xd3, 0x9f, 0x9f, 0x97, 0xab, 0x1f, 0xf1, 0xff,
|
||||
0xc0, 0x83, 0xbf, 0xbf, 0xf2, 0x10, 0x00, 0x07,
|
||||
0x01}}, /* 0x4c */
|
||||
{{0x75, 0x5f, 0x5f, 0x99, 0x66, 0x90, 0x53, 0xf0,
|
||||
0x41, 0x84, 0x3f, 0x3f, 0x54, 0x00, 0x00, 0x05,
|
||||
0x41}},
|
||||
{{0x2d, 0x27, 0x28, 0x90, 0x2c, 0x80, 0x0b, 0x3e,
|
||||
0xe9, 0x8b, 0xdf, 0xe7, 0x04, 0x00, 0x00, 0x00,
|
||||
0x00}}, /* 0x4e */
|
||||
{{0xcd, 0x9f, 0x9f, 0x91, 0xab, 0x1c, 0x3a, 0xff,
|
||||
0x20, 0x83, 0x1f, 0x1f, 0x3b, 0x10, 0x00, 0x07,
|
||||
0x21}}, /* 0x4f */
|
||||
{{0x15, 0xd1, 0xd1, 0x99, 0xe2, 0x19, 0x3d, 0x10,
|
||||
0x1a, 0x8d, 0x19, 0x19, 0x3e, 0x2f, 0x01, 0x0c,
|
||||
0x20}}, /* 0x50 */
|
||||
{{0x0e, 0xef, 0xef, 0x92, 0xfe, 0x03, 0x30, 0xf0,
|
||||
0x1e, 0x83, 0x1b, 0x1c, 0x31, 0x00, 0x01, 0x00,
|
||||
0x61}}, /* 0x51 */
|
||||
{{0x85, 0x77, 0x77, 0x89, 0x7d, 0x01, 0x31, 0xf0,
|
||||
0x1e, 0x84, 0x1b, 0x1c, 0x32, 0x00, 0x00, 0x02,
|
||||
0x41}}, /* 0x52 */
|
||||
{{0x87, 0x77, 0x77, 0x8b, 0x81, 0x0b, 0x68, 0xf0,
|
||||
0x5a, 0x80, 0x57, 0x57, 0x69, 0x00, 0x00, 0x02,
|
||||
0x01}}, /* 0x53 */
|
||||
{{0xcd, 0x8f, 0x8f, 0x91, 0x9b, 0x1b, 0x7a, 0xff,
|
||||
0x64, 0x8c, 0x5f, 0x62, 0x7b, 0x10, 0x00, 0x07,
|
||||
0x41}} /* 0x54 */
|
||||
};
|
||||
|
||||
static const struct SiS_VCLKData SiSUSB_VCLKData[] = {
|
||||
{0x1b, 0xe1, 25}, /* 0x00 */
|
||||
{0x4e, 0xe4, 28}, /* 0x01 */
|
||||
{0x57, 0xe4, 31}, /* 0x02 */
|
||||
{0xc3, 0xc8, 36}, /* 0x03 */
|
||||
{0x42, 0xe2, 40}, /* 0x04 */
|
||||
{0xfe, 0xcd, 43}, /* 0x05 */
|
||||
{0x5d, 0xc4, 44}, /* 0x06 */
|
||||
{0x52, 0xe2, 49}, /* 0x07 */
|
||||
{0x53, 0xe2, 50}, /* 0x08 */
|
||||
{0x74, 0x67, 52}, /* 0x09 */
|
||||
{0x6d, 0x66, 56}, /* 0x0a */
|
||||
{0x5a, 0x64, 65}, /* 0x0b */
|
||||
{0x46, 0x44, 67}, /* 0x0c */
|
||||
{0xb1, 0x46, 68}, /* 0x0d */
|
||||
{0xd3, 0x4a, 72}, /* 0x0e */
|
||||
{0x29, 0x61, 75}, /* 0x0f */
|
||||
{0x6e, 0x46, 76}, /* 0x10 */
|
||||
{0x2b, 0x61, 78}, /* 0x11 */
|
||||
{0x31, 0x42, 79}, /* 0x12 */
|
||||
{0xab, 0x44, 83}, /* 0x13 */
|
||||
{0x46, 0x25, 84}, /* 0x14 */
|
||||
{0x78, 0x29, 86}, /* 0x15 */
|
||||
{0x62, 0x44, 94}, /* 0x16 */
|
||||
{0x2b, 0x41, 104}, /* 0x17 */
|
||||
{0x3a, 0x23, 105}, /* 0x18 */
|
||||
{0x70, 0x44, 108}, /* 0x19 */
|
||||
{0x3c, 0x23, 109}, /* 0x1a */
|
||||
{0x5e, 0x43, 113}, /* 0x1b */
|
||||
{0xbc, 0x44, 116}, /* 0x1c */
|
||||
{0xe0, 0x46, 132}, /* 0x1d */
|
||||
{0x54, 0x42, 135}, /* 0x1e */
|
||||
{0xea, 0x2a, 139}, /* 0x1f */
|
||||
{0x41, 0x22, 157}, /* 0x20 */
|
||||
{0x70, 0x24, 162}, /* 0x21 */
|
||||
{0x30, 0x21, 175}, /* 0x22 */
|
||||
{0x4e, 0x22, 189}, /* 0x23 */
|
||||
{0xde, 0x26, 194}, /* 0x24 */
|
||||
{0x62, 0x06, 202}, /* 0x25 */
|
||||
{0x3f, 0x03, 229}, /* 0x26 */
|
||||
{0xb8, 0x06, 234}, /* 0x27 */
|
||||
{0x34, 0x02, 253}, /* 0x28 */
|
||||
{0x58, 0x04, 255}, /* 0x29 */
|
||||
{0x24, 0x01, 265}, /* 0x2a */
|
||||
{0x9b, 0x02, 267}, /* 0x2b */
|
||||
{0x70, 0x05, 270}, /* 0x2c */
|
||||
{0x25, 0x01, 272}, /* 0x2d */
|
||||
{0x9c, 0x02, 277}, /* 0x2e */
|
||||
{0x27, 0x01, 286}, /* 0x2f */
|
||||
{0x3c, 0x02, 291}, /* 0x30 */
|
||||
{0xef, 0x0a, 292}, /* 0x31 */
|
||||
{0xf6, 0x0a, 310}, /* 0x32 */
|
||||
{0x95, 0x01, 315}, /* 0x33 */
|
||||
{0xf0, 0x09, 324}, /* 0x34 */
|
||||
{0xfe, 0x0a, 331}, /* 0x35 */
|
||||
{0xf3, 0x09, 332}, /* 0x36 */
|
||||
{0xea, 0x08, 340}, /* 0x37 */
|
||||
{0xe8, 0x07, 376}, /* 0x38 */
|
||||
{0xde, 0x06, 389}, /* 0x39 */
|
||||
{0x52, 0x2a, 54}, /* 0x3a 301 TV */
|
||||
{0x52, 0x6a, 27}, /* 0x3b 301 TV */
|
||||
{0x62, 0x24, 70}, /* 0x3c 301 TV */
|
||||
{0x62, 0x64, 70}, /* 0x3d 301 TV */
|
||||
{0xa8, 0x4c, 30}, /* 0x3e 301 TV */
|
||||
{0x20, 0x26, 33}, /* 0x3f 301 TV */
|
||||
{0x31, 0xc2, 39}, /* 0x40 */
|
||||
{0x60, 0x36, 30}, /* 0x41 Chrontel */
|
||||
{0x40, 0x4a, 28}, /* 0x42 Chrontel */
|
||||
{0x9f, 0x46, 44}, /* 0x43 Chrontel */
|
||||
{0x97, 0x2c, 26}, /* 0x44 */
|
||||
{0x44, 0xe4, 25}, /* 0x45 Chrontel */
|
||||
{0x7e, 0x32, 47}, /* 0x46 Chrontel */
|
||||
{0x8a, 0x24, 31}, /* 0x47 Chrontel */
|
||||
{0x97, 0x2c, 26}, /* 0x48 Chrontel */
|
||||
{0xce, 0x3c, 39}, /* 0x49 */
|
||||
{0x52, 0x4a, 36}, /* 0x4a Chrontel */
|
||||
{0x34, 0x61, 95}, /* 0x4b */
|
||||
{0x78, 0x27, 108}, /* 0x4c - was 102 */
|
||||
{0x66, 0x43, 123}, /* 0x4d Modes 0x26-0x28 (1400x1050) */
|
||||
{0x41, 0x4e, 21}, /* 0x4e */
|
||||
{0xa1, 0x4a, 29}, /* 0x4f Chrontel */
|
||||
{0x19, 0x42, 42}, /* 0x50 */
|
||||
{0x54, 0x46, 58}, /* 0x51 Chrontel */
|
||||
{0x25, 0x42, 61}, /* 0x52 */
|
||||
{0x44, 0x44, 66}, /* 0x53 Chrontel */
|
||||
{0x3a, 0x62, 70}, /* 0x54 Chrontel */
|
||||
{0x62, 0xc6, 34}, /* 0x55 848x480-60 */
|
||||
{0x6a, 0xc6, 37}, /* 0x56 848x480-75 - TEMP */
|
||||
{0xbf, 0xc8, 35}, /* 0x57 856x480-38i,60 */
|
||||
{0x30, 0x23, 88}, /* 0x58 1360x768-62 (is 60Hz!) */
|
||||
{0x52, 0x07, 149}, /* 0x59 1280x960-85 */
|
||||
{0x56, 0x07, 156}, /* 0x5a 1400x1050-75 */
|
||||
{0x70, 0x29, 81}, /* 0x5b 1280x768 LCD */
|
||||
{0x45, 0x25, 83}, /* 0x5c 1280x800 */
|
||||
{0x70, 0x0a, 147}, /* 0x5d 1680x1050 */
|
||||
{0x70, 0x24, 162}, /* 0x5e 1600x1200 */
|
||||
{0x5a, 0x64, 65}, /* 0x5f 1280x720 - temp */
|
||||
{0x63, 0x46, 68}, /* 0x60 1280x768_2 */
|
||||
{0x31, 0x42, 79}, /* 0x61 1280x768_3 - temp */
|
||||
{0, 0, 0}, /* 0x62 - custom (will be filled out at run-time) */
|
||||
{0x5a, 0x64, 65}, /* 0x63 1280x720 (LCD LVDS) */
|
||||
{0x70, 0x28, 90}, /* 0x64 1152x864@60 */
|
||||
{0x41, 0xc4, 32}, /* 0x65 848x480@60 */
|
||||
{0x5c, 0xc6, 32}, /* 0x66 856x480@60 */
|
||||
{0x76, 0xe7, 27}, /* 0x67 720x480@60 */
|
||||
{0x5f, 0xc6, 33}, /* 0x68 720/768x576@60 */
|
||||
{0x52, 0x27, 75}, /* 0x69 1920x1080i 60Hz interlaced */
|
||||
{0x7c, 0x6b, 38}, /* 0x6a 960x540@60 */
|
||||
{0xe3, 0x56, 41}, /* 0x6b 960x600@60 */
|
||||
{0x45, 0x25, 83}, /* 0x6c 1280x800 */
|
||||
{0x70, 0x28, 90}, /* 0x6d 1152x864@60 */
|
||||
{0x15, 0xe1, 20}, /* 0x6e 640x400@60 (fake, not actually used) */
|
||||
{0x5f, 0xc6, 33}, /* 0x6f 720x576@60 */
|
||||
{0x37, 0x5a, 10}, /* 0x70 320x200@60 (fake, not actually used) */
|
||||
{0x2b, 0xc2, 35} /* 0x71 768@576@60 */
|
||||
};
|
||||
|
||||
int SiSUSBSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
|
||||
int SiSUSBSetVESAMode(struct SiS_Private *SiS_Pr, unsigned short VModeNo);
|
||||
|
||||
extern int sisusb_setreg(struct sisusb_usb_data *sisusb, int port, u8 data);
|
||||
extern int sisusb_getreg(struct sisusb_usb_data *sisusb, int port, u8 * data);
|
||||
extern int sisusb_setidxreg(struct sisusb_usb_data *sisusb, int port,
|
||||
u8 index, u8 data);
|
||||
extern int sisusb_getidxreg(struct sisusb_usb_data *sisusb, int port,
|
||||
u8 index, u8 * data);
|
||||
extern int sisusb_setidxregandor(struct sisusb_usb_data *sisusb, int port,
|
||||
u8 idx, u8 myand, u8 myor);
|
||||
extern int sisusb_setidxregor(struct sisusb_usb_data *sisusb, int port,
|
||||
u8 index, u8 myor);
|
||||
extern int sisusb_setidxregand(struct sisusb_usb_data *sisusb, int port,
|
||||
u8 idx, u8 myand);
|
||||
|
||||
void sisusb_delete(struct kref *kref);
|
||||
int sisusb_writeb(struct sisusb_usb_data *sisusb, u32 adr, u8 data);
|
||||
int sisusb_readb(struct sisusb_usb_data *sisusb, u32 adr, u8 * data);
|
||||
int sisusb_copy_memory(struct sisusb_usb_data *sisusb, char *src,
|
||||
u32 dest, int length, size_t * bytes_written);
|
||||
int sisusb_reset_text_mode(struct sisusb_usb_data *sisusb, int init);
|
||||
int sisusbcon_do_font_op(struct sisusb_usb_data *sisusb, int set, int slot,
|
||||
u8 * arg, int cmapsz, int ch512, int dorecalc,
|
||||
struct vc_data *c, int fh, int uplock);
|
||||
void sisusb_set_cursor(struct sisusb_usb_data *sisusb, unsigned int location);
|
||||
int sisusb_console_init(struct sisusb_usb_data *sisusb, int first, int last);
|
||||
void sisusb_console_exit(struct sisusb_usb_data *sisusb);
|
||||
void sisusb_init_concode(void);
|
||||
|
||||
#endif
|
||||
161
drivers/usb/misc/sisusbvga/sisusb_struct.h
Normal file
161
drivers/usb/misc/sisusbvga/sisusb_struct.h
Normal file
|
|
@ -0,0 +1,161 @@
|
|||
/*
|
||||
* General structure definitions for universal mode switching modules
|
||||
*
|
||||
* Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
|
||||
*
|
||||
* If distributed as part of the Linux kernel, the following license terms
|
||||
* apply:
|
||||
*
|
||||
* * This program is free software; you can redistribute it and/or modify
|
||||
* * it under the terms of the GNU General Public License as published by
|
||||
* * the Free Software Foundation; either version 2 of the named License,
|
||||
* * or any later version.
|
||||
* *
|
||||
* * This program is distributed in the hope that it will be useful,
|
||||
* * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* * GNU General Public License for more details.
|
||||
* *
|
||||
* * You should have received a copy of the GNU General Public License
|
||||
* * along with this program; if not, write to the Free Software
|
||||
* * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
|
||||
*
|
||||
* Otherwise, the following license terms apply:
|
||||
*
|
||||
* * Redistribution and use in source and binary forms, with or without
|
||||
* * modification, are permitted provided that the following conditions
|
||||
* * are met:
|
||||
* * 1) Redistributions of source code must retain the above copyright
|
||||
* * notice, this list of conditions and the following disclaimer.
|
||||
* * 2) Redistributions in binary form must reproduce the above copyright
|
||||
* * notice, this list of conditions and the following disclaimer in the
|
||||
* * documentation and/or other materials provided with the distribution.
|
||||
* * 3) The name of the author may not be used to endorse or promote products
|
||||
* * derived from this software without specific prior written permission.
|
||||
* *
|
||||
* * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* Author: Thomas Winischhofer <thomas@winischhofer.net>
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _SISUSB_STRUCT_H_
|
||||
#define _SISUSB_STRUCT_H_
|
||||
|
||||
struct SiS_St {
|
||||
unsigned char St_ModeID;
|
||||
unsigned short St_ModeFlag;
|
||||
unsigned char St_StTableIndex;
|
||||
unsigned char St_CRT2CRTC;
|
||||
unsigned char St_ResInfo;
|
||||
unsigned char VB_StTVFlickerIndex;
|
||||
unsigned char VB_StTVEdgeIndex;
|
||||
unsigned char VB_StTVYFilterIndex;
|
||||
unsigned char St_PDC;
|
||||
};
|
||||
|
||||
struct SiS_StandTable {
|
||||
unsigned char CRT_COLS;
|
||||
unsigned char ROWS;
|
||||
unsigned char CHAR_HEIGHT;
|
||||
unsigned short CRT_LEN;
|
||||
unsigned char SR[4];
|
||||
unsigned char MISC;
|
||||
unsigned char CRTC[0x19];
|
||||
unsigned char ATTR[0x14];
|
||||
unsigned char GRC[9];
|
||||
};
|
||||
|
||||
struct SiS_StResInfo_S {
|
||||
unsigned short HTotal;
|
||||
unsigned short VTotal;
|
||||
};
|
||||
|
||||
struct SiS_Ext {
|
||||
unsigned char Ext_ModeID;
|
||||
unsigned short Ext_ModeFlag;
|
||||
unsigned short Ext_VESAID;
|
||||
unsigned char Ext_RESINFO;
|
||||
unsigned char VB_ExtTVFlickerIndex;
|
||||
unsigned char VB_ExtTVEdgeIndex;
|
||||
unsigned char VB_ExtTVYFilterIndex;
|
||||
unsigned char VB_ExtTVYFilterIndexROM661;
|
||||
unsigned char REFindex;
|
||||
char ROMMODEIDX661;
|
||||
};
|
||||
|
||||
struct SiS_Ext2 {
|
||||
unsigned short Ext_InfoFlag;
|
||||
unsigned char Ext_CRT1CRTC;
|
||||
unsigned char Ext_CRTVCLK;
|
||||
unsigned char Ext_CRT2CRTC;
|
||||
unsigned char Ext_CRT2CRTC_NS;
|
||||
unsigned char ModeID;
|
||||
unsigned short XRes;
|
||||
unsigned short YRes;
|
||||
unsigned char Ext_PDC;
|
||||
unsigned char Ext_FakeCRT2CRTC;
|
||||
unsigned char Ext_FakeCRT2Clk;
|
||||
};
|
||||
|
||||
struct SiS_CRT1Table {
|
||||
unsigned char CR[17];
|
||||
};
|
||||
|
||||
struct SiS_VCLKData {
|
||||
unsigned char SR2B, SR2C;
|
||||
unsigned short CLOCK;
|
||||
};
|
||||
|
||||
struct SiS_ModeResInfo {
|
||||
unsigned short HTotal;
|
||||
unsigned short VTotal;
|
||||
unsigned char XChar;
|
||||
unsigned char YChar;
|
||||
};
|
||||
|
||||
struct SiS_Private {
|
||||
void *sisusb;
|
||||
|
||||
unsigned long IOAddress;
|
||||
|
||||
unsigned long SiS_P3c4;
|
||||
unsigned long SiS_P3d4;
|
||||
unsigned long SiS_P3c0;
|
||||
unsigned long SiS_P3ce;
|
||||
unsigned long SiS_P3c2;
|
||||
unsigned long SiS_P3ca;
|
||||
unsigned long SiS_P3c6;
|
||||
unsigned long SiS_P3c7;
|
||||
unsigned long SiS_P3c8;
|
||||
unsigned long SiS_P3c9;
|
||||
unsigned long SiS_P3cb;
|
||||
unsigned long SiS_P3cc;
|
||||
unsigned long SiS_P3cd;
|
||||
unsigned long SiS_P3da;
|
||||
unsigned long SiS_Part1Port;
|
||||
|
||||
unsigned char SiS_MyCR63;
|
||||
unsigned short SiS_CRT1Mode;
|
||||
unsigned short SiS_ModeType;
|
||||
unsigned short SiS_SetFlag;
|
||||
|
||||
const struct SiS_StandTable *SiS_StandTable;
|
||||
const struct SiS_St *SiS_SModeIDTable;
|
||||
const struct SiS_Ext *SiS_EModeIDTable;
|
||||
const struct SiS_Ext2 *SiS_RefIndex;
|
||||
const struct SiS_CRT1Table *SiS_CRT1Table;
|
||||
const struct SiS_VCLKData *SiS_VCLKData;
|
||||
const struct SiS_ModeResInfo *SiS_ModeResInfo;
|
||||
};
|
||||
|
||||
#endif
|
||||
Loading…
Add table
Add a link
Reference in a new issue