mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-08 17:18:05 -04:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
321
drivers/video/fbdev/bfin_adv7393fb.h
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321
drivers/video/fbdev/bfin_adv7393fb.h
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/*
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* Frame buffer driver for ADV7393/2 video encoder
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*
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* Copyright 2006-2009 Analog Devices Inc.
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* Licensed under the GPL-2 or late.
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*/
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#ifndef __BFIN_ADV7393FB_H__
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#define __BFIN_ADV7393FB_H__
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#define BFIN_LCD_NBR_PALETTE_ENTRIES 256
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#ifdef CONFIG_NTSC
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# define VMODE 0
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#endif
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#ifdef CONFIG_PAL
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# define VMODE 1
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#endif
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#ifdef CONFIG_NTSC_640x480
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# define VMODE 2
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#endif
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#ifdef CONFIG_PAL_640x480
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# define VMODE 3
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#endif
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#ifdef CONFIG_NTSC_YCBCR
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# define VMODE 4
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#endif
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#ifdef CONFIG_PAL_YCBCR
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# define VMODE 5
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#endif
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#ifndef VMODE
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# define VMODE 1
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#endif
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#ifdef CONFIG_ADV7393_2XMEM
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# define VMEM 2
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#else
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# define VMEM 1
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#endif
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#if defined(CONFIG_BF537) || defined(CONFIG_BF536) || defined(CONFIG_BF534)
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# define DMA_CFG_VAL 0x7935 /* Set Sync Bit */
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# define VB_DUMMY_MEMORY_SOURCE L1_DATA_B_START
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#else
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# define DMA_CFG_VAL 0x7915
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# define VB_DUMMY_MEMORY_SOURCE BOOT_ROM_START
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#endif
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enum {
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DESTRUCT,
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BUILD,
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};
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enum {
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POWER_ON,
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POWER_DOWN,
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BLANK_ON,
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BLANK_OFF,
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};
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#define DRIVER_NAME "bfin-adv7393"
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struct adv7393fb_modes {
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const s8 name[25]; /* Full name */
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u16 xres; /* Active Horizonzal Pixels */
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u16 yres; /* Active Vertical Pixels */
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u16 bpp;
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u16 vmode;
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u16 a_lines; /* Active Lines per Field */
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u16 vb1_lines; /* Vertical Blanking Field 1 Lines */
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u16 vb2_lines; /* Vertical Blanking Field 2 Lines */
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u16 tot_lines; /* Total Lines per Frame */
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u16 boeft_blank; /* Before Odd/Even Field Transition No. of Blank Pixels */
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u16 aoeft_blank; /* After Odd/Even Field Transition No. of Blank Pixels */
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const s8 *adv7393_i2c_initd;
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u16 adv7393_i2c_initd_len;
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};
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static const u8 init_NTSC_TESTPATTERN[] = {
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0x00, 0x1E, /* Power up all DACs and PLL */
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0x01, 0x00, /* SD-Only Mode */
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0x80, 0x10, /* SSAF Luma Filter Enabled, NTSC Mode */
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0x82, 0xCB, /* Step control on, pixel data valid, pedestal on, PrPb SSAF on, CVBS/YC output */
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0x84, 0x40, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
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};
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static const u8 init_NTSC[] = {
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0x00, 0x1E, /* Power up all DACs and PLL */
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0xC3, 0x26, /* Program RGB->YCrCb Color Space conversion matrix */
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0xC5, 0x12, /* Program RGB->YCrCb Color Space conversion matrix */
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0xC2, 0x4A, /* Program RGB->YCrCb Color Space conversion matrix */
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0xC6, 0x5E, /* Program RGB->YCrCb Color Space conversion matrix */
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0xBD, 0x19, /* Program RGB->YCrCb Color Space conversion matrix */
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0xBF, 0x42, /* Program RGB->YCrCb Color Space conversion matrix */
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0x8C, 0x1F, /* NTSC Subcarrier Frequency */
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0x8D, 0x7C, /* NTSC Subcarrier Frequency */
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0x8E, 0xF0, /* NTSC Subcarrier Frequency */
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0x8F, 0x21, /* NTSC Subcarrier Frequency */
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0x01, 0x00, /* SD-Only Mode */
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0x80, 0x30, /* SSAF Luma Filter Enabled, NTSC Mode */
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0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
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0x87, 0x80, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
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0x86, 0x82,
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0x8B, 0x11,
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0x88, 0x20,
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0x8A, 0x0d,
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};
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static const u8 init_PAL[] = {
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0x00, 0x1E, /* Power up all DACs and PLL */
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0xC3, 0x26, /* Program RGB->YCrCb Color Space conversion matrix */
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0xC5, 0x12, /* Program RGB->YCrCb Color Space conversion matrix */
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0xC2, 0x4A, /* Program RGB->YCrCb Color Space conversion matrix */
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0xC6, 0x5E, /* Program RGB->YCrCb Color Space conversion matrix */
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0xBD, 0x19, /* Program RGB->YCrCb Color Space conversion matrix */
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0xBF, 0x42, /* Program RGB->YCrCb Color Space conversion matrix */
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0x8C, 0xCB, /* PAL Subcarrier Frequency */
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0x8D, 0x8A, /* PAL Subcarrier Frequency */
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0x8E, 0x09, /* PAL Subcarrier Frequency */
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0x8F, 0x2A, /* PAL Subcarrier Frequency */
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0x01, 0x00, /* SD-Only Mode */
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0x80, 0x11, /* SSAF Luma Filter Enabled, PAL Mode */
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0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
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0x87, 0x80, /* SD Color Bar Test Pattern Enabled, DAC 2 = Luma, DAC 3 = Chroma */
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0x86, 0x82,
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0x8B, 0x11,
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0x88, 0x20,
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0x8A, 0x0d,
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};
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static const u8 init_NTSC_YCbCr[] = {
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0x00, 0x1E, /* Power up all DACs and PLL */
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0x8C, 0x1F, /* NTSC Subcarrier Frequency */
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0x8D, 0x7C, /* NTSC Subcarrier Frequency */
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0x8E, 0xF0, /* NTSC Subcarrier Frequency */
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0x8F, 0x21, /* NTSC Subcarrier Frequency */
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0x01, 0x00, /* SD-Only Mode */
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0x80, 0x30, /* SSAF Luma Filter Enabled, NTSC Mode */
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0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
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0x87, 0x00, /* DAC 2 = Luma, DAC 3 = Chroma */
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0x86, 0x82,
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0x8B, 0x11,
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0x88, 0x08,
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0x8A, 0x0d,
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};
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static const u8 init_PAL_YCbCr[] = {
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0x00, 0x1E, /* Power up all DACs and PLL */
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0x8C, 0xCB, /* PAL Subcarrier Frequency */
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0x8D, 0x8A, /* PAL Subcarrier Frequency */
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0x8E, 0x09, /* PAL Subcarrier Frequency */
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0x8F, 0x2A, /* PAL Subcarrier Frequency */
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0x01, 0x00, /* SD-Only Mode */
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0x80, 0x11, /* SSAF Luma Filter Enabled, PAL Mode */
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0x82, 0x8B, /* Step control on, pixel data invalid, pedestal on, PrPb SSAF on, CVBS/YC output */
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0x87, 0x00, /* DAC 2 = Luma, DAC 3 = Chroma */
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0x86, 0x82,
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0x8B, 0x11,
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0x88, 0x08,
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0x8A, 0x0d,
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};
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static struct adv7393fb_modes known_modes[] = {
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/* NTSC 720x480 CRT */
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{
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.name = "NTSC 720x480",
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.xres = 720,
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.yres = 480,
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.bpp = 16,
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.vmode = FB_VMODE_INTERLACED,
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.a_lines = 240,
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.vb1_lines = 22,
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.vb2_lines = 23,
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.tot_lines = 525,
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.boeft_blank = 16,
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.aoeft_blank = 122,
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.adv7393_i2c_initd = init_NTSC,
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.adv7393_i2c_initd_len = sizeof(init_NTSC)
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},
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/* PAL 720x480 CRT */
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{
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.name = "PAL 720x576",
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.xres = 720,
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.yres = 576,
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.bpp = 16,
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.vmode = FB_VMODE_INTERLACED,
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.a_lines = 288,
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.vb1_lines = 24,
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.vb2_lines = 25,
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.tot_lines = 625,
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.boeft_blank = 12,
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.aoeft_blank = 132,
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.adv7393_i2c_initd = init_PAL,
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.adv7393_i2c_initd_len = sizeof(init_PAL)
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},
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/* NTSC 640x480 CRT Experimental */
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{
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.name = "NTSC 640x480",
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.xres = 640,
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.yres = 480,
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.bpp = 16,
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.vmode = FB_VMODE_INTERLACED,
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.a_lines = 240,
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.vb1_lines = 22,
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.vb2_lines = 23,
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.tot_lines = 525,
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.boeft_blank = 16 + 40,
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.aoeft_blank = 122 + 40,
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.adv7393_i2c_initd = init_NTSC,
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.adv7393_i2c_initd_len = sizeof(init_NTSC)
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},
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/* PAL 640x480 CRT Experimental */
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{
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.name = "PAL 640x480",
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.xres = 640,
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.yres = 480,
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.bpp = 16,
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.vmode = FB_VMODE_INTERLACED,
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.a_lines = 288 - 20,
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.vb1_lines = 24 + 20,
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.vb2_lines = 25 + 20,
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.tot_lines = 625,
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.boeft_blank = 12 + 40,
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.aoeft_blank = 132 + 40,
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.adv7393_i2c_initd = init_PAL,
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.adv7393_i2c_initd_len = sizeof(init_PAL)
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},
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/* NTSC 720x480 YCbCR */
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{
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.name = "NTSC 720x480 YCbCR",
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.xres = 720,
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.yres = 480,
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.bpp = 16,
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.vmode = FB_VMODE_INTERLACED,
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.a_lines = 240,
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.vb1_lines = 22,
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.vb2_lines = 23,
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.tot_lines = 525,
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.boeft_blank = 16,
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.aoeft_blank = 122,
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.adv7393_i2c_initd = init_NTSC_YCbCr,
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.adv7393_i2c_initd_len = sizeof(init_NTSC_YCbCr)
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},
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/* PAL 720x480 CRT */
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{
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.name = "PAL 720x576 YCbCR",
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.xres = 720,
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.yres = 576,
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.bpp = 16,
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.vmode = FB_VMODE_INTERLACED,
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.a_lines = 288,
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.vb1_lines = 24,
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.vb2_lines = 25,
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.tot_lines = 625,
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.boeft_blank = 12,
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.aoeft_blank = 132,
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.adv7393_i2c_initd = init_PAL_YCbCr,
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.adv7393_i2c_initd_len = sizeof(init_PAL_YCbCr)
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}
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};
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struct adv7393fb_regs {
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};
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struct adv7393fb_device {
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struct fb_info info; /* FB driver info record */
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struct i2c_client *client;
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struct dmasg *descriptor_list_head;
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struct dmasg *vb1;
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struct dmasg *av1;
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struct dmasg *vb2;
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struct dmasg *av2;
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dma_addr_t dma_handle;
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struct fb_info bfin_adv7393_fb;
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struct adv7393fb_modes *modes;
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struct adv7393fb_regs *regs; /* Registers memory map */
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size_t regs_len;
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size_t fb_len;
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size_t line_len;
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u16 open;
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u16 *fb_mem; /* RGB Buffer */
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};
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#define to_adv7393fb_device(_info) \
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(_info ? container_of(_info, struct adv7393fb_device, info) : NULL);
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static int bfin_adv7393_fb_open(struct fb_info *info, int user);
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static int bfin_adv7393_fb_release(struct fb_info *info, int user);
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static int bfin_adv7393_fb_check_var(struct fb_var_screeninfo *var,
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struct fb_info *info);
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static int bfin_adv7393_fb_pan_display(struct fb_var_screeninfo *var,
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struct fb_info *info);
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static int bfin_adv7393_fb_blank(int blank, struct fb_info *info);
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static void bfin_config_ppi(struct adv7393fb_device *fbdev);
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static int bfin_config_dma(struct adv7393fb_device *fbdev);
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static void bfin_disable_dma(void);
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static void bfin_enable_ppi(void);
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static void bfin_disable_ppi(void);
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static inline int adv7393_write(struct i2c_client *client, u8 reg, u8 value);
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static inline int adv7393_read(struct i2c_client *client, u8 reg);
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static int adv7393_write_block(struct i2c_client *client, const u8 *data,
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unsigned int len);
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int bfin_adv7393_fb_cursor(struct fb_info *info, struct fb_cursor *cursor);
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static int bfin_adv7393_fb_setcolreg(u_int, u_int, u_int, u_int,
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u_int, struct fb_info *info);
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#endif
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