Fixed MTP to work with TWRP

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awab228 2018-06-19 23:16:04 +02:00
commit f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions

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/*
* This header provides constants for many UFS bindings.
*
* Copyright (C) 2015 Samsung Electronics Co., Ltd.
* Kiwoong Kim <kwmad.kim@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef _DT_BINDINGS_UFS_UFS_H
#define _DT_BINDINGS_UFS_UFS_H
#define true 1
#define false 0
/*
* from ufs-exynos.h
*/
#define PHY_CFG_NONE 0
#define PHY_PCS_COMN 1
#define PHY_PCS_RXTX 2
#define PHY_PMA_COMN 3
#define PHY_PMA_TRSV 4
#define UNIPRO_STD_MIB 5
#define UNIPRO_DBG_MIB 6
#define UNIPRO_DBG_APB 7
#define PMD_PWM_G1_L1 (1U << 0)
#define PMD_PWM_G1_L2 (1U << 1)
#define PMD_PWM_G2_L1 (1U << 2)
#define PMD_PWM_G2_L2 (1U << 3)
#define PMD_PWM_G3_L1 (1U << 4)
#define PMD_PWM_G3_L2 (1U << 5)
#define PMD_PWM_G4_L1 (1U << 6)
#define PMD_PWM_G4_L2 (1U << 7)
#define PMD_PWM_G5_L1 (1U << 8)
#define PMD_PWM_G5_L2 (1U << 9)
#define PMD_HS_G1_L1 (1U << 10)
#define PMD_HS_G1_L2 (1U << 11)
#define PMD_HS_G2_L1 (1U << 12)
#define PMD_HS_G2_L2 (1U << 13)
#define PMD_HS_G3_L1 (1U << 14)
#define PMD_HS_G3_L2 (1U << 15)
#define PMD_ALL (PMD_HS_G3_L2 - 1)
#define PMD_PWM (PMD_PWM_G4_L2 - 1)
#define PMD_HS (PMD_ALL ^ PMD_PWM)
#define UNIP_COMP_VERSION 0x000
#define UNIP_COMP_INFO 0x004
#define UNIP_COMP_RESET 0x010
#define UNIP_DME_POWERON_REQ 0x040
#define UNIP_DME_POWERON_CNF_RESULT 0x044
#define UNIP_DME_POWEROFF_REQ 0x048
#define UNIP_DME_POWEROFF_CNF_RESULT 0x04C
#define UNIP_DME_RESET_REQ 0x050
#define UNIP_DME_RESET_REQ_LEVEL 0x054
#define UNIP_DME_ENABLE_REQ 0x058
#define UNIP_DME_ENABLE_CNF_RESULT 0x05C
#define UNIP_DME_ENDPOINTRESET_REQ 0x060
#define UNIP_DME_ENDPOINTRESET_CNF_RESULT 0x064
#define UNIP_DME_LINKSTARTUP_REQ 0x068
#define UNIP_DME_LINKSTARTUP_CNF_RESULT 0x06C
#define UNIP_DME_HIBERN8_ENTER_REQ 0x070
#define UNIP_DME_HIBERN8_ENTER_CNF_RESULT 0x074
#define UNIP_DME_HIBERN8_ENTER_IND_RESULT 0x078
#define UNIP_DME_HIBERN8_EXIT_REQ 0x080
#define UNIP_DME_HIBERN8_EXIT_CNF_RESULT 0x084
#define UNIP_DME_HIBERN8_EXIT_IND_RESULT 0x088
#define UNIP_DME_PWR_REQ 0x090
#define UNIP_DME_PWR_REQ_POWERMODE 0x094
#define UNIP_DME_PWR_REQ_LOCALL2TIMER0 0x098
#define UNIP_DME_PWR_REQ_LOCALL2TIMER1 0x09C
#define UNIP_DME_PWR_REQ_LOCALL2TIMER2 0x0A0
#define UNIP_DME_PWR_REQ_REMOTEL2TIMER0 0x0A4
#define UNIP_DME_PWR_REQ_REMOTEL2TIMER1 0x0A8
#define UNIP_DME_PWR_REQ_REMOTEL2TIMER2 0x0AC
#define UNIP_DME_PWR_CNF_RESULT 0x0B0
#define UNIP_DME_PWR_IND_RESULT 0x0B4
#define UNIP_DME_TEST_MODE_REQ 0x0B8
#define UNIP_DME_TEST_MODE_CNF_RESULT 0x0BC
#define UNIP_DME_ERROR_IND_LAYER 0x0C0
#define UNIP_DME_ERROR_IND_ERRCODE 0x0C4
#define UNIP_DME_PACP_CNFBIT 0x0C8
#define UNIP_DME_DL_FRAME_IND 0x0D0
#define UNIP_DME_INTR_STATUS 0x0E0
#define UNIP_DME_INTR_ENABLE 0x0E4
#define UNIP_DME_GETSET_ADDR 0x100
#define UNIP_DME_GETSET_WDATA 0x104
#define UNIP_DME_GETSET_RDATA 0x108
#define UNIP_DME_GETSET_CONTROL 0x10C
#define UNIP_DME_GETSET_RESULT 0x110
#define UNIP_DME_PEER_GETSET_ADDR 0x120
#define UNIP_DME_PEER_GETSET_WDATA 0x124
#define UNIP_DME_PEER_GETSET_RDATA 0x128
#define UNIP_DME_PEER_GETSET_CONTROL 0x12C
#define UNIP_DME_PEER_GETSET_RESULT 0x130
#define UNIP_DBG_FORCE_DME_CTRL_STATE 0x150
#define PA_DBG_CLK_PERIOD 0x9514
#define PA_DBG_TXPHY_CFGUPDT 0x9518
#define PA_DBG_RXPHY_CFGUPDT 0x9519
#define PA_DBG_MODE 0x9529
#define PA_DBG_TX_PHY_LATENCY 0x952C
#define PA_DBG_AUTOMODE_THLD 0x9536
#define PA_DBG_OV_TM 0x9540
#define PA_DBG_MIB_CAP_SEL 0x9546
#define PA_DBG_RESUME_HIBERN8 0x9550
#define PA_DBG_TX_PHY_LATENCY_EN 0x9552
#define PA_DBG_IGNORE_INCOMING 0x9559
#define PA_DBG_LINE_RESET_THLD 0x9561
#define PA_DBG_OPTION_SUITE 0x9564
/*
* from unipro.h
*/
#define PA_ACTIVETXDATALANES 0x1560
#define PA_ACTIVERXDATALANES 0x1580
#define PA_TXTRAILINGCLOCKS 0x1564
#define PA_PHY_TYPE 0x1500
#define PA_AVAILTXDATALANES 0x1520
#define PA_AVAILRXDATALANES 0x1540
#define PA_MINRXTRAILINGCLOCKS 0x1543
#define PA_TXPWRSTATUS 0x1567
#define PA_RXPWRSTATUS 0x1582
#define PA_TXFORCECLOCK 0x1562
#define PA_TXPWRMODE 0x1563
#define PA_LEGACYDPHYESCDL 0x1570
#define PA_MAXTXSPEEDFAST 0x1521
#define PA_MAXTXSPEEDSLOW 0x1522
#define PA_MAXRXSPEEDFAST 0x1541
#define PA_MAXRXSPEEDSLOW 0x1542
#define PA_TXLINKSTARTUPHS 0x1544
#define PA_TXSPEEDFAST 0x1565
#define PA_TXSPEEDSLOW 0x1566
#define PA_REMOTEVERINFO 0x15A0
#define PA_TXGEAR 0x1568
#define PA_TXTERMINATION 0x1569
#define PA_HSSERIES 0x156A
#define PA_PWRMODE 0x1571
#define PA_RXGEAR 0x1583
#define PA_RXTERMINATION 0x1584
#define PA_MAXRXPWMGEAR 0x1586
#define PA_MAXRXHSGEAR 0x1587
#define PA_RXHSUNTERMCAP 0x15A5
#define PA_RXLSTERMCAP 0x15A6
#define PA_PACPREQTIMEOUT 0x1590
#define PA_PACPREQEOBTIMEOUT 0x1591
#define PA_HIBERN8TIME 0x15A7
#define PA_LOCALVERINFO 0x15A9
#define PA_GRANULARITY 0x15AA
#define PA_TACTIVATE 0x15A8
#define PA_PACPFRAMECOUNT 0x15C0
#define PA_PACPERRORCOUNT 0x15C1
#define PA_PHYTESTCONTROL 0x15C2
#define PA_PWRMODEUSERDATA0 0x15B0
#define PA_PWRMODEUSERDATA1 0x15B1
#define PA_PWRMODEUSERDATA2 0x15B2
#define PA_PWRMODEUSERDATA3 0x15B3
#define PA_PWRMODEUSERDATA4 0x15B4
#define PA_PWRMODEUSERDATA5 0x15B5
#define PA_PWRMODEUSERDATA6 0x15B6
#define PA_PWRMODEUSERDATA7 0x15B7
#define PA_PWRMODEUSERDATA8 0x15B8
#define PA_PWRMODEUSERDATA9 0x15B9
#define PA_PWRMODEUSERDATA10 0x15BA
#define PA_PWRMODEUSERDATA11 0x15BB
#define PA_CONNECTEDTXDATALANES 0x1561
#define PA_CONNECTEDRXDATALANES 0x1581
#define PA_LOGICALLANEMAP 0x15A1
#define PA_SLEEPNOCONFIGTIME 0x15A2
#define PA_STALLNOCONFIGTIME 0x15A3
#define PA_SAVECONFIGTIME 0x15A4
#endif