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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-10 01:12:45 -04:00
Fixed MTP to work with TWRP
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awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
231
include/linux/battery/charger/max77833_charger.h
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231
include/linux/battery/charger/max77833_charger.h
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/*
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* max77833_charger.h
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* Samsung MAX77833 Charger Header
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*
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* Copyright (C) 2012 Samsung Electronics, Inc.
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*
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __MAX77833_CHARGER_H
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#define __MAX77833_CHARGER_H __FILE__
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#include <linux/mfd/core.h>
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#include <linux/mfd/max77833.h>
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#include <linux/mfd/max77833-private.h>
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#include <linux/regulator/machine.h>
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#include <linux/wakelock.h>
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enum {
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CHIP_ID = 0,
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};
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ssize_t max77833_chg_show_attrs(struct device *dev,
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struct device_attribute *attr, char *buf);
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ssize_t max77833_chg_store_attrs(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count);
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#define MAX77833_CHARGER_ATTR(_name) \
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{ \
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.attr = {.name = #_name, .mode = 0664}, \
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.show = max77833_chg_show_attrs, \
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.store = max77833_chg_store_attrs, \
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}
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extern sec_battery_platform_data_t sec_battery_pdata;
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#define MAX77833_CHG_SAFEOUT2 0x80
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/* MAX77833_CHG_REG_CHG_INT */
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#define MAX77833_BYP_I (1 << 0)
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#define MAX77833_BATP_I (1 << 2)
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#define MAX77833_BAT_I (1 << 3)
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#define MAX77833_CHG_I (1 << 4)
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#define MAX77833_WCIN_I (1 << 5)
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#define MAX77833_CHGIN_I (1 << 6)
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#define MAX77833_AICL_I (1 << 7)
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/* MAX77833_CHG_REG_CHG_INT_MASK */
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#define MAX77833_BYP_IM (1 << 0)
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#define MAX77833_BATP_IM (1 << 2)
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#define MAX77833_BAT_IM (1 << 3)
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#define MAX77833_CHG_IM (1 << 4)
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#define MAX77833_WCIN_IM (1 << 5)
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#define MAX77833_CHGIN_IM (1 << 6)
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#define MAX77833_AICL_IM (1 << 7)
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/* MAX77833_CHG_REG_CHG_INT_OK */
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#define MAX77833_BYP_OK 0x01
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#define MAX77833_BYP_OK_SHIFT 0
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#define MAX77833_BATP_OK 0x04
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#define MAX77833_BATP_OK_SHIFT 2
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#define MAX77833_BAT_OK 0x08
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#define MAX77833_BAT_OK_SHIFT 3
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#define MAX77833_CHG_OK 0x10
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#define MAX77833_CHG_OK_SHIFT 4
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#define MAX77833_WCIN_OK 0x20
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#define MAX77833_WCIN_OK_SHIFT 5
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#define MAX77833_CHGIN_OK 0x40
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#define MAX77833_CHGIN_OK_SHIFT 6
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#define MAX77833_AICL_OK 0x04
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#define MAX77833_AICL_OK_SHIFT 7
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/* MAX77833_CHG_REG_CHG_DTLS_00 */
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#define MAX77833_BATP_DTLS 0x01
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#define MAX77833_BATP_DTLS_SHIFT 0
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#define MAX77833_WCIN_DTLS 0x30
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#define MAX77833_WCIN_DTLS_SHIFT 4
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#define MAX77833_CHGIN_DTLS 0xC0
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#define MAX77833_CHGIN_DTLS_SHIFT 6
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/* MAX77833_CHG_REG_CHG_DTLS_01 */
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#define MAX77833_CHG_DTLS 0x0F
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#define MAX77833_CHG_DTLS_SHIFT 0
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#define MAX77833_BAT_DTLS 0x70
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#define MAX77833_BAT_DTLS_SHIFT 4
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/* MAX77833_CHG_REG_CHG_DTLS_02 */
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#define MAX77833_BYP_DTLS 0x0F
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#define MAX77833_BYP_DTLS_SHIFT 0
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#define MAX77833_BYP_DTLS0 0x1
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#define MAX77833_BYP_DTLS1 0x2
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#define MAX77833_BYP_DTLS2 0x4
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#define MAX77833_BYP_DTLS3 0x8
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/* MAX77833_CHG_REG_CHG_CNFG_00 */
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#define CHG_CNFG_00_MODE_SHIFT 0
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#define CHG_CNFG_00_CHG_SHIFT 0
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#define CHG_CNFG_00_OTG_SHIFT 1
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#define CHG_CNFG_00_BUCK_SHIFT 2
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#define CHG_CNFG_00_BOOST_SHIFT 3
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#define CHG_CNFG_00_MODE_MASK (0xf << CHG_CNFG_00_MODE_SHIFT)
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#define CHG_CNFG_00_CHG_MASK (1 << CHG_CNFG_00_CHG_SHIFT)
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#define CHG_CNFG_00_OTG_MASK (1 << CHG_CNFG_00_OTG_SHIFT)
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#define CHG_CNFG_00_BUCK_MASK (1 << CHG_CNFG_00_BUCK_SHIFT)
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#define CHG_CNFG_00_BOOST_MASK (1 << CHG_CNFG_00_BOOST_SHIFT)
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#define CHG_CNFG_00_OTG_CTRL (CHG_CNFG_00_OTG_MASK | CHG_CNFG_00_BOOST_MASK)
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#define MAX77833_MODE_DEFAULT 0x04
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#define MAX77833_MODE_CHGR 0x01
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#define MAX77833_MODE_OTG 0x02
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#define MAX77833_MODE_BUCK 0x04
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#define MAX77833_MODE_BOOST 0x08
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/* MAX77833_CHG_REG_CHG_CNFG_02 */
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#define MAX77833_CHG_TO_ITH 0x07
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#define MAX77833_CHG_TO_TIME 0x38
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#define MAX77833_CHG_OTG_ILIM 0xC0
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/* MAX77833_CHG_REG_CHG_CNFG_04 */
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#define MAX77833_CHG_MINVSYS_MASK 0xE0
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#define MAX77833_CHG_MINVSYS_SHIFT 5
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#define MAX77833_CHG_PRM_MASK 0x1F
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#define MAX77833_CHG_PRM_SHIFT 0
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/* MAX77833_CHG_REG_CHG_CNFG_17 */
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#define MAX77833_CHG_WCIN_LIM 0x7F
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#define REDUCE_CURRENT_STEP 100
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#define MINIMUM_INPUT_CURRENT 300
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#define SIOP_INPUT_LIMIT_CURRENT 1200
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#define SIOP_CHARGING_LIMIT_CURRENT 1000
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#define SIOP_WIRELESS_INPUT_LIMIT_CURRENT 530
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#define SIOP_WIRELESS_CHARGING_LIMIT_CURRENT 780
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#define SIOP_HV_INPUT_LIMIT_CURRENT 700
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#define SIOP_HV_CHARGING_LIMIT_CURRENT 1000
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#define SLOW_CHARGING_CURRENT_STANDARD 400
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#define INPUT_CURRENT_TA 1000
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struct max77833_charger_data {
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struct device *dev;
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struct i2c_client *i2c;
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struct i2c_client *pmic_i2c;
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struct mutex charger_mutex;
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struct max77833_platform_data *max77833_pdata;
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struct power_supply psy_chg;
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struct workqueue_struct *wqueue;
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struct work_struct chgin_work;
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struct delayed_work isr_work;
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struct delayed_work recovery_work; /* softreg recovery work */
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struct delayed_work wpc_work; /* wpc detect work */
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struct delayed_work chgin_init_work; /* chgin init work */
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struct delayed_work afc_work;
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struct delayed_work aicl_work;
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/* mutex */
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struct mutex irq_lock;
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struct mutex ops_lock;
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/* wakelock */
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struct wake_lock recovery_wake_lock;
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struct wake_lock wpc_wake_lock;
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struct wake_lock afc_wake_lock;
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struct wake_lock chgin_wake_lock;
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struct wake_lock aicl_wake_lock;
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unsigned int is_charging;
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unsigned int charging_type;
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unsigned int battery_state;
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unsigned int battery_present;
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unsigned int cable_type;
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unsigned int charging_current_max;
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unsigned int charging_current;
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unsigned int input_current_limit;
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unsigned int vbus_state;
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int aicl_on;
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int status;
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int siop_level;
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int uvlo_attach_flag;
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int uvlo_attach_cable_type;
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int irq_bypass;
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int irq_batp;
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int irq_aicl;
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int irq_battery;
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int irq_chg;
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int irq_wcin;
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int irq_chgin;
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/* software regulation */
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bool soft_reg_state;
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int soft_reg_current;
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/* unsufficient power */
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bool reg_loop_deted;
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/* wireless charge, w(wpc), v(vbus) */
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int wc_w_gpio;
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int wc_w_irq;
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int wc_w_state;
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int wc_v_gpio;
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int wc_v_irq;
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int wc_v_state;
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bool wc_pwr_det;
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int soft_reg_recovery_cnt;
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bool afc_detect;
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bool is_mdock;
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int pmic_ver;
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int input_curr_limit_step;
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int wpc_input_curr_limit_step;
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int charging_curr_step;
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sec_charger_platform_data_t *pdata;
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};
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#endif /* __MAX77833_CHARGER_H */
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