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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
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Fixed MTP to work with TWRP
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f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
283
include/linux/iio/imu/adis.h
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283
include/linux/iio/imu/adis.h
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/*
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* Common library for ADIS16XXX devices
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*
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* Copyright 2012 Analog Devices Inc.
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* Author: Lars-Peter Clausen <lars@metafoo.de>
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __IIO_ADIS_H__
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#define __IIO_ADIS_H__
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#include <linux/spi/spi.h>
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#include <linux/interrupt.h>
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#include <linux/iio/types.h>
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#define ADIS_WRITE_REG(reg) ((0x80 | (reg)))
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#define ADIS_READ_REG(reg) ((reg) & 0x7f)
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#define ADIS_PAGE_SIZE 0x80
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#define ADIS_REG_PAGE_ID 0x00
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struct adis;
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/**
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* struct adis_data - ADIS chip variant specific data
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* @read_delay: SPI delay for read operations in us
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* @write_delay: SPI delay for write operations in us
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* @glob_cmd_reg: Register address of the GLOB_CMD register
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* @msc_ctrl_reg: Register address of the MSC_CTRL register
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* @diag_stat_reg: Register address of the DIAG_STAT register
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* @status_error_msgs: Array of error messgaes
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* @status_error_mask:
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*/
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struct adis_data {
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unsigned int read_delay;
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unsigned int write_delay;
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unsigned int glob_cmd_reg;
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unsigned int msc_ctrl_reg;
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unsigned int diag_stat_reg;
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unsigned int self_test_mask;
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unsigned int startup_delay;
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const char * const *status_error_msgs;
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unsigned int status_error_mask;
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int (*enable_irq)(struct adis *adis, bool enable);
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bool has_paging;
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};
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struct adis {
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struct spi_device *spi;
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struct iio_trigger *trig;
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const struct adis_data *data;
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struct mutex txrx_lock;
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struct spi_message msg;
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struct spi_transfer *xfer;
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unsigned int current_page;
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void *buffer;
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uint8_t tx[10] ____cacheline_aligned;
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uint8_t rx[4];
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};
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int adis_init(struct adis *adis, struct iio_dev *indio_dev,
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struct spi_device *spi, const struct adis_data *data);
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int adis_reset(struct adis *adis);
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int adis_write_reg(struct adis *adis, unsigned int reg,
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unsigned int val, unsigned int size);
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int adis_read_reg(struct adis *adis, unsigned int reg,
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unsigned int *val, unsigned int size);
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/**
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* adis_write_reg_8() - Write single byte to a register
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* @adis: The adis device
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* @reg: The address of the register to be written
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* @value: The value to write
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*/
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static inline int adis_write_reg_8(struct adis *adis, unsigned int reg,
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uint8_t val)
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{
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return adis_write_reg(adis, reg, val, 1);
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}
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/**
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* adis_write_reg_16() - Write 2 bytes to a pair of registers
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @value: Value to be written
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*/
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static inline int adis_write_reg_16(struct adis *adis, unsigned int reg,
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uint16_t val)
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{
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return adis_write_reg(adis, reg, val, 2);
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}
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/**
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* adis_write_reg_32() - write 4 bytes to four registers
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* @adis: The adis device
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* @reg: The address of the lower of the four register
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* @value: Value to be written
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*/
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static inline int adis_write_reg_32(struct adis *adis, unsigned int reg,
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uint32_t val)
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{
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return adis_write_reg(adis, reg, val, 4);
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}
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/**
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* adis_read_reg_16() - read 2 bytes from a 16-bit register
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @val: The value read back from the device
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*/
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static inline int adis_read_reg_16(struct adis *adis, unsigned int reg,
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uint16_t *val)
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{
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unsigned int tmp;
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int ret;
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ret = adis_read_reg(adis, reg, &tmp, 2);
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*val = tmp;
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return ret;
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}
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/**
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* adis_read_reg_32() - read 4 bytes from a 32-bit register
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* @adis: The adis device
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* @reg: The address of the lower of the two registers
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* @val: The value read back from the device
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*/
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static inline int adis_read_reg_32(struct adis *adis, unsigned int reg,
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uint32_t *val)
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{
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unsigned int tmp;
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int ret;
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ret = adis_read_reg(adis, reg, &tmp, 4);
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*val = tmp;
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return ret;
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}
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int adis_enable_irq(struct adis *adis, bool enable);
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int adis_check_status(struct adis *adis);
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int adis_initial_startup(struct adis *adis);
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int adis_single_conversion(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, unsigned int error_mask,
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int *val);
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#define ADIS_VOLTAGE_CHAN(addr, si, chan, name, info_all, bits) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = (chan), \
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.extend_name = name, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_SCALE), \
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.info_mask_shared_by_all = info_all, \
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.address = (addr), \
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.scan_index = (si), \
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.scan_type = { \
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.sign = 'u', \
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.realbits = (bits), \
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.storagebits = 16, \
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.endianness = IIO_BE, \
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}, \
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}
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#define ADIS_SUPPLY_CHAN(addr, si, info_all, bits) \
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ADIS_VOLTAGE_CHAN(addr, si, 0, "supply", info_all, bits)
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#define ADIS_AUX_ADC_CHAN(addr, si, info_all, bits) \
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ADIS_VOLTAGE_CHAN(addr, si, 1, NULL, info_all, bits)
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#define ADIS_TEMP_CHAN(addr, si, info_all, bits) { \
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.type = IIO_TEMP, \
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.indexed = 1, \
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.channel = 0, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_SCALE) | \
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BIT(IIO_CHAN_INFO_OFFSET), \
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.info_mask_shared_by_all = info_all, \
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.address = (addr), \
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.scan_index = (si), \
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.scan_type = { \
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.sign = 'u', \
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.realbits = (bits), \
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.storagebits = 16, \
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.endianness = IIO_BE, \
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}, \
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}
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#define ADIS_MOD_CHAN(_type, mod, addr, si, info_sep, info_all, bits) { \
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.type = (_type), \
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.modified = 1, \
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.channel2 = IIO_MOD_ ## mod, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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info_sep, \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.info_mask_shared_by_all = info_all, \
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.address = (addr), \
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.scan_index = (si), \
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.scan_type = { \
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.sign = 's', \
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.realbits = (bits), \
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.storagebits = 16, \
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.endianness = IIO_BE, \
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}, \
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}
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#define ADIS_ACCEL_CHAN(mod, addr, si, info_sep, info_all, bits) \
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ADIS_MOD_CHAN(IIO_ACCEL, mod, addr, si, info_sep, info_all, bits)
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#define ADIS_GYRO_CHAN(mod, addr, si, info_sep, info_all, bits) \
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ADIS_MOD_CHAN(IIO_ANGL_VEL, mod, addr, si, info_sep, info_all, bits)
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#define ADIS_INCLI_CHAN(mod, addr, si, info_sep, info_all, bits) \
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ADIS_MOD_CHAN(IIO_INCLI, mod, addr, si, info_sep, info_all, bits)
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#define ADIS_ROT_CHAN(mod, addr, si, info_sep, info_all, bits) \
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ADIS_MOD_CHAN(IIO_ROT, mod, addr, si, info_sep, info_all, bits)
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#ifdef CONFIG_IIO_ADIS_LIB_BUFFER
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int adis_setup_buffer_and_trigger(struct adis *adis,
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struct iio_dev *indio_dev, irqreturn_t (*trigger_handler)(int, void *));
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void adis_cleanup_buffer_and_trigger(struct adis *adis,
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struct iio_dev *indio_dev);
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int adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev);
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void adis_remove_trigger(struct adis *adis);
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int adis_update_scan_mode(struct iio_dev *indio_dev,
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const unsigned long *scan_mask);
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#else /* CONFIG_IIO_BUFFER */
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static inline int adis_setup_buffer_and_trigger(struct adis *adis,
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struct iio_dev *indio_dev, irqreturn_t (*trigger_handler)(int, void *))
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{
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return 0;
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}
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static inline void adis_cleanup_buffer_and_trigger(struct adis *adis,
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struct iio_dev *indio_dev)
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{
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}
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static inline int adis_probe_trigger(struct adis *adis,
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struct iio_dev *indio_dev)
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{
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return 0;
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}
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static inline void adis_remove_trigger(struct adis *adis)
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{
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}
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#define adis_update_scan_mode NULL
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#endif /* CONFIG_IIO_BUFFER */
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#ifdef CONFIG_DEBUG_FS
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int adis_debugfs_reg_access(struct iio_dev *indio_dev,
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unsigned int reg, unsigned int writeval, unsigned int *readval);
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#else
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#define adis_debugfs_reg_access NULL
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#endif
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#endif
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