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Fixed MTP to work with TWRP

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awab228 2018-06-19 23:16:04 +02:00
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49
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/*
* Analog Devices AD9389B/AD9889B video encoder driver header
*
* Copyright 2012 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
*
* This program is free software; you may redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef AD9389B_H
#define AD9389B_H
enum ad9389b_tmds_pll_gear {
AD9389B_TMDS_PLL_GEAR_AUTOMATIC,
AD9389B_TMDS_PLL_GEAR_SEMI_AUTOMATIC,
};
/* Platform dependent definitions */
struct ad9389b_platform_data {
enum ad9389b_tmds_pll_gear tmds_pll_gear ;
/* Differential Data/Clock Output Drive Strength (reg. 0xa2/0xa3) */
u8 diff_data_drive_strength;
u8 diff_clk_drive_strength;
};
/* notify events */
#define AD9389B_MONITOR_DETECT 0
#define AD9389B_EDID_DETECT 1
struct ad9389b_monitor_detect {
int present;
};
struct ad9389b_edid_detect {
int present;
int segment;
};
#endif

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/*
* include/media/adp1653.h
*
* Copyright (C) 2008--2011 Nokia Corporation
*
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* Contributors:
* Sakari Ailus <sakari.ailus@iki.fi>
* Tuukka Toivonen <tuukkat76@gmail.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef ADP1653_H
#define ADP1653_H
#include <linux/i2c.h>
#include <linux/mutex.h>
#include <linux/videodev2.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-subdev.h>
#define ADP1653_NAME "adp1653"
#define ADP1653_I2C_ADDR (0x60 >> 1)
/* Register definitions */
#define ADP1653_REG_OUT_SEL 0x00
#define ADP1653_REG_OUT_SEL_HPLED_TORCH_MIN 0x01
#define ADP1653_REG_OUT_SEL_HPLED_TORCH_MAX 0x0b
#define ADP1653_REG_OUT_SEL_HPLED_FLASH_MIN 0x0c
#define ADP1653_REG_OUT_SEL_HPLED_FLASH_MAX 0x1f
#define ADP1653_REG_OUT_SEL_HPLED_SHIFT 3
#define ADP1653_REG_OUT_SEL_ILED_MAX 0x07
#define ADP1653_REG_OUT_SEL_ILED_SHIFT 0
#define ADP1653_REG_CONFIG 0x01
#define ADP1653_REG_CONFIG_TMR_CFG (1 << 4)
#define ADP1653_REG_CONFIG_TMR_SET_MAX 0x0f
#define ADP1653_REG_CONFIG_TMR_SET_SHIFT 0
#define ADP1653_REG_SW_STROBE 0x02
#define ADP1653_REG_SW_STROBE_SW_STROBE (1 << 0)
#define ADP1653_REG_FAULT 0x03
#define ADP1653_REG_FAULT_FLT_SCP (1 << 3)
#define ADP1653_REG_FAULT_FLT_OT (1 << 2)
#define ADP1653_REG_FAULT_FLT_TMR (1 << 1)
#define ADP1653_REG_FAULT_FLT_OV (1 << 0)
#define ADP1653_INDICATOR_INTENSITY_MIN 0
#define ADP1653_INDICATOR_INTENSITY_STEP 2500
#define ADP1653_INDICATOR_INTENSITY_MAX \
(ADP1653_REG_OUT_SEL_ILED_MAX * ADP1653_INDICATOR_INTENSITY_STEP)
#define ADP1653_INDICATOR_INTENSITY_uA_TO_REG(a) \
((a) / ADP1653_INDICATOR_INTENSITY_STEP)
#define ADP1653_INDICATOR_INTENSITY_REG_TO_uA(a) \
((a) * ADP1653_INDICATOR_INTENSITY_STEP)
#define ADP1653_FLASH_INTENSITY_BASE 35
#define ADP1653_FLASH_INTENSITY_STEP 15
#define ADP1653_FLASH_INTENSITY_MIN \
(ADP1653_FLASH_INTENSITY_BASE \
+ ADP1653_REG_OUT_SEL_HPLED_FLASH_MIN * ADP1653_FLASH_INTENSITY_STEP)
#define ADP1653_FLASH_INTENSITY_MAX \
(ADP1653_FLASH_INTENSITY_MIN + \
(ADP1653_REG_OUT_SEL_HPLED_FLASH_MAX - \
ADP1653_REG_OUT_SEL_HPLED_FLASH_MIN + 1) * \
ADP1653_FLASH_INTENSITY_STEP)
#define ADP1653_FLASH_INTENSITY_mA_TO_REG(a) \
((a) < ADP1653_FLASH_INTENSITY_BASE ? 0 : \
(((a) - ADP1653_FLASH_INTENSITY_BASE) / ADP1653_FLASH_INTENSITY_STEP))
#define ADP1653_FLASH_INTENSITY_REG_TO_mA(a) \
((a) * ADP1653_FLASH_INTENSITY_STEP + ADP1653_FLASH_INTENSITY_BASE)
#define ADP1653_TORCH_INTENSITY_MIN \
(ADP1653_FLASH_INTENSITY_BASE \
+ ADP1653_REG_OUT_SEL_HPLED_TORCH_MIN * ADP1653_FLASH_INTENSITY_STEP)
#define ADP1653_TORCH_INTENSITY_MAX \
(ADP1653_TORCH_INTENSITY_MIN + \
(ADP1653_REG_OUT_SEL_HPLED_TORCH_MAX - \
ADP1653_REG_OUT_SEL_HPLED_TORCH_MIN + 1) * \
ADP1653_FLASH_INTENSITY_STEP)
struct adp1653_platform_data {
int (*power)(struct v4l2_subdev *sd, int on);
u32 max_flash_timeout; /* flash light timeout in us */
u32 max_flash_intensity; /* led intensity, flash mode */
u32 max_torch_intensity; /* led intensity, torch mode */
u32 max_indicator_intensity; /* indicator led intensity */
};
#define to_adp1653_flash(sd) container_of(sd, struct adp1653_flash, subdev)
struct adp1653_flash {
struct v4l2_subdev subdev;
struct adp1653_platform_data *platform_data;
struct v4l2_ctrl_handler ctrls;
struct v4l2_ctrl *led_mode;
struct v4l2_ctrl *flash_timeout;
struct v4l2_ctrl *flash_intensity;
struct v4l2_ctrl *torch_intensity;
struct v4l2_ctrl *indicator_intensity;
struct mutex power_lock;
int power_count;
int fault;
};
#endif /* ADP1653_H */

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/*
* adv7183.h - definition for adv7183 inputs and outputs
*
* Copyright (c) 2011 Analog Devices Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _ADV7183_H_
#define _ADV7183_H_
/* ADV7183 HW inputs */
#define ADV7183_COMPOSITE0 0 /* CVBS in on AIN1 */
#define ADV7183_COMPOSITE1 1 /* CVBS in on AIN2 */
#define ADV7183_COMPOSITE2 2 /* CVBS in on AIN3 */
#define ADV7183_COMPOSITE3 3 /* CVBS in on AIN4 */
#define ADV7183_COMPOSITE4 4 /* CVBS in on AIN5 */
#define ADV7183_COMPOSITE5 5 /* CVBS in on AIN6 */
#define ADV7183_COMPOSITE6 6 /* CVBS in on AIN7 */
#define ADV7183_COMPOSITE7 7 /* CVBS in on AIN8 */
#define ADV7183_COMPOSITE8 8 /* CVBS in on AIN9 */
#define ADV7183_COMPOSITE9 9 /* CVBS in on AIN10 */
#define ADV7183_COMPOSITE10 10 /* CVBS in on AIN11 */
#define ADV7183_SVIDEO0 11 /* Y on AIN1, C on AIN4 */
#define ADV7183_SVIDEO1 12 /* Y on AIN2, C on AIN5 */
#define ADV7183_SVIDEO2 13 /* Y on AIN3, C on AIN6 */
#define ADV7183_COMPONENT0 14 /* Y on AIN1, Pr on AIN4, Pb on AIN5 */
#define ADV7183_COMPONENT1 15 /* Y on AIN2, Pr on AIN3, Pb on AIN6 */
/* ADV7183 HW outputs */
#define ADV7183_8BIT_OUT 0
#define ADV7183_16BIT_OUT 1
#endif

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/*
* ADV7343 header file
*
* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed .as is. WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef ADV7343_H
#define ADV7343_H
#define ADV7343_COMPOSITE_ID (0)
#define ADV7343_COMPONENT_ID (1)
#define ADV7343_SVIDEO_ID (2)
/**
* adv7343_power_mode - power mode configuration.
* @sleep_mode: on enable the current consumption is reduced to micro ampere
* level. All DACs and the internal PLL circuit are disabled.
* Registers can be read from and written in sleep mode.
* @pll_control: PLL and oversampling control. This control allows internal
* PLL 1 circuit to be powered down and the oversampling to be
* switched off.
* @dac: array to configure power on/off DAC's 1..6
*
* Power mode register (Register 0x0), for more info refer REGISTER MAP ACCESS
* section of datasheet[1], table 17 page no 30.
*
* [1] http://www.analog.com/static/imported-files/data_sheets/ADV7342_7343.pdf
*/
struct adv7343_power_mode {
bool sleep_mode;
bool pll_control;
u32 dac[6];
};
/**
* struct adv7343_sd_config - SD Only Output Configuration.
* @sd_dac_out: array configuring SD DAC Outputs 1 and 2
*/
struct adv7343_sd_config {
/* SD only Output Configuration */
u32 sd_dac_out[2];
};
/**
* struct adv7343_platform_data - Platform data values and access functions.
* @mode_config: Configuration for power mode.
* @sd_config: SD Only Configuration.
*/
struct adv7343_platform_data {
struct adv7343_power_mode mode_config;
struct adv7343_sd_config sd_config;
};
#endif /* End of #ifndef ADV7343_H */

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/*
* ADV7393 header file
*
* Copyright (C) 2010-2012 ADVANSEE - http://www.advansee.com/
* Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
*
* Based on ADV7343 driver,
*
* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed .as is. WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef ADV7393_H
#define ADV7393_H
#define ADV7393_COMPOSITE_ID (0)
#define ADV7393_COMPONENT_ID (1)
#define ADV7393_SVIDEO_ID (2)
#endif /* End of #ifndef ADV7393_H */

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/*
* Analog Devices ADV7511 HDMI Transmitter Device Driver
*
* Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
*
* This program is free software; you may redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef ADV7511_H
#define ADV7511_H
/* notify events */
#define ADV7511_MONITOR_DETECT 0
#define ADV7511_EDID_DETECT 1
struct adv7511_monitor_detect {
int present;
};
struct adv7511_edid_detect {
int present;
int segment;
};
struct adv7511_cec_arg {
void *arg;
u32 f_flags;
};
struct adv7511_platform_data {
uint8_t i2c_edid;
uint8_t i2c_cec;
uint32_t cec_clk;
};
#endif

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/*
* adv7604 - Analog Devices ADV7604 video decoder driver
*
* Copyright 2012 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
*
* This program is free software; you may redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
#ifndef _ADV7604_
#define _ADV7604_
#include <linux/types.h>
/* Analog input muxing modes (AFE register 0x02, [2:0]) */
enum adv7604_ain_sel {
ADV7604_AIN1_2_3_NC_SYNC_1_2 = 0,
ADV7604_AIN4_5_6_NC_SYNC_2_1 = 1,
ADV7604_AIN7_8_9_NC_SYNC_3_1 = 2,
ADV7604_AIN10_11_12_NC_SYNC_4_1 = 3,
ADV7604_AIN9_4_5_6_SYNC_2_1 = 4,
};
/*
* Bus rotation and reordering. This is used to specify component reordering on
* the board and describes the components order on the bus when the ADV7604
* outputs RGB.
*/
enum adv7604_bus_order {
ADV7604_BUS_ORDER_RGB, /* No operation */
ADV7604_BUS_ORDER_GRB, /* Swap 1-2 */
ADV7604_BUS_ORDER_RBG, /* Swap 2-3 */
ADV7604_BUS_ORDER_BGR, /* Swap 1-3 */
ADV7604_BUS_ORDER_BRG, /* Rotate right */
ADV7604_BUS_ORDER_GBR, /* Rotate left */
};
/* Input Color Space (IO register 0x02, [7:4]) */
enum adv7604_inp_color_space {
ADV7604_INP_COLOR_SPACE_LIM_RGB = 0,
ADV7604_INP_COLOR_SPACE_FULL_RGB = 1,
ADV7604_INP_COLOR_SPACE_LIM_YCbCr_601 = 2,
ADV7604_INP_COLOR_SPACE_LIM_YCbCr_709 = 3,
ADV7604_INP_COLOR_SPACE_XVYCC_601 = 4,
ADV7604_INP_COLOR_SPACE_XVYCC_709 = 5,
ADV7604_INP_COLOR_SPACE_FULL_YCbCr_601 = 6,
ADV7604_INP_COLOR_SPACE_FULL_YCbCr_709 = 7,
ADV7604_INP_COLOR_SPACE_AUTO = 0xf,
};
/* Select output format (IO register 0x03, [4:2]) */
enum adv7604_op_format_mode_sel {
ADV7604_OP_FORMAT_MODE0 = 0x00,
ADV7604_OP_FORMAT_MODE1 = 0x04,
ADV7604_OP_FORMAT_MODE2 = 0x08,
};
enum adv7604_drive_strength {
ADV7604_DR_STR_MEDIUM_LOW = 1,
ADV7604_DR_STR_MEDIUM_HIGH = 2,
ADV7604_DR_STR_HIGH = 3,
};
enum adv7604_int1_config {
ADV7604_INT1_CONFIG_OPEN_DRAIN,
ADV7604_INT1_CONFIG_ACTIVE_LOW,
ADV7604_INT1_CONFIG_ACTIVE_HIGH,
ADV7604_INT1_CONFIG_DISABLED,
};
enum adv7604_page {
ADV7604_PAGE_IO,
ADV7604_PAGE_AVLINK,
ADV7604_PAGE_CEC,
ADV7604_PAGE_INFOFRAME,
ADV7604_PAGE_ESDP,
ADV7604_PAGE_DPP,
ADV7604_PAGE_AFE,
ADV7604_PAGE_REP,
ADV7604_PAGE_EDID,
ADV7604_PAGE_HDMI,
ADV7604_PAGE_TEST,
ADV7604_PAGE_CP,
ADV7604_PAGE_VDP,
ADV7604_PAGE_MAX,
};
/* Platform dependent definition */
struct adv7604_platform_data {
/* DIS_PWRDNB: 1 if the PWRDNB pin is unused and unconnected */
unsigned disable_pwrdnb:1;
/* DIS_CABLE_DET_RST: 1 if the 5V pins are unused and unconnected */
unsigned disable_cable_det_rst:1;
int default_input;
/* Analog input muxing mode */
enum adv7604_ain_sel ain_sel;
/* Bus rotation and reordering */
enum adv7604_bus_order bus_order;
/* Select output format mode */
enum adv7604_op_format_mode_sel op_format_mode_sel;
/* Configuration of the INT1 pin */
enum adv7604_int1_config int1_config;
/* IO register 0x02 */
unsigned alt_gamma:1;
unsigned op_656_range:1;
unsigned alt_data_sat:1;
/* IO register 0x05 */
unsigned blank_data:1;
unsigned insert_av_codes:1;
unsigned replicate_av_codes:1;
/* IO register 0x06 */
unsigned inv_vs_pol:1;
unsigned inv_hs_pol:1;
unsigned inv_llc_pol:1;
/* IO register 0x14 */
enum adv7604_drive_strength dr_str_data;
enum adv7604_drive_strength dr_str_clk;
enum adv7604_drive_strength dr_str_sync;
/* IO register 0x30 */
unsigned output_bus_lsb_to_msb:1;
/* Free run */
unsigned hdmi_free_run_mode;
/* i2c addresses: 0 == use default */
u8 i2c_addresses[ADV7604_PAGE_MAX];
};
enum adv7604_pad {
ADV7604_PAD_HDMI_PORT_A = 0,
ADV7604_PAD_HDMI_PORT_B = 1,
ADV7604_PAD_HDMI_PORT_C = 2,
ADV7604_PAD_HDMI_PORT_D = 3,
ADV7604_PAD_VGA_RGB = 4,
ADV7604_PAD_VGA_COMP = 5,
/* The source pad is either 1 (ADV7611) or 6 (ADV7604) */
ADV7604_PAD_SOURCE = 6,
ADV7611_PAD_SOURCE = 1,
ADV7604_PAD_MAX = 7,
};
#define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE (V4L2_CID_DV_CLASS_BASE + 0x1000)
#define V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL (V4L2_CID_DV_CLASS_BASE + 0x1001)
#define V4L2_CID_ADV_RX_FREE_RUN_COLOR (V4L2_CID_DV_CLASS_BASE + 0x1002)
/* notify events */
#define ADV7604_HOTPLUG 1
#define ADV7604_FMT_CHANGE 2
#endif

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/*
* adv7842 - Analog Devices ADV7842 video decoder driver
*
* Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
*
* This program is free software; you may redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
#ifndef _ADV7842_
#define _ADV7842_
/* Analog input muxing modes (AFE register 0x02, [2:0]) */
enum adv7842_ain_sel {
ADV7842_AIN1_2_3_NC_SYNC_1_2 = 0,
ADV7842_AIN4_5_6_NC_SYNC_2_1 = 1,
ADV7842_AIN7_8_9_NC_SYNC_3_1 = 2,
ADV7842_AIN10_11_12_NC_SYNC_4_1 = 3,
ADV7842_AIN9_4_5_6_SYNC_2_1 = 4,
};
/* Bus rotation and reordering (IO register 0x04, [7:5]) */
enum adv7842_op_ch_sel {
ADV7842_OP_CH_SEL_GBR = 0,
ADV7842_OP_CH_SEL_GRB = 1,
ADV7842_OP_CH_SEL_BGR = 2,
ADV7842_OP_CH_SEL_RGB = 3,
ADV7842_OP_CH_SEL_BRG = 4,
ADV7842_OP_CH_SEL_RBG = 5,
};
/* Mode of operation */
enum adv7842_mode {
ADV7842_MODE_SDP,
ADV7842_MODE_COMP,
ADV7842_MODE_RGB,
ADV7842_MODE_HDMI
};
/* Video standard select (IO register 0x00, [5:0]) */
enum adv7842_vid_std_select {
/* SDP */
ADV7842_SDP_VID_STD_CVBS_SD_4x1 = 0x01,
ADV7842_SDP_VID_STD_YC_SD4_x1 = 0x09,
/* RGB */
ADV7842_RGB_VID_STD_AUTO_GRAPH_MODE = 0x07,
/* HDMI GR */
ADV7842_HDMI_GR_VID_STD_AUTO_GRAPH_MODE = 0x02,
/* HDMI COMP */
ADV7842_HDMI_COMP_VID_STD_HD_1250P = 0x1e,
};
/* Input Color Space (IO register 0x02, [7:4]) */
enum adv7842_inp_color_space {
ADV7842_INP_COLOR_SPACE_LIM_RGB = 0,
ADV7842_INP_COLOR_SPACE_FULL_RGB = 1,
ADV7842_INP_COLOR_SPACE_LIM_YCbCr_601 = 2,
ADV7842_INP_COLOR_SPACE_LIM_YCbCr_709 = 3,
ADV7842_INP_COLOR_SPACE_XVYCC_601 = 4,
ADV7842_INP_COLOR_SPACE_XVYCC_709 = 5,
ADV7842_INP_COLOR_SPACE_FULL_YCbCr_601 = 6,
ADV7842_INP_COLOR_SPACE_FULL_YCbCr_709 = 7,
ADV7842_INP_COLOR_SPACE_AUTO = 0xf,
};
/* Select output format (IO register 0x03, [7:0]) */
enum adv7842_op_format_sel {
ADV7842_OP_FORMAT_SEL_SDR_ITU656_8 = 0x00,
ADV7842_OP_FORMAT_SEL_SDR_ITU656_10 = 0x01,
ADV7842_OP_FORMAT_SEL_SDR_ITU656_12_MODE0 = 0x02,
ADV7842_OP_FORMAT_SEL_SDR_ITU656_12_MODE1 = 0x06,
ADV7842_OP_FORMAT_SEL_SDR_ITU656_12_MODE2 = 0x0a,
ADV7842_OP_FORMAT_SEL_DDR_422_8 = 0x20,
ADV7842_OP_FORMAT_SEL_DDR_422_10 = 0x21,
ADV7842_OP_FORMAT_SEL_DDR_422_12_MODE0 = 0x22,
ADV7842_OP_FORMAT_SEL_DDR_422_12_MODE1 = 0x23,
ADV7842_OP_FORMAT_SEL_DDR_422_12_MODE2 = 0x24,
ADV7842_OP_FORMAT_SEL_SDR_444_24 = 0x40,
ADV7842_OP_FORMAT_SEL_SDR_444_30 = 0x41,
ADV7842_OP_FORMAT_SEL_SDR_444_36_MODE0 = 0x42,
ADV7842_OP_FORMAT_SEL_DDR_444_24 = 0x60,
ADV7842_OP_FORMAT_SEL_DDR_444_30 = 0x61,
ADV7842_OP_FORMAT_SEL_DDR_444_36 = 0x62,
ADV7842_OP_FORMAT_SEL_SDR_ITU656_16 = 0x80,
ADV7842_OP_FORMAT_SEL_SDR_ITU656_20 = 0x81,
ADV7842_OP_FORMAT_SEL_SDR_ITU656_24_MODE0 = 0x82,
ADV7842_OP_FORMAT_SEL_SDR_ITU656_24_MODE1 = 0x86,
ADV7842_OP_FORMAT_SEL_SDR_ITU656_24_MODE2 = 0x8a,
};
enum adv7842_select_input {
ADV7842_SELECT_HDMI_PORT_A,
ADV7842_SELECT_HDMI_PORT_B,
ADV7842_SELECT_VGA_RGB,
ADV7842_SELECT_VGA_COMP,
ADV7842_SELECT_SDP_CVBS,
ADV7842_SELECT_SDP_YC,
};
enum adv7842_drive_strength {
ADV7842_DR_STR_LOW = 0,
ADV7842_DR_STR_MEDIUM_LOW = 1,
ADV7842_DR_STR_MEDIUM_HIGH = 2,
ADV7842_DR_STR_HIGH = 3,
};
struct adv7842_sdp_csc_coeff {
bool manual;
uint16_t scaling;
uint16_t A1;
uint16_t A2;
uint16_t A3;
uint16_t A4;
uint16_t B1;
uint16_t B2;
uint16_t B3;
uint16_t B4;
uint16_t C1;
uint16_t C2;
uint16_t C3;
uint16_t C4;
};
struct adv7842_sdp_io_sync_adjustment {
bool adjust;
uint16_t hs_beg;
uint16_t hs_width;
uint16_t de_beg;
uint16_t de_end;
uint8_t vs_beg_o;
uint8_t vs_beg_e;
uint8_t vs_end_o;
uint8_t vs_end_e;
uint8_t de_v_beg_o;
uint8_t de_v_beg_e;
uint8_t de_v_end_o;
uint8_t de_v_end_e;
};
/* Platform dependent definition */
struct adv7842_platform_data {
/* chip reset during probe */
unsigned chip_reset:1;
/* DIS_PWRDNB: 1 if the PWRDNB pin is unused and unconnected */
unsigned disable_pwrdnb:1;
/* DIS_CABLE_DET_RST: 1 if the 5V pins are unused and unconnected */
unsigned disable_cable_det_rst:1;
/* Analog input muxing mode */
enum adv7842_ain_sel ain_sel;
/* Bus rotation and reordering */
enum adv7842_op_ch_sel op_ch_sel;
/* Default mode */
enum adv7842_mode mode;
/* Default input */
unsigned input;
/* Video standard */
enum adv7842_vid_std_select vid_std_select;
/* Select output format */
enum adv7842_op_format_sel op_format_sel;
/* IO register 0x02 */
unsigned alt_gamma:1;
unsigned op_656_range:1;
unsigned rgb_out:1;
unsigned alt_data_sat:1;
/* IO register 0x05 */
unsigned blank_data:1;
unsigned insert_av_codes:1;
unsigned replicate_av_codes:1;
unsigned invert_cbcr:1;
/* IO register 0x30 */
unsigned output_bus_lsb_to_msb:1;
/* IO register 0x14 */
enum adv7842_drive_strength dr_str_data;
enum adv7842_drive_strength dr_str_clk;
enum adv7842_drive_strength dr_str_sync;
/*
* IO register 0x19: Adjustment to the LLC DLL phase in
* increments of 1/32 of a clock period.
*/
unsigned llc_dll_phase:5;
/* External RAM for 3-D comb or frame synchronizer */
unsigned sd_ram_size; /* ram size in MB */
unsigned sd_ram_ddr:1; /* ddr or sdr sdram */
/* HDMI free run, CP-reg 0xBA */
unsigned hdmi_free_run_enable:1;
/* 0 = Mode 0: run when there is no TMDS clock
1 = Mode 1: run when there is no TMDS clock or the
video resolution does not match programmed one. */
unsigned hdmi_free_run_mode:1;
/* SDP free run, CP-reg 0xDD */
unsigned sdp_free_run_auto:1;
unsigned sdp_free_run_man_col_en:1;
unsigned sdp_free_run_cbar_en:1;
unsigned sdp_free_run_force:1;
/* HPA manual (0) or auto (1), affects HDMI register 0x69 */
unsigned hpa_auto:1;
struct adv7842_sdp_csc_coeff sdp_csc_coeff;
struct adv7842_sdp_io_sync_adjustment sdp_io_sync_625;
struct adv7842_sdp_io_sync_adjustment sdp_io_sync_525;
/* i2c addresses */
u8 i2c_sdp_io;
u8 i2c_sdp;
u8 i2c_cp;
u8 i2c_vdp;
u8 i2c_afe;
u8 i2c_hdmi;
u8 i2c_repeater;
u8 i2c_edid;
u8 i2c_infoframe;
u8 i2c_cec;
u8 i2c_avlink;
};
#define V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE (V4L2_CID_DV_CLASS_BASE + 0x1000)
#define V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL (V4L2_CID_DV_CLASS_BASE + 0x1001)
#define V4L2_CID_ADV_RX_FREE_RUN_COLOR (V4L2_CID_DV_CLASS_BASE + 0x1002)
/* notify events */
#define ADV7842_FMT_CHANGE 1
/* custom ioctl, used to test the external RAM that's used by the
* deinterlacer. */
#define ADV7842_CMD_RAM_TEST _IO('V', BASE_VIDIOC_PRIVATE)
#define ADV7842_EDID_PORT_A 0
#define ADV7842_EDID_PORT_B 1
#define ADV7842_EDID_PORT_VGA 2
#endif

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/*
* Header for AK8813 / AK8814 TV-ecoders from Asahi Kasei Microsystems Co., Ltd. (AKM)
*
* Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef AK881X_H
#define AK881X_H
#define AK881X_IF_MODE_MASK (3 << 0)
#define AK881X_IF_MODE_BT656 (0 << 0)
#define AK881X_IF_MODE_MASTER (1 << 0)
#define AK881X_IF_MODE_SLAVE (2 << 0)
#define AK881X_FIELD (1 << 2)
#define AK881X_COMPONENT (1 << 3)
struct ak881x_pdata {
unsigned long flags;
};
#endif

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/*
* include/media/as3645a.h
*
* Copyright (C) 2008-2011 Nokia Corporation
*
* Contact: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef __AS3645A_H__
#define __AS3645A_H__
#include <media/v4l2-subdev.h>
#define AS3645A_NAME "as3645a"
#define AS3645A_I2C_ADDR (0x60 >> 1) /* W:0x60, R:0x61 */
#define AS3645A_FLASH_TIMEOUT_MIN 100000 /* us */
#define AS3645A_FLASH_TIMEOUT_MAX 850000
#define AS3645A_FLASH_TIMEOUT_STEP 50000
#define AS3645A_FLASH_INTENSITY_MIN 200 /* mA */
#define AS3645A_FLASH_INTENSITY_MAX_1LED 500
#define AS3645A_FLASH_INTENSITY_MAX_2LEDS 400
#define AS3645A_FLASH_INTENSITY_STEP 20
#define AS3645A_TORCH_INTENSITY_MIN 20 /* mA */
#define AS3645A_TORCH_INTENSITY_MAX 160
#define AS3645A_TORCH_INTENSITY_STEP 20
#define AS3645A_INDICATOR_INTENSITY_MIN 0 /* uA */
#define AS3645A_INDICATOR_INTENSITY_MAX 10000
#define AS3645A_INDICATOR_INTENSITY_STEP 2500
/*
* as3645a_platform_data - Flash controller platform data
* @set_power: Set power callback
* @vref: VREF offset (0=0V, 1=+0.3V, 2=-0.3V, 3=+0.6V)
* @peak: Inductor peak current limit (0=1.25A, 1=1.5A, 2=1.75A, 3=2.0A)
* @ext_strobe: True if external flash strobe can be used
* @flash_max_current: Max flash current (mA, <= AS3645A_FLASH_INTENSITY_MAX)
* @torch_max_current: Max torch current (mA, >= AS3645A_TORCH_INTENSITY_MAX)
* @timeout_max: Max flash timeout (us, <= AS3645A_FLASH_TIMEOUT_MAX)
*/
struct as3645a_platform_data {
int (*set_power)(struct v4l2_subdev *subdev, int on);
unsigned int vref;
unsigned int peak;
bool ext_strobe;
/* Flash and torch currents and timeout limits */
unsigned int flash_max_current;
unsigned int torch_max_current;
unsigned int timeout_max;
};
#endif /* __AS3645A_H__ */

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/*
* Register definitions for the Atmel Image Sensor Interface.
*
* Copyright (C) 2011 Atmel Corporation
* Josh Wu, <josh.wu@atmel.com>
*
* Based on previous work by Lars Haring, <lars.haring@atmel.com>
* and Sedji Gaouaou
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ATMEL_ISI_H__
#define __ATMEL_ISI_H__
#include <linux/types.h>
/* ISI_V2 register offsets */
#define ISI_CFG1 0x0000
#define ISI_CFG2 0x0004
#define ISI_PSIZE 0x0008
#define ISI_PDECF 0x000c
#define ISI_Y2R_SET0 0x0010
#define ISI_Y2R_SET1 0x0014
#define ISI_R2Y_SET0 0x0018
#define ISI_R2Y_SET1 0x001C
#define ISI_R2Y_SET2 0x0020
#define ISI_CTRL 0x0024
#define ISI_STATUS 0x0028
#define ISI_INTEN 0x002C
#define ISI_INTDIS 0x0030
#define ISI_INTMASK 0x0034
#define ISI_DMA_CHER 0x0038
#define ISI_DMA_CHDR 0x003C
#define ISI_DMA_CHSR 0x0040
#define ISI_DMA_P_ADDR 0x0044
#define ISI_DMA_P_CTRL 0x0048
#define ISI_DMA_P_DSCR 0x004C
#define ISI_DMA_C_ADDR 0x0050
#define ISI_DMA_C_CTRL 0x0054
#define ISI_DMA_C_DSCR 0x0058
/* Bitfields in CFG1 */
#define ISI_CFG1_HSYNC_POL_ACTIVE_LOW (1 << 2)
#define ISI_CFG1_VSYNC_POL_ACTIVE_LOW (1 << 3)
#define ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING (1 << 4)
#define ISI_CFG1_EMB_SYNC (1 << 6)
#define ISI_CFG1_CRC_SYNC (1 << 7)
/* Constants for FRATE(ISI_V2) */
#define ISI_CFG1_FRATE_CAPTURE_ALL (0 << 8)
#define ISI_CFG1_FRATE_DIV_2 (1 << 8)
#define ISI_CFG1_FRATE_DIV_3 (2 << 8)
#define ISI_CFG1_FRATE_DIV_4 (3 << 8)
#define ISI_CFG1_FRATE_DIV_5 (4 << 8)
#define ISI_CFG1_FRATE_DIV_6 (5 << 8)
#define ISI_CFG1_FRATE_DIV_7 (6 << 8)
#define ISI_CFG1_FRATE_DIV_8 (7 << 8)
#define ISI_CFG1_FRATE_DIV_MASK (7 << 8)
#define ISI_CFG1_DISCR (1 << 11)
#define ISI_CFG1_FULL_MODE (1 << 12)
/* Bitfields in CFG2 */
#define ISI_CFG2_GRAYSCALE (1 << 13)
/* Constants for YCC_SWAP(ISI_V2) */
#define ISI_CFG2_YCC_SWAP_DEFAULT (0 << 28)
#define ISI_CFG2_YCC_SWAP_MODE_1 (1 << 28)
#define ISI_CFG2_YCC_SWAP_MODE_2 (2 << 28)
#define ISI_CFG2_YCC_SWAP_MODE_3 (3 << 28)
#define ISI_CFG2_YCC_SWAP_MODE_MASK (3 << 28)
#define ISI_CFG2_IM_VSIZE_OFFSET 0
#define ISI_CFG2_IM_HSIZE_OFFSET 16
#define ISI_CFG2_IM_VSIZE_MASK (0x7FF << ISI_CFG2_IM_VSIZE_OFFSET)
#define ISI_CFG2_IM_HSIZE_MASK (0x7FF << ISI_CFG2_IM_HSIZE_OFFSET)
/* Bitfields in CTRL */
/* Also using in SR(ISI_V2) */
#define ISI_CTRL_EN (1 << 0)
#define ISI_CTRL_CDC (1 << 8)
/* Also using in SR/IER/IDR/IMR(ISI_V2) */
#define ISI_CTRL_DIS (1 << 1)
#define ISI_CTRL_SRST (1 << 2)
/* Bitfields in SR */
#define ISI_SR_SIP (1 << 19)
/* Also using in SR/IER/IDR/IMR */
#define ISI_SR_VSYNC (1 << 10)
#define ISI_SR_PXFR_DONE (1 << 16)
#define ISI_SR_CXFR_DONE (1 << 17)
#define ISI_SR_P_OVR (1 << 24)
#define ISI_SR_C_OVR (1 << 25)
#define ISI_SR_CRC_ERR (1 << 26)
#define ISI_SR_FR_OVR (1 << 27)
/* Bitfields in DMA_C_CTRL & in DMA_P_CTRL */
#define ISI_DMA_CTRL_FETCH (1 << 0)
#define ISI_DMA_CTRL_WB (1 << 1)
#define ISI_DMA_CTRL_IEN (1 << 2)
#define ISI_DMA_CTRL_DONE (1 << 3)
/* Bitfields in DMA_CHSR/CHER/CHDR */
#define ISI_DMA_CHSR_P_CH (1 << 0)
#define ISI_DMA_CHSR_C_CH (1 << 1)
/* Definition for isi_platform_data */
#define ISI_DATAWIDTH_8 0x01
#define ISI_DATAWIDTH_10 0x02
struct v4l2_async_subdev;
struct isi_platform_data {
u8 has_emb_sync;
u8 emb_crc_sync;
u8 hsync_act_low;
u8 vsync_act_low;
u8 pclk_act_falling;
u8 full_mode;
u32 data_width_flags;
/* Using for ISI_CFG1 */
u32 frate;
/* Using for ISI_MCK */
u32 mck_hz;
struct v4l2_async_subdev **asd; /* Flat array, arranged in groups */
int *asd_sizes; /* 0-terminated array of asd group sizes */
};
#endif /* __ATMEL_ISI_H__ */

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#ifndef _BFIN_CAPTURE_H_
#define _BFIN_CAPTURE_H_
#include <linux/i2c.h>
struct v4l2_input;
struct ppi_info;
struct bcap_route {
u32 input;
u32 output;
u32 ppi_control;
};
struct bfin_capture_config {
/* card name */
char *card_name;
/* inputs available at the sub device */
struct v4l2_input *inputs;
/* number of inputs supported */
int num_inputs;
/* routing information for each input */
struct bcap_route *routes;
/* i2c bus adapter no */
int i2c_adapter_id;
/* i2c subdevice board info */
struct i2c_board_info board_info;
/* ppi board info */
const struct ppi_info *ppi_info;
/* ppi control */
unsigned long ppi_control;
/* ppi interrupt mask */
u32 int_mask;
/* horizontal blanking pixels */
int blank_pixels;
};
#endif

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/*
* Analog Devices PPI header file
*
* Copyright (c) 2011 Analog Devices Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PPI_H_
#define _PPI_H_
#include <linux/interrupt.h>
#include <asm/blackfin.h>
#include <asm/bfin_ppi.h>
/* EPPI */
#ifdef EPPI_EN
#define PORT_EN EPPI_EN
#define PORT_DIR EPPI_DIR
#define DMA32 0
#define PACK_EN PACKEN
#endif
/* EPPI3 */
#ifdef EPPI0_CTL2
#define PORT_EN EPPI_CTL_EN
#define PORT_DIR EPPI_CTL_DIR
#define PACK_EN EPPI_CTL_PACKEN
#define DMA32 0
#define DLEN_8 EPPI_CTL_DLEN08
#define DLEN_16 EPPI_CTL_DLEN16
#endif
struct ppi_if;
struct ppi_params {
u32 width; /* width in pixels */
u32 height; /* height in lines */
u32 hdelay; /* delay after the HSYNC in pixels */
u32 vdelay; /* delay after the VSYNC in lines */
u32 line; /* total pixels per line */
u32 frame; /* total lines per frame */
u32 hsync; /* HSYNC length in pixels */
u32 vsync; /* VSYNC length in lines */
int bpp; /* bits per pixel */
int dlen; /* data length for ppi in bits */
u32 ppi_control; /* ppi configuration */
u32 int_mask; /* interrupt mask */
};
struct ppi_ops {
int (*attach_irq)(struct ppi_if *ppi, irq_handler_t handler);
void (*detach_irq)(struct ppi_if *ppi);
int (*start)(struct ppi_if *ppi);
int (*stop)(struct ppi_if *ppi);
int (*set_params)(struct ppi_if *ppi, struct ppi_params *params);
void (*update_addr)(struct ppi_if *ppi, unsigned long addr);
};
enum ppi_type {
PPI_TYPE_PPI,
PPI_TYPE_EPPI,
PPI_TYPE_EPPI3,
};
struct ppi_info {
enum ppi_type type;
int dma_ch;
int irq_err;
void __iomem *base;
const unsigned short *pin_req;
};
struct ppi_if {
struct device *dev;
unsigned long ppi_control;
const struct ppi_ops *ops;
const struct ppi_info *info;
bool err_int; /* if we need request error interrupt */
bool err; /* if ppi has fifo error */
void *priv;
};
struct ppi_if *ppi_create_instance(struct platform_device *pdev,
const struct ppi_info *info);
void ppi_delete_instance(struct ppi_if *ppi);
#endif

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/*
bt819.h - bt819 notifications
Copyright (C) 2009 Hans Verkuil (hverkuil@xs4all.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _BT819_H_
#define _BT819_H_
#include <linux/ioctl.h>
/* v4l2_device notifications. */
/* Needed to reset the FIFO buffer when changing the input
or the video standard.
Note: these ioctls that internal to the kernel and are never called
from userspace. */
#define BT819_FIFO_RESET_LOW _IO('b', 0)
#define BT819_FIFO_RESET_HIGH _IO('b', 1)
#endif

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/*
cs5345.h - definition for cs5345 inputs and outputs
Copyright (C) 2007 Hans Verkuil (hverkuil@xs4all.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _CS5345_H_
#define _CS5345_H_
/* CS5345 HW inputs */
#define CS5345_IN_MIC 0
#define CS5345_IN_1 1
#define CS5345_IN_2 2
#define CS5345_IN_3 3
#define CS5345_IN_4 4
#define CS5345_IN_5 5
#define CS5345_IN_6 6
#define CS5345_MCLK_1 0x00
#define CS5345_MCLK_1_5 0x10
#define CS5345_MCLK_2 0x20
#define CS5345_MCLK_3 0x30
#define CS5345_MCLK_4 0x40
#endif

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/*
cs53l32a.h - definition for cs53l32a inputs and outputs
Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _CS53L32A_H_
#define _CS53L32A_H_
/* There are 2 physical inputs, but the second input can be
placed in two modes, the first mode bypasses the PGA (gain),
the second goes through the PGA. Hence there are three
possible inputs to choose from. */
/* CS53L32A HW inputs */
#define CS53L32A_IN0 0
#define CS53L32A_IN1 1
#define CS53L32A_IN2 2
#endif

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/*
cx23415/6/8 header containing common defines.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef CX2341X_H
#define CX2341X_H
#include <media/v4l2-ctrls.h>
enum cx2341x_port {
CX2341X_PORT_MEMORY = 0,
CX2341X_PORT_STREAMING = 1,
CX2341X_PORT_SERIAL = 2
};
enum cx2341x_cap {
CX2341X_CAP_HAS_SLICED_VBI = 1 << 0,
CX2341X_CAP_HAS_TS = 1 << 1,
CX2341X_CAP_HAS_AC3 = 1 << 2,
};
struct cx2341x_mpeg_params {
/* misc */
u32 capabilities;
enum cx2341x_port port;
u16 width;
u16 height;
u16 is_50hz;
/* stream */
enum v4l2_mpeg_stream_type stream_type;
enum v4l2_mpeg_stream_vbi_fmt stream_vbi_fmt;
u16 stream_insert_nav_packets;
/* audio */
enum v4l2_mpeg_audio_sampling_freq audio_sampling_freq;
enum v4l2_mpeg_audio_encoding audio_encoding;
enum v4l2_mpeg_audio_l2_bitrate audio_l2_bitrate;
enum v4l2_mpeg_audio_ac3_bitrate audio_ac3_bitrate;
enum v4l2_mpeg_audio_mode audio_mode;
enum v4l2_mpeg_audio_mode_extension audio_mode_extension;
enum v4l2_mpeg_audio_emphasis audio_emphasis;
enum v4l2_mpeg_audio_crc audio_crc;
u32 audio_properties;
u16 audio_mute;
/* video */
enum v4l2_mpeg_video_encoding video_encoding;
enum v4l2_mpeg_video_aspect video_aspect;
u16 video_b_frames;
u16 video_gop_size;
u16 video_gop_closure;
enum v4l2_mpeg_video_bitrate_mode video_bitrate_mode;
u32 video_bitrate;
u32 video_bitrate_peak;
u16 video_temporal_decimation;
u16 video_mute;
u32 video_mute_yuv;
/* encoding filters */
enum v4l2_mpeg_cx2341x_video_spatial_filter_mode video_spatial_filter_mode;
u16 video_spatial_filter;
enum v4l2_mpeg_cx2341x_video_luma_spatial_filter_type video_luma_spatial_filter_type;
enum v4l2_mpeg_cx2341x_video_chroma_spatial_filter_type video_chroma_spatial_filter_type;
enum v4l2_mpeg_cx2341x_video_temporal_filter_mode video_temporal_filter_mode;
u16 video_temporal_filter;
enum v4l2_mpeg_cx2341x_video_median_filter_type video_median_filter_type;
u16 video_luma_median_filter_top;
u16 video_luma_median_filter_bottom;
u16 video_chroma_median_filter_top;
u16 video_chroma_median_filter_bottom;
};
#define CX2341X_MBOX_MAX_DATA 16
extern const u32 cx2341x_mpeg_ctrls[];
typedef int (*cx2341x_mbox_func)(void *priv, u32 cmd, int in, int out,
u32 data[CX2341X_MBOX_MAX_DATA]);
int cx2341x_update(void *priv, cx2341x_mbox_func func,
const struct cx2341x_mpeg_params *old,
const struct cx2341x_mpeg_params *new);
int cx2341x_ctrl_query(const struct cx2341x_mpeg_params *params,
struct v4l2_queryctrl *qctrl);
const char * const *cx2341x_ctrl_get_menu(const struct cx2341x_mpeg_params *p, u32 id);
int cx2341x_ext_ctrls(struct cx2341x_mpeg_params *params, int busy,
struct v4l2_ext_controls *ctrls, unsigned int cmd);
void cx2341x_fill_defaults(struct cx2341x_mpeg_params *p);
void cx2341x_log_status(const struct cx2341x_mpeg_params *p, const char *prefix);
struct cx2341x_handler;
struct cx2341x_handler_ops {
/* needed for the video clock freq */
int (*s_audio_sampling_freq)(struct cx2341x_handler *hdl, u32 val);
/* needed for dualwatch */
int (*s_audio_mode)(struct cx2341x_handler *hdl, u32 val);
/* needed for setting up the video resolution */
int (*s_video_encoding)(struct cx2341x_handler *hdl, u32 val);
/* needed for setting up the sliced vbi insertion data structures */
int (*s_stream_vbi_fmt)(struct cx2341x_handler *hdl, u32 val);
};
struct cx2341x_handler {
u32 capabilities;
enum cx2341x_port port;
u16 width;
u16 height;
u16 is_50hz;
u32 audio_properties;
struct v4l2_ctrl_handler hdl;
void *priv;
cx2341x_mbox_func func;
const struct cx2341x_handler_ops *ops;
struct v4l2_ctrl *stream_vbi_fmt;
struct {
/* audio cluster */
struct v4l2_ctrl *audio_sampling_freq;
struct v4l2_ctrl *audio_encoding;
struct v4l2_ctrl *audio_l2_bitrate;
struct v4l2_ctrl *audio_mode;
struct v4l2_ctrl *audio_mode_extension;
struct v4l2_ctrl *audio_emphasis;
struct v4l2_ctrl *audio_crc;
struct v4l2_ctrl *audio_ac3_bitrate;
};
struct {
/* video gop cluster */
struct v4l2_ctrl *video_b_frames;
struct v4l2_ctrl *video_gop_size;
};
struct {
/* stream type cluster */
struct v4l2_ctrl *stream_type;
struct v4l2_ctrl *video_encoding;
struct v4l2_ctrl *video_bitrate_mode;
struct v4l2_ctrl *video_bitrate;
struct v4l2_ctrl *video_bitrate_peak;
};
struct {
/* video mute cluster */
struct v4l2_ctrl *video_mute;
struct v4l2_ctrl *video_mute_yuv;
};
struct {
/* video filter mode cluster */
struct v4l2_ctrl *video_spatial_filter_mode;
struct v4l2_ctrl *video_temporal_filter_mode;
struct v4l2_ctrl *video_median_filter_type;
};
struct {
/* video filter type cluster */
struct v4l2_ctrl *video_luma_spatial_filter_type;
struct v4l2_ctrl *video_chroma_spatial_filter_type;
};
struct {
/* video filter cluster */
struct v4l2_ctrl *video_spatial_filter;
struct v4l2_ctrl *video_temporal_filter;
};
struct {
/* video median cluster */
struct v4l2_ctrl *video_luma_median_filter_top;
struct v4l2_ctrl *video_luma_median_filter_bottom;
struct v4l2_ctrl *video_chroma_median_filter_top;
struct v4l2_ctrl *video_chroma_median_filter_bottom;
};
};
int cx2341x_handler_init(struct cx2341x_handler *cxhdl,
unsigned nr_of_controls_hint);
void cx2341x_handler_set_50hz(struct cx2341x_handler *cxhdl, int is_50hz);
int cx2341x_handler_setup(struct cx2341x_handler *cxhdl);
void cx2341x_handler_set_busy(struct cx2341x_handler *cxhdl, int busy);
/* Firmware names */
#define CX2341X_FIRM_ENC_FILENAME "v4l-cx2341x-enc.fw"
/* Decoder firmware for the cx23415 only */
#define CX2341X_FIRM_DEC_FILENAME "v4l-cx2341x-dec.fw"
/* Firmware API commands */
/* MPEG decoder API, specific to the cx23415 */
#define CX2341X_DEC_PING_FW 0x00
#define CX2341X_DEC_START_PLAYBACK 0x01
#define CX2341X_DEC_STOP_PLAYBACK 0x02
#define CX2341X_DEC_SET_PLAYBACK_SPEED 0x03
#define CX2341X_DEC_STEP_VIDEO 0x05
#define CX2341X_DEC_SET_DMA_BLOCK_SIZE 0x08
#define CX2341X_DEC_GET_XFER_INFO 0x09
#define CX2341X_DEC_GET_DMA_STATUS 0x0a
#define CX2341X_DEC_SCHED_DMA_FROM_HOST 0x0b
#define CX2341X_DEC_PAUSE_PLAYBACK 0x0d
#define CX2341X_DEC_HALT_FW 0x0e
#define CX2341X_DEC_SET_STANDARD 0x10
#define CX2341X_DEC_GET_VERSION 0x11
#define CX2341X_DEC_SET_STREAM_INPUT 0x14
#define CX2341X_DEC_GET_TIMING_INFO 0x15
#define CX2341X_DEC_SET_AUDIO_MODE 0x16
#define CX2341X_DEC_SET_EVENT_NOTIFICATION 0x17
#define CX2341X_DEC_SET_DISPLAY_BUFFERS 0x18
#define CX2341X_DEC_EXTRACT_VBI 0x19
#define CX2341X_DEC_SET_DECODER_SOURCE 0x1a
#define CX2341X_DEC_SET_PREBUFFERING 0x1e
/* MPEG encoder API */
#define CX2341X_ENC_PING_FW 0x80
#define CX2341X_ENC_START_CAPTURE 0x81
#define CX2341X_ENC_STOP_CAPTURE 0x82
#define CX2341X_ENC_SET_AUDIO_ID 0x89
#define CX2341X_ENC_SET_VIDEO_ID 0x8b
#define CX2341X_ENC_SET_PCR_ID 0x8d
#define CX2341X_ENC_SET_FRAME_RATE 0x8f
#define CX2341X_ENC_SET_FRAME_SIZE 0x91
#define CX2341X_ENC_SET_BIT_RATE 0x95
#define CX2341X_ENC_SET_GOP_PROPERTIES 0x97
#define CX2341X_ENC_SET_ASPECT_RATIO 0x99
#define CX2341X_ENC_SET_DNR_FILTER_MODE 0x9b
#define CX2341X_ENC_SET_DNR_FILTER_PROPS 0x9d
#define CX2341X_ENC_SET_CORING_LEVELS 0x9f
#define CX2341X_ENC_SET_SPATIAL_FILTER_TYPE 0xa1
#define CX2341X_ENC_SET_VBI_LINE 0xb7
#define CX2341X_ENC_SET_STREAM_TYPE 0xb9
#define CX2341X_ENC_SET_OUTPUT_PORT 0xbb
#define CX2341X_ENC_SET_AUDIO_PROPERTIES 0xbd
#define CX2341X_ENC_HALT_FW 0xc3
#define CX2341X_ENC_GET_VERSION 0xc4
#define CX2341X_ENC_SET_GOP_CLOSURE 0xc5
#define CX2341X_ENC_GET_SEQ_END 0xc6
#define CX2341X_ENC_SET_PGM_INDEX_INFO 0xc7
#define CX2341X_ENC_SET_VBI_CONFIG 0xc8
#define CX2341X_ENC_SET_DMA_BLOCK_SIZE 0xc9
#define CX2341X_ENC_GET_PREV_DMA_INFO_MB_10 0xca
#define CX2341X_ENC_GET_PREV_DMA_INFO_MB_9 0xcb
#define CX2341X_ENC_SCHED_DMA_TO_HOST 0xcc
#define CX2341X_ENC_INITIALIZE_INPUT 0xcd
#define CX2341X_ENC_SET_FRAME_DROP_RATE 0xd0
#define CX2341X_ENC_PAUSE_ENCODER 0xd2
#define CX2341X_ENC_REFRESH_INPUT 0xd3
#define CX2341X_ENC_SET_COPYRIGHT 0xd4
#define CX2341X_ENC_SET_EVENT_NOTIFICATION 0xd5
#define CX2341X_ENC_SET_NUM_VSYNC_LINES 0xd6
#define CX2341X_ENC_SET_PLACEHOLDER 0xd7
#define CX2341X_ENC_MUTE_VIDEO 0xd9
#define CX2341X_ENC_MUTE_AUDIO 0xda
#define CX2341X_ENC_SET_VERT_CROP_LINE 0xdb
#define CX2341X_ENC_MISC 0xdc
/* OSD API, specific to the cx23415 */
#define CX2341X_OSD_GET_FRAMEBUFFER 0x41
#define CX2341X_OSD_GET_PIXEL_FORMAT 0x42
#define CX2341X_OSD_SET_PIXEL_FORMAT 0x43
#define CX2341X_OSD_GET_STATE 0x44
#define CX2341X_OSD_SET_STATE 0x45
#define CX2341X_OSD_GET_OSD_COORDS 0x46
#define CX2341X_OSD_SET_OSD_COORDS 0x47
#define CX2341X_OSD_GET_SCREEN_COORDS 0x48
#define CX2341X_OSD_SET_SCREEN_COORDS 0x49
#define CX2341X_OSD_GET_GLOBAL_ALPHA 0x4a
#define CX2341X_OSD_SET_GLOBAL_ALPHA 0x4b
#define CX2341X_OSD_SET_BLEND_COORDS 0x4c
#define CX2341X_OSD_GET_FLICKER_STATE 0x4f
#define CX2341X_OSD_SET_FLICKER_STATE 0x50
#define CX2341X_OSD_BLT_COPY 0x52
#define CX2341X_OSD_BLT_FILL 0x53
#define CX2341X_OSD_BLT_TEXT 0x54
#define CX2341X_OSD_SET_FRAMEBUFFER_WINDOW 0x56
#define CX2341X_OSD_SET_CHROMA_KEY 0x60
#define CX2341X_OSD_GET_ALPHA_CONTENT_INDEX 0x61
#define CX2341X_OSD_SET_ALPHA_CONTENT_INDEX 0x62
#endif /* CX2341X_H */

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/*
cx25840.h - definition for cx25840/1/2/3 inputs
Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _CX25840_H_
#define _CX25840_H_
/* Note that the cx25840 driver requires that the bridge driver calls the
v4l2_subdev's init operation in order to load the driver's firmware.
Without this the audio standard detection will fail and you will
only get mono.
Since loading the firmware is often problematic when the driver is
compiled into the kernel I recommend postponing calling this function
until the first open of the video device. Another reason for
postponing it is that loading this firmware takes a long time (seconds)
due to the slow i2c bus speed. So it will speed up the boot process if
you can avoid loading the fw as long as the video device isn't used. */
enum cx25840_video_input {
/* Composite video inputs In1-In8 */
CX25840_COMPOSITE1 = 1,
CX25840_COMPOSITE2,
CX25840_COMPOSITE3,
CX25840_COMPOSITE4,
CX25840_COMPOSITE5,
CX25840_COMPOSITE6,
CX25840_COMPOSITE7,
CX25840_COMPOSITE8,
/* S-Video inputs consist of one luma input (In1-In8) ORed with one
chroma input (In5-In8) */
CX25840_SVIDEO_LUMA1 = 0x10,
CX25840_SVIDEO_LUMA2 = 0x20,
CX25840_SVIDEO_LUMA3 = 0x30,
CX25840_SVIDEO_LUMA4 = 0x40,
CX25840_SVIDEO_LUMA5 = 0x50,
CX25840_SVIDEO_LUMA6 = 0x60,
CX25840_SVIDEO_LUMA7 = 0x70,
CX25840_SVIDEO_LUMA8 = 0x80,
CX25840_SVIDEO_CHROMA4 = 0x400,
CX25840_SVIDEO_CHROMA5 = 0x500,
CX25840_SVIDEO_CHROMA6 = 0x600,
CX25840_SVIDEO_CHROMA7 = 0x700,
CX25840_SVIDEO_CHROMA8 = 0x800,
/* S-Video aliases for common luma/chroma combinations */
CX25840_SVIDEO1 = 0x510,
CX25840_SVIDEO2 = 0x620,
CX25840_SVIDEO3 = 0x730,
CX25840_SVIDEO4 = 0x840,
/* Allow frames to specify specific input configurations */
CX25840_VIN1_CH1 = 0x80000000,
CX25840_VIN2_CH1 = 0x80000001,
CX25840_VIN3_CH1 = 0x80000002,
CX25840_VIN4_CH1 = 0x80000003,
CX25840_VIN5_CH1 = 0x80000004,
CX25840_VIN6_CH1 = 0x80000005,
CX25840_VIN7_CH1 = 0x80000006,
CX25840_VIN8_CH1 = 0x80000007,
CX25840_VIN4_CH2 = 0x80000000,
CX25840_VIN5_CH2 = 0x80000010,
CX25840_VIN6_CH2 = 0x80000020,
CX25840_NONE_CH2 = 0x80000030,
CX25840_VIN7_CH3 = 0x80000000,
CX25840_VIN8_CH3 = 0x80000040,
CX25840_NONE0_CH3 = 0x80000080,
CX25840_NONE1_CH3 = 0x800000c0,
CX25840_SVIDEO_ON = 0x80000100,
CX25840_COMPONENT_ON = 0x80000200,
CX25840_DIF_ON = 0x80000400,
};
enum cx25840_audio_input {
/* Audio inputs: serial or In4-In8 */
CX25840_AUDIO_SERIAL,
CX25840_AUDIO4 = 4,
CX25840_AUDIO5,
CX25840_AUDIO6,
CX25840_AUDIO7,
CX25840_AUDIO8,
};
enum cx25840_io_pin {
CX25840_PIN_DVALID_PRGM0 = 0,
CX25840_PIN_FIELD_PRGM1,
CX25840_PIN_HRESET_PRGM2,
CX25840_PIN_VRESET_HCTL_PRGM3,
CX25840_PIN_IRQ_N_PRGM4,
CX25840_PIN_IR_TX_PRGM6,
CX25840_PIN_IR_RX_PRGM5,
CX25840_PIN_GPIO0_PRGM8,
CX25840_PIN_GPIO1_PRGM9,
CX25840_PIN_SA_SDIN, /* Alternate GP Input only */
CX25840_PIN_SA_SDOUT, /* Alternate GP Input only */
CX25840_PIN_PLL_CLK_PRGM7,
CX25840_PIN_CHIP_SEL_VIPCLK, /* Output only */
};
enum cx25840_io_pad {
/* Output pads */
CX25840_PAD_DEFAULT = 0,
CX25840_PAD_ACTIVE,
CX25840_PAD_VACTIVE,
CX25840_PAD_CBFLAG,
CX25840_PAD_VID_DATA_EXT0,
CX25840_PAD_VID_DATA_EXT1,
CX25840_PAD_GPO0,
CX25840_PAD_GPO1,
CX25840_PAD_GPO2,
CX25840_PAD_GPO3,
CX25840_PAD_IRQ_N,
CX25840_PAD_AC_SYNC,
CX25840_PAD_AC_SDOUT,
CX25840_PAD_PLL_CLK,
CX25840_PAD_VRESET,
CX25840_PAD_RESERVED,
/* Pads for PLL_CLK output only */
CX25840_PAD_XTI_X5_DLL,
CX25840_PAD_AUX_PLL,
CX25840_PAD_VID_PLL,
CX25840_PAD_XTI,
/* Input Pads */
CX25840_PAD_GPI0,
CX25840_PAD_GPI1,
CX25840_PAD_GPI2,
CX25840_PAD_GPI3,
};
enum cx25840_io_pin_strength {
CX25840_PIN_DRIVE_MEDIUM = 0,
CX25840_PIN_DRIVE_SLOW,
CX25840_PIN_DRIVE_FAST,
};
enum cx23885_io_pin {
CX23885_PIN_IR_RX_GPIO19,
CX23885_PIN_IR_TX_GPIO20,
CX23885_PIN_I2S_SDAT_GPIO21,
CX23885_PIN_I2S_WCLK_GPIO22,
CX23885_PIN_I2S_BCLK_GPIO23,
CX23885_PIN_IRQ_N_GPIO16,
};
enum cx23885_io_pad {
CX23885_PAD_IR_RX,
CX23885_PAD_GPIO19,
CX23885_PAD_IR_TX,
CX23885_PAD_GPIO20,
CX23885_PAD_I2S_SDAT,
CX23885_PAD_GPIO21,
CX23885_PAD_I2S_WCLK,
CX23885_PAD_GPIO22,
CX23885_PAD_I2S_BCLK,
CX23885_PAD_GPIO23,
CX23885_PAD_IRQ_N,
CX23885_PAD_GPIO16,
};
/* pvr150_workaround activates a workaround for a hardware bug that is
present in Hauppauge PVR-150 (and possibly PVR-500) cards that have
certain NTSC tuners (tveeprom tuner model numbers 85, 99 and 112). The
audio autodetect fails on some channels for these models and the workaround
is to select the audio standard explicitly. Many thanks to Hauppauge for
providing this information.
This platform data only needs to be supplied by the ivtv driver. */
struct cx25840_platform_data {
int pvr150_workaround;
};
#endif

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/*
* Copyright (C) 2008-2009 Texas Instruments Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
**************************************************************************/
#ifndef _CCDC_TYPES_H
#define _CCDC_TYPES_H
enum ccdc_pixfmt {
CCDC_PIXFMT_RAW,
CCDC_PIXFMT_YCBCR_16BIT,
CCDC_PIXFMT_YCBCR_8BIT
};
enum ccdc_frmfmt {
CCDC_FRMFMT_PROGRESSIVE,
CCDC_FRMFMT_INTERLACED
};
/* PIXEL ORDER IN MEMORY from LSB to MSB */
/* only applicable for 8-bit input mode */
enum ccdc_pixorder {
CCDC_PIXORDER_YCBYCR,
CCDC_PIXORDER_CBYCRY,
};
enum ccdc_buftype {
CCDC_BUFTYPE_FLD_INTERLEAVED,
CCDC_BUFTYPE_FLD_SEPARATED
};
#endif

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/*
* Copyright (C) 2005-2009 Texas Instruments Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _DM355_CCDC_H
#define _DM355_CCDC_H
#include <media/davinci/ccdc_types.h>
#include <media/davinci/vpfe_types.h>
/* enum for No of pixel per line to be avg. in Black Clamping */
enum ccdc_sample_length {
CCDC_SAMPLE_1PIXELS,
CCDC_SAMPLE_2PIXELS,
CCDC_SAMPLE_4PIXELS,
CCDC_SAMPLE_8PIXELS,
CCDC_SAMPLE_16PIXELS
};
/* enum for No of lines in Black Clamping */
enum ccdc_sample_line {
CCDC_SAMPLE_1LINES,
CCDC_SAMPLE_2LINES,
CCDC_SAMPLE_4LINES,
CCDC_SAMPLE_8LINES,
CCDC_SAMPLE_16LINES
};
/* enum for Alaw gamma width */
enum ccdc_gamma_width {
CCDC_GAMMA_BITS_13_4,
CCDC_GAMMA_BITS_12_3,
CCDC_GAMMA_BITS_11_2,
CCDC_GAMMA_BITS_10_1,
CCDC_GAMMA_BITS_09_0
};
enum ccdc_colpats {
CCDC_RED,
CCDC_GREEN_RED,
CCDC_GREEN_BLUE,
CCDC_BLUE
};
struct ccdc_col_pat {
enum ccdc_colpats olop;
enum ccdc_colpats olep;
enum ccdc_colpats elop;
enum ccdc_colpats elep;
};
enum ccdc_datasft {
CCDC_DATA_NO_SHIFT,
CCDC_DATA_SHIFT_1BIT,
CCDC_DATA_SHIFT_2BIT,
CCDC_DATA_SHIFT_3BIT,
CCDC_DATA_SHIFT_4BIT,
CCDC_DATA_SHIFT_5BIT,
CCDC_DATA_SHIFT_6BIT
};
enum ccdc_data_size {
CCDC_DATA_16BITS,
CCDC_DATA_15BITS,
CCDC_DATA_14BITS,
CCDC_DATA_13BITS,
CCDC_DATA_12BITS,
CCDC_DATA_11BITS,
CCDC_DATA_10BITS,
CCDC_DATA_8BITS
};
enum ccdc_mfilt1 {
CCDC_NO_MEDIAN_FILTER1,
CCDC_AVERAGE_FILTER1,
CCDC_MEDIAN_FILTER1
};
enum ccdc_mfilt2 {
CCDC_NO_MEDIAN_FILTER2,
CCDC_AVERAGE_FILTER2,
CCDC_MEDIAN_FILTER2
};
/* structure for ALaw */
struct ccdc_a_law {
/* Enable/disable A-Law */
unsigned char enable;
/* Gamma Width Input */
enum ccdc_gamma_width gamma_wd;
};
/* structure for Black Clamping */
struct ccdc_black_clamp {
/* only if bClampEnable is TRUE */
unsigned char b_clamp_enable;
/* only if bClampEnable is TRUE */
enum ccdc_sample_length sample_pixel;
/* only if bClampEnable is TRUE */
enum ccdc_sample_line sample_ln;
/* only if bClampEnable is TRUE */
unsigned short start_pixel;
/* only if bClampEnable is FALSE */
unsigned short sgain;
unsigned short dc_sub;
};
/* structure for Black Level Compensation */
struct ccdc_black_compensation {
/* Constant value to subtract from Red component */
unsigned char r;
/* Constant value to subtract from Gr component */
unsigned char gr;
/* Constant value to subtract from Blue component */
unsigned char b;
/* Constant value to subtract from Gb component */
unsigned char gb;
};
struct ccdc_float {
int integer;
unsigned int decimal;
};
#define CCDC_CSC_COEFF_TABLE_SIZE 16
/* structure for color space converter */
struct ccdc_csc {
unsigned char enable;
/*
* S8Q5. Use 2 decimal precision, user values range from -3.00 to 3.99.
* example - to use 1.03, set integer part as 1, and decimal part as 3
* to use -1.03, set integer part as -1 and decimal part as 3
*/
struct ccdc_float coeff[CCDC_CSC_COEFF_TABLE_SIZE];
};
/* Structures for Vertical Defect Correction*/
enum ccdc_vdf_csl {
CCDC_VDF_NORMAL,
CCDC_VDF_HORZ_INTERPOL_SAT,
CCDC_VDF_HORZ_INTERPOL
};
enum ccdc_vdf_cuda {
CCDC_VDF_WHOLE_LINE_CORRECT,
CCDC_VDF_UPPER_DISABLE
};
enum ccdc_dfc_mwr {
CCDC_DFC_MWR_WRITE_COMPLETE,
CCDC_DFC_WRITE_REG
};
enum ccdc_dfc_mrd {
CCDC_DFC_READ_COMPLETE,
CCDC_DFC_READ_REG
};
enum ccdc_dfc_ma_rst {
CCDC_DFC_INCR_ADDR,
CCDC_DFC_CLR_ADDR
};
enum ccdc_dfc_mclr {
CCDC_DFC_CLEAR_COMPLETE,
CCDC_DFC_CLEAR
};
struct ccdc_dft_corr_ctl {
enum ccdc_vdf_csl vdfcsl;
enum ccdc_vdf_cuda vdfcuda;
unsigned int vdflsft;
};
struct ccdc_dft_corr_mem_ctl {
enum ccdc_dfc_mwr dfcmwr;
enum ccdc_dfc_mrd dfcmrd;
enum ccdc_dfc_ma_rst dfcmarst;
enum ccdc_dfc_mclr dfcmclr;
};
#define CCDC_DFT_TABLE_SIZE 16
/*
* Main Structure for vertical defect correction. Vertical defect
* correction can correct up to 16 defects if defects less than 16
* then pad the rest with 0
*/
struct ccdc_vertical_dft {
unsigned char ver_dft_en;
unsigned char gen_dft_en;
unsigned int saturation_ctl;
struct ccdc_dft_corr_ctl dft_corr_ctl;
struct ccdc_dft_corr_mem_ctl dft_corr_mem_ctl;
int table_size;
unsigned int dft_corr_horz[CCDC_DFT_TABLE_SIZE];
unsigned int dft_corr_vert[CCDC_DFT_TABLE_SIZE];
unsigned int dft_corr_sub1[CCDC_DFT_TABLE_SIZE];
unsigned int dft_corr_sub2[CCDC_DFT_TABLE_SIZE];
unsigned int dft_corr_sub3[CCDC_DFT_TABLE_SIZE];
};
struct ccdc_data_offset {
unsigned char horz_offset;
unsigned char vert_offset;
};
/*
* Structure for CCDC configuration parameters for raw capture mode passed
* by application
*/
struct ccdc_config_params_raw {
/* data shift to be applied before storing */
enum ccdc_datasft datasft;
/* data size value from 8 to 16 bits */
enum ccdc_data_size data_sz;
/* median filter for sdram */
enum ccdc_mfilt1 mfilt1;
enum ccdc_mfilt2 mfilt2;
/* low pass filter enable/disable */
unsigned char lpf_enable;
/* Threshold of median filter */
int med_filt_thres;
/*
* horz and vertical data offset. Appliable for defect correction
* and lsc
*/
struct ccdc_data_offset data_offset;
/* Structure for Optional A-Law */
struct ccdc_a_law alaw;
/* Structure for Optical Black Clamp */
struct ccdc_black_clamp blk_clamp;
/* Structure for Black Compensation */
struct ccdc_black_compensation blk_comp;
/* struture for vertical Defect Correction Module Configuration */
struct ccdc_vertical_dft vertical_dft;
/* structure for color space converter Module Configuration */
struct ccdc_csc csc;
/* color patters for bayer capture */
struct ccdc_col_pat col_pat_field0;
struct ccdc_col_pat col_pat_field1;
};
#ifdef __KERNEL__
#include <linux/io.h>
#define CCDC_WIN_PAL {0, 0, 720, 576}
#define CCDC_WIN_VGA {0, 0, 640, 480}
struct ccdc_params_ycbcr {
/* pixel format */
enum ccdc_pixfmt pix_fmt;
/* progressive or interlaced frame */
enum ccdc_frmfmt frm_fmt;
/* video window */
struct v4l2_rect win;
/* field id polarity */
enum vpfe_pin_pol fid_pol;
/* vertical sync polarity */
enum vpfe_pin_pol vd_pol;
/* horizontal sync polarity */
enum vpfe_pin_pol hd_pol;
/* enable BT.656 embedded sync mode */
int bt656_enable;
/* cb:y:cr:y or y:cb:y:cr in memory */
enum ccdc_pixorder pix_order;
/* interleaved or separated fields */
enum ccdc_buftype buf_type;
};
/* Gain applied to Raw Bayer data */
struct ccdc_gain {
unsigned short r_ye;
unsigned short gr_cy;
unsigned short gb_g;
unsigned short b_mg;
};
/* Structure for CCDC configuration parameters for raw capture mode */
struct ccdc_params_raw {
/* pixel format */
enum ccdc_pixfmt pix_fmt;
/* progressive or interlaced frame */
enum ccdc_frmfmt frm_fmt;
/* video window */
struct v4l2_rect win;
/* field id polarity */
enum vpfe_pin_pol fid_pol;
/* vertical sync polarity */
enum vpfe_pin_pol vd_pol;
/* horizontal sync polarity */
enum vpfe_pin_pol hd_pol;
/* interleaved or separated fields */
enum ccdc_buftype buf_type;
/* Gain values */
struct ccdc_gain gain;
/* offset */
unsigned int ccdc_offset;
/* horizontal flip enable */
unsigned char horz_flip_enable;
/*
* enable to store the image in inverse order in memory
* (bottom to top)
*/
unsigned char image_invert_enable;
/* Configurable part of raw data */
struct ccdc_config_params_raw config_params;
};
#endif
#endif /* DM355_CCDC_H */

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/*
* Copyright (C) 2006-2009 Texas Instruments Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _DM644X_CCDC_H
#define _DM644X_CCDC_H
#include <media/davinci/ccdc_types.h>
#include <media/davinci/vpfe_types.h>
/* enum for No of pixel per line to be avg. in Black Clamping*/
enum ccdc_sample_length {
CCDC_SAMPLE_1PIXELS,
CCDC_SAMPLE_2PIXELS,
CCDC_SAMPLE_4PIXELS,
CCDC_SAMPLE_8PIXELS,
CCDC_SAMPLE_16PIXELS
};
/* enum for No of lines in Black Clamping */
enum ccdc_sample_line {
CCDC_SAMPLE_1LINES,
CCDC_SAMPLE_2LINES,
CCDC_SAMPLE_4LINES,
CCDC_SAMPLE_8LINES,
CCDC_SAMPLE_16LINES
};
/* enum for Alaw gamma width */
enum ccdc_gamma_width {
CCDC_GAMMA_BITS_15_6, /* use bits 15-6 for gamma */
CCDC_GAMMA_BITS_14_5,
CCDC_GAMMA_BITS_13_4,
CCDC_GAMMA_BITS_12_3,
CCDC_GAMMA_BITS_11_2,
CCDC_GAMMA_BITS_10_1,
CCDC_GAMMA_BITS_09_0 /* use bits 9-0 for gamma */
};
/* returns the highest bit used for the gamma */
static inline u8 ccdc_gamma_width_max_bit(enum ccdc_gamma_width width)
{
return 15 - width;
}
enum ccdc_data_size {
CCDC_DATA_16BITS,
CCDC_DATA_15BITS,
CCDC_DATA_14BITS,
CCDC_DATA_13BITS,
CCDC_DATA_12BITS,
CCDC_DATA_11BITS,
CCDC_DATA_10BITS,
CCDC_DATA_8BITS
};
/* returns the highest bit used for this data size */
static inline u8 ccdc_data_size_max_bit(enum ccdc_data_size sz)
{
return sz == CCDC_DATA_8BITS ? 7 : 15 - sz;
}
/* structure for ALaw */
struct ccdc_a_law {
/* Enable/disable A-Law */
unsigned char enable;
/* Gamma Width Input */
enum ccdc_gamma_width gamma_wd;
};
/* structure for Black Clamping */
struct ccdc_black_clamp {
unsigned char enable;
/* only if bClampEnable is TRUE */
enum ccdc_sample_length sample_pixel;
/* only if bClampEnable is TRUE */
enum ccdc_sample_line sample_ln;
/* only if bClampEnable is TRUE */
unsigned short start_pixel;
/* only if bClampEnable is TRUE */
unsigned short sgain;
/* only if bClampEnable is FALSE */
unsigned short dc_sub;
};
/* structure for Black Level Compensation */
struct ccdc_black_compensation {
/* Constant value to subtract from Red component */
char r;
/* Constant value to subtract from Gr component */
char gr;
/* Constant value to subtract from Blue component */
char b;
/* Constant value to subtract from Gb component */
char gb;
};
/* structure for fault pixel correction */
struct ccdc_fault_pixel {
/* Enable or Disable fault pixel correction */
unsigned char enable;
/* Number of fault pixel */
unsigned short fp_num;
/* Address of fault pixel table */
unsigned long fpc_table_addr;
};
/* Structure for CCDC configuration parameters for raw capture mode passed
* by application
*/
struct ccdc_config_params_raw {
/* data size value from 8 to 16 bits */
enum ccdc_data_size data_sz;
/* Structure for Optional A-Law */
struct ccdc_a_law alaw;
/* Structure for Optical Black Clamp */
struct ccdc_black_clamp blk_clamp;
/* Structure for Black Compensation */
struct ccdc_black_compensation blk_comp;
/* Structure for Fault Pixel Module Configuration */
struct ccdc_fault_pixel fault_pxl;
};
#ifdef __KERNEL__
#include <linux/io.h>
/* Define to enable/disable video port */
#define FP_NUM_BYTES 4
/* Define for extra pixel/line and extra lines/frame */
#define NUM_EXTRAPIXELS 8
#define NUM_EXTRALINES 8
/* settings for commonly used video formats */
#define CCDC_WIN_PAL {0, 0, 720, 576}
/* ntsc square pixel */
#define CCDC_WIN_VGA {0, 0, (640 + NUM_EXTRAPIXELS), (480 + NUM_EXTRALINES)}
/* Structure for CCDC configuration parameters for raw capture mode */
struct ccdc_params_raw {
/* pixel format */
enum ccdc_pixfmt pix_fmt;
/* progressive or interlaced frame */
enum ccdc_frmfmt frm_fmt;
/* video window */
struct v4l2_rect win;
/* field id polarity */
enum vpfe_pin_pol fid_pol;
/* vertical sync polarity */
enum vpfe_pin_pol vd_pol;
/* horizontal sync polarity */
enum vpfe_pin_pol hd_pol;
/* interleaved or separated fields */
enum ccdc_buftype buf_type;
/*
* enable to store the image in inverse
* order in memory(bottom to top)
*/
unsigned char image_invert_enable;
/* configurable paramaters */
struct ccdc_config_params_raw config_params;
};
struct ccdc_params_ycbcr {
/* pixel format */
enum ccdc_pixfmt pix_fmt;
/* progressive or interlaced frame */
enum ccdc_frmfmt frm_fmt;
/* video window */
struct v4l2_rect win;
/* field id polarity */
enum vpfe_pin_pol fid_pol;
/* vertical sync polarity */
enum vpfe_pin_pol vd_pol;
/* horizontal sync polarity */
enum vpfe_pin_pol hd_pol;
/* enable BT.656 embedded sync mode */
int bt656_enable;
/* cb:y:cr:y or y:cb:y:cr in memory */
enum ccdc_pixorder pix_order;
/* interleaved or separated fields */
enum ccdc_buftype buf_type;
};
#endif
#endif /* _DM644X_CCDC_H */

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/*
* Copyright (C) 2008-2009 Texas Instruments Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* isif header file
*/
#ifndef _ISIF_H
#define _ISIF_H
#include <media/davinci/ccdc_types.h>
#include <media/davinci/vpfe_types.h>
/* isif float type S8Q8/U8Q8 */
struct isif_float_8 {
/* 8 bit integer part */
__u8 integer;
/* 8 bit decimal part */
__u8 decimal;
};
/* isif float type U16Q16/S16Q16 */
struct isif_float_16 {
/* 16 bit integer part */
__u16 integer;
/* 16 bit decimal part */
__u16 decimal;
};
/************************************************************************
* Vertical Defect Correction parameters
***********************************************************************/
/* Defect Correction (DFC) table entry */
struct isif_vdfc_entry {
/* vertical position of defect */
__u16 pos_vert;
/* horizontal position of defect */
__u16 pos_horz;
/*
* Defect level of Vertical line defect position. This is subtracted
* from the data at the defect position
*/
__u8 level_at_pos;
/*
* Defect level of the pixels upper than the vertical line defect.
* This is subtracted from the data
*/
__u8 level_up_pixels;
/*
* Defect level of the pixels lower than the vertical line defect.
* This is subtracted from the data
*/
__u8 level_low_pixels;
};
#define ISIF_VDFC_TABLE_SIZE 8
struct isif_dfc {
/* enable vertical defect correction */
__u8 en;
/* Defect level subtraction. Just fed through if saturating */
#define ISIF_VDFC_NORMAL 0
/*
* Defect level subtraction. Horizontal interpolation ((i-2)+(i+2))/2
* if data saturating
*/
#define ISIF_VDFC_HORZ_INTERPOL_IF_SAT 1
/* Horizontal interpolation (((i-2)+(i+2))/2) */
#define ISIF_VDFC_HORZ_INTERPOL 2
/* one of the vertical defect correction modes above */
__u8 corr_mode;
/* 0 - whole line corrected, 1 - not pixels upper than the defect */
__u8 corr_whole_line;
#define ISIF_VDFC_NO_SHIFT 0
#define ISIF_VDFC_SHIFT_1 1
#define ISIF_VDFC_SHIFT_2 2
#define ISIF_VDFC_SHIFT_3 3
#define ISIF_VDFC_SHIFT_4 4
/*
* defect level shift value. level_at_pos, level_upper_pos,
* and level_lower_pos can be shifted up by this value. Choose
* one of the values above
*/
__u8 def_level_shift;
/* defect saturation level */
__u16 def_sat_level;
/* number of vertical defects. Max is ISIF_VDFC_TABLE_SIZE */
__u16 num_vdefects;
/* VDFC table ptr */
struct isif_vdfc_entry table[ISIF_VDFC_TABLE_SIZE];
};
struct isif_horz_bclamp {
/* Horizontal clamp disabled. Only vertical clamp value is subtracted */
#define ISIF_HORZ_BC_DISABLE 0
/*
* Horizontal clamp value is calculated and subtracted from image data
* along with vertical clamp value
*/
#define ISIF_HORZ_BC_CLAMP_CALC_ENABLED 1
/*
* Horizontal clamp value calculated from previous image is subtracted
* from image data along with vertical clamp value.
*/
#define ISIF_HORZ_BC_CLAMP_NOT_UPDATED 2
/* horizontal clamp mode. One of the values above */
__u8 mode;
/*
* pixel value limit enable.
* 0 - limit disabled
* 1 - pixel value limited to 1023
*/
__u8 clamp_pix_limit;
/* Select Most left window for bc calculation */
#define ISIF_SEL_MOST_LEFT_WIN 0
/* Select Most right window for bc calculation */
#define ISIF_SEL_MOST_RIGHT_WIN 1
/* Select most left or right window for clamp val calculation */
__u8 base_win_sel_calc;
/* Window count per color for calculation. range 1-32 */
__u8 win_count_calc;
/* Window start position - horizontal for calculation. 0 - 8191 */
__u16 win_start_h_calc;
/* Window start position - vertical for calculation 0 - 8191 */
__u16 win_start_v_calc;
#define ISIF_HORZ_BC_SZ_H_2PIXELS 0
#define ISIF_HORZ_BC_SZ_H_4PIXELS 1
#define ISIF_HORZ_BC_SZ_H_8PIXELS 2
#define ISIF_HORZ_BC_SZ_H_16PIXELS 3
/* Width of the sample window in pixels for calculation */
__u8 win_h_sz_calc;
#define ISIF_HORZ_BC_SZ_V_32PIXELS 0
#define ISIF_HORZ_BC_SZ_V_64PIXELS 1
#define ISIF_HORZ_BC_SZ_V_128PIXELS 2
#define ISIF_HORZ_BC_SZ_V_256PIXELS 3
/* Height of the sample window in pixels for calculation */
__u8 win_v_sz_calc;
};
/************************************************************************
* Black Clamp parameters
***********************************************************************/
struct isif_vert_bclamp {
/* Reset value used is the clamp value calculated */
#define ISIF_VERT_BC_USE_HORZ_CLAMP_VAL 0
/* Reset value used is reset_clamp_val configured */
#define ISIF_VERT_BC_USE_CONFIG_CLAMP_VAL 1
/* No update, previous image value is used */
#define ISIF_VERT_BC_NO_UPDATE 2
/*
* Reset value selector for vertical clamp calculation. Use one of
* the above values
*/
__u8 reset_val_sel;
/* U8Q8. Line average coefficient used in vertical clamp calculation */
__u8 line_ave_coef;
/* Height of the optical black region for calculation */
__u16 ob_v_sz_calc;
/* Optical black region start position - horizontal. 0 - 8191 */
__u16 ob_start_h;
/* Optical black region start position - vertical 0 - 8191 */
__u16 ob_start_v;
};
struct isif_black_clamp {
/*
* This offset value is added irrespective of the clamp enable status.
* S13
*/
__u16 dc_offset;
/*
* Enable black/digital clamp value to be subtracted from the image data
*/
__u8 en;
/*
* black clamp mode. same/separate clamp for 4 colors
* 0 - disable - same clamp value for all colors
* 1 - clamp value calculated separately for all colors
*/
__u8 bc_mode_color;
/* Vrtical start position for bc subtraction */
__u16 vert_start_sub;
/* Black clamp for horizontal direction */
struct isif_horz_bclamp horz;
/* Black clamp for vertical direction */
struct isif_vert_bclamp vert;
};
/*************************************************************************
** Color Space Conversion (CSC)
*************************************************************************/
#define ISIF_CSC_NUM_COEFF 16
struct isif_color_space_conv {
/* Enable color space conversion */
__u8 en;
/*
* csc coeffient table. S8Q5, M00 at index 0, M01 at index 1, and
* so forth
*/
struct isif_float_8 coeff[ISIF_CSC_NUM_COEFF];
};
/*************************************************************************
** Black Compensation parameters
*************************************************************************/
struct isif_black_comp {
/* Comp for Red */
__s8 r_comp;
/* Comp for Gr */
__s8 gr_comp;
/* Comp for Blue */
__s8 b_comp;
/* Comp for Gb */
__s8 gb_comp;
};
/*************************************************************************
** Gain parameters
*************************************************************************/
struct isif_gain {
/* Gain for Red or ye */
struct isif_float_16 r_ye;
/* Gain for Gr or cy */
struct isif_float_16 gr_cy;
/* Gain for Gb or g */
struct isif_float_16 gb_g;
/* Gain for Blue or mg */
struct isif_float_16 b_mg;
};
#define ISIF_LINEAR_TAB_SIZE 192
/*************************************************************************
** Linearization parameters
*************************************************************************/
struct isif_linearize {
/* Enable or Disable linearization of data */
__u8 en;
/* Shift value applied */
__u8 corr_shft;
/* scale factor applied U11Q10 */
struct isif_float_16 scale_fact;
/* Size of the linear table */
__u16 table[ISIF_LINEAR_TAB_SIZE];
};
/* Color patterns */
#define ISIF_RED 0
#define ISIF_GREEN_RED 1
#define ISIF_GREEN_BLUE 2
#define ISIF_BLUE 3
struct isif_col_pat {
__u8 olop;
__u8 olep;
__u8 elop;
__u8 elep;
};
/*************************************************************************
** Data formatter parameters
*************************************************************************/
struct isif_fmtplen {
/*
* number of program entries for SET0, range 1 - 16
* when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
* ISIF_COMBINE
*/
__u16 plen0;
/*
* number of program entries for SET1, range 1 - 16
* when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
* ISIF_COMBINE
*/
__u16 plen1;
/**
* number of program entries for SET2, range 1 - 16
* when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
* ISIF_COMBINE
*/
__u16 plen2;
/**
* number of program entries for SET3, range 1 - 16
* when fmtmode is ISIF_SPLIT, 1 - 8 when fmtmode is
* ISIF_COMBINE
*/
__u16 plen3;
};
struct isif_fmt_cfg {
#define ISIF_SPLIT 0
#define ISIF_COMBINE 1
/* Split or combine or line alternate */
__u8 fmtmode;
/* enable or disable line alternating mode */
__u8 ln_alter_en;
#define ISIF_1LINE 0
#define ISIF_2LINES 1
#define ISIF_3LINES 2
#define ISIF_4LINES 3
/* Split/combine line number */
__u8 lnum;
/* Address increment Range 1 - 16 */
__u8 addrinc;
};
struct isif_fmt_addr_ptr {
/* Initial address */
__u32 init_addr;
/* output line number */
#define ISIF_1STLINE 0
#define ISIF_2NDLINE 1
#define ISIF_3RDLINE 2
#define ISIF_4THLINE 3
__u8 out_line;
};
struct isif_fmtpgm_ap {
/* program address pointer */
__u8 pgm_aptr;
/* program address increment or decrement */
__u8 pgmupdt;
};
struct isif_data_formatter {
/* Enable/Disable data formatter */
__u8 en;
/* data formatter configuration */
struct isif_fmt_cfg cfg;
/* Formatter program entries length */
struct isif_fmtplen plen;
/* first pixel in a line fed to formatter */
__u16 fmtrlen;
/* HD interval for output line. Only valid when split line */
__u16 fmthcnt;
/* formatter address pointers */
struct isif_fmt_addr_ptr fmtaddr_ptr[16];
/* program enable/disable */
__u8 pgm_en[32];
/* program address pointers */
struct isif_fmtpgm_ap fmtpgm_ap[32];
};
struct isif_df_csc {
/* Color Space Conversion confguration, 0 - csc, 1 - df */
__u8 df_or_csc;
/* csc configuration valid if df_or_csc is 0 */
struct isif_color_space_conv csc;
/* data formatter configuration valid if df_or_csc is 1 */
struct isif_data_formatter df;
/* start pixel in a line at the input */
__u32 start_pix;
/* number of pixels in input line */
__u32 num_pixels;
/* start line at the input */
__u32 start_line;
/* number of lines at the input */
__u32 num_lines;
};
struct isif_gain_offsets_adj {
/* Gain adjustment per color */
struct isif_gain gain;
/* Offset adjustment */
__u16 offset;
/* Enable or Disable Gain adjustment for SDRAM data */
__u8 gain_sdram_en;
/* Enable or Disable Gain adjustment for IPIPE data */
__u8 gain_ipipe_en;
/* Enable or Disable Gain adjustment for H3A data */
__u8 gain_h3a_en;
/* Enable or Disable Gain adjustment for SDRAM data */
__u8 offset_sdram_en;
/* Enable or Disable Gain adjustment for IPIPE data */
__u8 offset_ipipe_en;
/* Enable or Disable Gain adjustment for H3A data */
__u8 offset_h3a_en;
};
struct isif_cul {
/* Horizontal Cull pattern for odd lines */
__u8 hcpat_odd;
/* Horizontal Cull pattern for even lines */
__u8 hcpat_even;
/* Vertical Cull pattern */
__u8 vcpat;
/* Enable or disable lpf. Apply when cull is enabled */
__u8 en_lpf;
};
struct isif_compress {
#define ISIF_ALAW 0
#define ISIF_DPCM 1
#define ISIF_NO_COMPRESSION 2
/* Compression Algorithm used */
__u8 alg;
/* Choose Predictor1 for DPCM compression */
#define ISIF_DPCM_PRED1 0
/* Choose Predictor2 for DPCM compression */
#define ISIF_DPCM_PRED2 1
/* Predictor for DPCM compression */
__u8 pred;
};
/* all the stuff in this struct will be provided by userland */
struct isif_config_params_raw {
/* Linearization parameters for image sensor data input */
struct isif_linearize linearize;
/* Data formatter or CSC */
struct isif_df_csc df_csc;
/* Defect Pixel Correction (DFC) confguration */
struct isif_dfc dfc;
/* Black/Digital Clamp configuration */
struct isif_black_clamp bclamp;
/* Gain, offset adjustments */
struct isif_gain_offsets_adj gain_offset;
/* Culling */
struct isif_cul culling;
/* A-Law and DPCM compression options */
struct isif_compress compress;
/* horizontal offset for Gain/LSC/DFC */
__u16 horz_offset;
/* vertical offset for Gain/LSC/DFC */
__u16 vert_offset;
/* color pattern for field 0 */
struct isif_col_pat col_pat_field0;
/* color pattern for field 1 */
struct isif_col_pat col_pat_field1;
#define ISIF_NO_SHIFT 0
#define ISIF_1BIT_SHIFT 1
#define ISIF_2BIT_SHIFT 2
#define ISIF_3BIT_SHIFT 3
#define ISIF_4BIT_SHIFT 4
#define ISIF_5BIT_SHIFT 5
#define ISIF_6BIT_SHIFT 6
/* Data shift applied before storing to SDRAM */
__u8 data_shift;
/* enable input test pattern generation */
__u8 test_pat_gen;
};
#ifdef __KERNEL__
struct isif_ycbcr_config {
/* isif pixel format */
enum ccdc_pixfmt pix_fmt;
/* isif frame format */
enum ccdc_frmfmt frm_fmt;
/* ISIF crop window */
struct v4l2_rect win;
/* field polarity */
enum vpfe_pin_pol fid_pol;
/* interface VD polarity */
enum vpfe_pin_pol vd_pol;
/* interface HD polarity */
enum vpfe_pin_pol hd_pol;
/* isif pix order. Only used for ycbcr capture */
enum ccdc_pixorder pix_order;
/* isif buffer type. Only used for ycbcr capture */
enum ccdc_buftype buf_type;
};
/* MSB of image data connected to sensor port */
enum isif_data_msb {
ISIF_BIT_MSB_15,
ISIF_BIT_MSB_14,
ISIF_BIT_MSB_13,
ISIF_BIT_MSB_12,
ISIF_BIT_MSB_11,
ISIF_BIT_MSB_10,
ISIF_BIT_MSB_9,
ISIF_BIT_MSB_8,
ISIF_BIT_MSB_7
};
enum isif_cfa_pattern {
ISIF_CFA_PAT_MOSAIC,
ISIF_CFA_PAT_STRIPE
};
struct isif_params_raw {
/* isif pixel format */
enum ccdc_pixfmt pix_fmt;
/* isif frame format */
enum ccdc_frmfmt frm_fmt;
/* video window */
struct v4l2_rect win;
/* field polarity */
enum vpfe_pin_pol fid_pol;
/* interface VD polarity */
enum vpfe_pin_pol vd_pol;
/* interface HD polarity */
enum vpfe_pin_pol hd_pol;
/* buffer type. Applicable for interlaced mode */
enum ccdc_buftype buf_type;
/* Gain values */
struct isif_gain gain;
/* cfa pattern */
enum isif_cfa_pattern cfa_pat;
/* Data MSB position */
enum isif_data_msb data_msb;
/* Enable horizontal flip */
unsigned char horz_flip_en;
/* Enable image invert vertically */
unsigned char image_invert_en;
/* all the userland defined stuff*/
struct isif_config_params_raw config_params;
};
enum isif_data_pack {
ISIF_PACK_16BIT,
ISIF_PACK_12BIT,
ISIF_PACK_8BIT
};
#define ISIF_WIN_NTSC {0, 0, 720, 480}
#define ISIF_WIN_VGA {0, 0, 640, 480}
#endif
#endif

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/*
* Copyright (C) 2010 Texas Instruments Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation version 2.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _VPBE_H
#define _VPBE_H
#include <linux/videodev2.h>
#include <linux/i2c.h>
#include <media/v4l2-dev.h>
#include <media/v4l2-ioctl.h>
#include <media/v4l2-device.h>
#include <media/davinci/vpbe_osd.h>
#include <media/davinci/vpbe_venc.h>
#include <media/davinci/vpbe_types.h>
/* OSD configuration info */
struct osd_config_info {
char module_name[32];
};
struct vpbe_output {
struct v4l2_output output;
/*
* If output capabilities include dv_timings, list supported timings
* below
*/
char *subdev_name;
/*
* defualt_mode identifies the default timings set at the venc or
* external encoder.
*/
char *default_mode;
/*
* Fields below are used for supporting multiple modes. For example,
* LCD panel might support different modes and they are listed here.
* Similarly for supporting external encoders, lcd controller port
* requires a set of non-standard timing values to be listed here for
* each supported mode since venc is used in non-standard timing mode
* for interfacing with external encoder similar to configuring lcd
* panel timings
*/
unsigned int num_modes;
struct vpbe_enc_mode_info *modes;
/*
* Bus configuration goes here for external encoders. Some encoders
* may require multiple interface types for each of the output. For
* example, SD modes would use YCC8 where as HD mode would use YCC16.
* Not sure if this is needed on a per mode basis instead of per
* output basis. If per mode is needed, we may have to move this to
* mode_info structure
*/
enum v4l2_mbus_pixelcode if_params;
};
/* encoder configuration info */
struct encoder_config_info {
char module_name[32];
/* Is this an i2c device ? */
unsigned int is_i2c:1;
/* i2c subdevice board info */
struct i2c_board_info board_info;
};
/*amplifier configuration info */
struct amp_config_info {
char module_name[32];
/* Is this an i2c device ? */
unsigned int is_i2c:1;
/* i2c subdevice board info */
struct i2c_board_info board_info;
};
/* structure for defining vpbe display subsystem components */
struct vpbe_config {
char module_name[32];
/* i2c bus adapter no */
int i2c_adapter_id;
struct osd_config_info osd;
struct encoder_config_info venc;
/* external encoder information goes here */
int num_ext_encoders;
struct encoder_config_info *ext_encoders;
/* amplifier information goes here */
struct amp_config_info *amp;
int num_outputs;
/* Order is venc outputs followed by LCD and then external encoders */
struct vpbe_output *outputs;
};
struct vpbe_device;
struct vpbe_device_ops {
/* crop cap for the display */
int (*g_cropcap)(struct vpbe_device *vpbe_dev,
struct v4l2_cropcap *cropcap);
/* Enumerate the outputs */
int (*enum_outputs)(struct vpbe_device *vpbe_dev,
struct v4l2_output *output);
/* Set output to the given index */
int (*set_output)(struct vpbe_device *vpbe_dev,
int index);
/* Get current output */
unsigned int (*get_output)(struct vpbe_device *vpbe_dev);
/* Set DV preset at current output */
int (*s_dv_timings)(struct vpbe_device *vpbe_dev,
struct v4l2_dv_timings *dv_timings);
/* Get DV presets supported at the output */
int (*g_dv_timings)(struct vpbe_device *vpbe_dev,
struct v4l2_dv_timings *dv_timings);
/* Enumerate the DV Presets supported at the output */
int (*enum_dv_timings)(struct vpbe_device *vpbe_dev,
struct v4l2_enum_dv_timings *timings_info);
/* Set std at the output */
int (*s_std)(struct vpbe_device *vpbe_dev, v4l2_std_id std_id);
/* Get the current std at the output */
int (*g_std)(struct vpbe_device *vpbe_dev, v4l2_std_id *std_id);
/* initialize the device */
int (*initialize)(struct device *dev, struct vpbe_device *vpbe_dev);
/* De-initialize the device */
void (*deinitialize)(struct device *dev, struct vpbe_device *vpbe_dev);
/* Get the current mode info */
int (*get_mode_info)(struct vpbe_device *vpbe_dev,
struct vpbe_enc_mode_info*);
/*
* Set the current mode in the encoder. Alternate way of setting
* standard or DV preset or custom timings in the encoder
*/
int (*set_mode)(struct vpbe_device *vpbe_dev,
struct vpbe_enc_mode_info*);
/* Power management operations */
int (*suspend)(struct vpbe_device *vpbe_dev);
int (*resume)(struct vpbe_device *vpbe_dev);
};
/* struct for vpbe device */
struct vpbe_device {
/* V4l2 device */
struct v4l2_device v4l2_dev;
/* vpbe dispay controller cfg */
struct vpbe_config *cfg;
/* parent device */
struct device *pdev;
/* external encoder v4l2 sub devices */
struct v4l2_subdev **encoders;
/* current encoder index */
int current_sd_index;
/* external amplifier v4l2 subdevice */
struct v4l2_subdev *amp;
struct mutex lock;
/* device initialized */
int initialized;
/* vpbe dac clock */
struct clk *dac_clk;
/* osd_device pointer */
struct osd_state *osd_device;
/* venc device pointer */
struct venc_platform_data *venc_device;
/*
* fields below are accessed by users of vpbe_device. Not the
* ones above
*/
/* current output */
int current_out_index;
/* lock used by caller to do atomic operation on vpbe device */
/* current timings set in the controller */
struct vpbe_enc_mode_info current_timings;
/* venc sub device */
struct v4l2_subdev *venc;
/* device operations below */
struct vpbe_device_ops ops;
};
#endif

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/*
* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef VPBE_DISPLAY_H
#define VPBE_DISPLAY_H
/* Header files */
#include <linux/videodev2.h>
#include <media/v4l2-common.h>
#include <media/v4l2-fh.h>
#include <media/videobuf2-dma-contig.h>
#include <media/davinci/vpbe_types.h>
#include <media/davinci/vpbe_osd.h>
#include <media/davinci/vpbe.h>
#define VPBE_DISPLAY_MAX_DEVICES 2
enum vpbe_display_device_id {
VPBE_DISPLAY_DEVICE_0,
VPBE_DISPLAY_DEVICE_1
};
#define VPBE_DISPLAY_DRV_NAME "vpbe-display"
#define VPBE_DISPLAY_MAJOR_RELEASE 1
#define VPBE_DISPLAY_MINOR_RELEASE 0
#define VPBE_DISPLAY_BUILD 1
#define VPBE_DISPLAY_VERSION_CODE ((VPBE_DISPLAY_MAJOR_RELEASE << 16) | \
(VPBE_DISPLAY_MINOR_RELEASE << 8) | \
VPBE_DISPLAY_BUILD)
#define VPBE_DISPLAY_VALID_FIELD(field) ((V4L2_FIELD_NONE == field) || \
(V4L2_FIELD_ANY == field) || (V4L2_FIELD_INTERLACED == field))
/* Exp ratio numerator and denominator constants */
#define VPBE_DISPLAY_H_EXP_RATIO_N 9
#define VPBE_DISPLAY_H_EXP_RATIO_D 8
#define VPBE_DISPLAY_V_EXP_RATIO_N 6
#define VPBE_DISPLAY_V_EXP_RATIO_D 5
/* Zoom multiplication factor */
#define VPBE_DISPLAY_ZOOM_4X 4
#define VPBE_DISPLAY_ZOOM_2X 2
/* Structures */
struct display_layer_info {
int enable;
/* Layer ID used by Display Manager */
enum osd_layer id;
struct osd_layer_config config;
enum osd_zoom_factor h_zoom;
enum osd_zoom_factor v_zoom;
enum osd_h_exp_ratio h_exp;
enum osd_v_exp_ratio v_exp;
};
struct vpbe_disp_buffer {
struct vb2_buffer vb;
struct list_head list;
};
/* vpbe display object structure */
struct vpbe_layer {
/* number of buffers in fbuffers */
unsigned int numbuffers;
/* Pointer to the vpbe_display */
struct vpbe_display *disp_dev;
/* Pointer pointing to current v4l2_buffer */
struct vpbe_disp_buffer *cur_frm;
/* Pointer pointing to next v4l2_buffer */
struct vpbe_disp_buffer *next_frm;
/* videobuf specific parameters
* Buffer queue used in video-buf
*/
struct vb2_queue buffer_queue;
/* allocator-specific contexts for each plane */
struct vb2_alloc_ctx *alloc_ctx;
/* Queue of filled frames */
struct list_head dma_queue;
/* Used in video-buf */
spinlock_t irqlock;
/* V4l2 specific parameters */
/* Identifies video device for this layer */
struct video_device video_dev;
/* This field keeps track of type of buffer exchange mechanism user
* has selected
*/
enum v4l2_memory memory;
/* Used to store pixel format */
struct v4l2_pix_format pix_fmt;
enum v4l2_field buf_field;
/* Video layer configuration params */
struct display_layer_info layer_info;
/* vpbe specific parameters
* enable window for display
*/
unsigned char window_enable;
/* number of open instances of the layer */
unsigned int usrs;
/* number of users performing IO */
unsigned int io_usrs;
/* Indicates id of the field which is being displayed */
unsigned int field_id;
/* Indicates whether streaming started */
unsigned char started;
/* Identifies device object */
enum vpbe_display_device_id device_id;
/* facilitation of ioctl ops lock by v4l2*/
struct mutex opslock;
u8 layer_first_int;
};
/* vpbe device structure */
struct vpbe_display {
/* layer specific parameters */
/* lock for isr updates to buf layers*/
spinlock_t dma_queue_lock;
/* C-Plane offset from start of y-plane */
unsigned int cbcr_ofst;
struct vpbe_layer *dev[VPBE_DISPLAY_MAX_DEVICES];
struct vpbe_device *vpbe_dev;
struct osd_state *osd_device;
};
/* File handle structure */
struct vpbe_fh {
struct v4l2_fh fh;
/* vpbe device structure */
struct vpbe_display *disp_dev;
/* pointer to layer object for opened device */
struct vpbe_layer *layer;
/* Indicates whether this file handle is doing IO */
unsigned char io_allowed;
};
struct buf_config_params {
unsigned char min_numbuffers;
unsigned char numbuffers[VPBE_DISPLAY_MAX_DEVICES];
unsigned int min_bufsize[VPBE_DISPLAY_MAX_DEVICES];
unsigned int layer_bufsize[VPBE_DISPLAY_MAX_DEVICES];
};
#endif /* VPBE_DISPLAY_H */

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/*
* Copyright (C) 2007-2009 Texas Instruments Inc
* Copyright (C) 2007 MontaVista Software, Inc.
*
* Andy Lowe (alowe@mvista.com), MontaVista Software
* - Initial version
* Murali Karicheri (mkaricheri@gmail.com), Texas Instruments Ltd.
* - ported to sub device interface
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation version 2..
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ifndef _OSD_H
#define _OSD_H
#include <media/davinci/vpbe_types.h>
#define DM644X_VPBE_OSD_SUBDEV_NAME "dm644x,vpbe-osd"
#define DM365_VPBE_OSD_SUBDEV_NAME "dm365,vpbe-osd"
#define DM355_VPBE_OSD_SUBDEV_NAME "dm355,vpbe-osd"
/**
* enum osd_layer
* @WIN_OSD0: On-Screen Display Window 0
* @WIN_VID0: Video Window 0
* @WIN_OSD1: On-Screen Display Window 1
* @WIN_VID1: Video Window 1
*
* Description:
* An enumeration of the osd display layers.
*/
enum osd_layer {
WIN_OSD0,
WIN_VID0,
WIN_OSD1,
WIN_VID1,
};
/**
* enum osd_win_layer
* @OSDWIN_OSD0: On-Screen Display Window 0
* @OSDWIN_OSD1: On-Screen Display Window 1
*
* Description:
* An enumeration of the OSD Window layers.
*/
enum osd_win_layer {
OSDWIN_OSD0,
OSDWIN_OSD1,
};
/**
* enum osd_pix_format
* @PIXFMT_1BPP: 1-bit-per-pixel bitmap
* @PIXFMT_2BPP: 2-bits-per-pixel bitmap
* @PIXFMT_4BPP: 4-bits-per-pixel bitmap
* @PIXFMT_8BPP: 8-bits-per-pixel bitmap
* @PIXFMT_RGB565: 16-bits-per-pixel RGB565
* @PIXFMT_YCbCrI: YUV 4:2:2
* @PIXFMT_RGB888: 24-bits-per-pixel RGB888
* @PIXFMT_YCrCbI: YUV 4:2:2 with chroma swap
* @PIXFMT_NV12: YUV 4:2:0 planar
* @PIXFMT_OSD_ATTR: OSD Attribute Window pixel format (4bpp)
*
* Description:
* An enumeration of the DaVinci pixel formats.
*/
enum osd_pix_format {
PIXFMT_1BPP = 0,
PIXFMT_2BPP,
PIXFMT_4BPP,
PIXFMT_8BPP,
PIXFMT_RGB565,
PIXFMT_YCBCRI,
PIXFMT_RGB888,
PIXFMT_YCRCBI,
PIXFMT_NV12,
PIXFMT_OSD_ATTR,
};
/**
* enum osd_h_exp_ratio
* @H_EXP_OFF: no expansion (1/1)
* @H_EXP_9_OVER_8: 9/8 expansion ratio
* @H_EXP_3_OVER_2: 3/2 expansion ratio
*
* Description:
* An enumeration of the available horizontal expansion ratios.
*/
enum osd_h_exp_ratio {
H_EXP_OFF,
H_EXP_9_OVER_8,
H_EXP_3_OVER_2,
};
/**
* enum osd_v_exp_ratio
* @V_EXP_OFF: no expansion (1/1)
* @V_EXP_6_OVER_5: 6/5 expansion ratio
*
* Description:
* An enumeration of the available vertical expansion ratios.
*/
enum osd_v_exp_ratio {
V_EXP_OFF,
V_EXP_6_OVER_5,
};
/**
* enum osd_zoom_factor
* @ZOOM_X1: no zoom (x1)
* @ZOOM_X2: x2 zoom
* @ZOOM_X4: x4 zoom
*
* Description:
* An enumeration of the available zoom factors.
*/
enum osd_zoom_factor {
ZOOM_X1,
ZOOM_X2,
ZOOM_X4,
};
/**
* enum osd_clut
* @ROM_CLUT: ROM CLUT
* @RAM_CLUT: RAM CLUT
*
* Description:
* An enumeration of the available Color Lookup Tables (CLUTs).
*/
enum osd_clut {
ROM_CLUT,
RAM_CLUT,
};
/**
* enum osd_rom_clut
* @ROM_CLUT0: Macintosh CLUT
* @ROM_CLUT1: CLUT from DM270 and prior devices
*
* Description:
* An enumeration of the ROM Color Lookup Table (CLUT) options.
*/
enum osd_rom_clut {
ROM_CLUT0,
ROM_CLUT1,
};
/**
* enum osd_blending_factor
* @OSD_0_VID_8: OSD pixels are fully transparent
* @OSD_1_VID_7: OSD pixels contribute 1/8, video pixels contribute 7/8
* @OSD_2_VID_6: OSD pixels contribute 2/8, video pixels contribute 6/8
* @OSD_3_VID_5: OSD pixels contribute 3/8, video pixels contribute 5/8
* @OSD_4_VID_4: OSD pixels contribute 4/8, video pixels contribute 4/8
* @OSD_5_VID_3: OSD pixels contribute 5/8, video pixels contribute 3/8
* @OSD_6_VID_2: OSD pixels contribute 6/8, video pixels contribute 2/8
* @OSD_8_VID_0: OSD pixels are fully opaque
*
* Description:
* An enumeration of the DaVinci pixel blending factor options.
*/
enum osd_blending_factor {
OSD_0_VID_8,
OSD_1_VID_7,
OSD_2_VID_6,
OSD_3_VID_5,
OSD_4_VID_4,
OSD_5_VID_3,
OSD_6_VID_2,
OSD_8_VID_0,
};
/**
* enum osd_blink_interval
* @BLINK_X1: blink interval is 1 vertical refresh cycle
* @BLINK_X2: blink interval is 2 vertical refresh cycles
* @BLINK_X3: blink interval is 3 vertical refresh cycles
* @BLINK_X4: blink interval is 4 vertical refresh cycles
*
* Description:
* An enumeration of the DaVinci pixel blinking interval options.
*/
enum osd_blink_interval {
BLINK_X1,
BLINK_X2,
BLINK_X3,
BLINK_X4,
};
/**
* enum osd_cursor_h_width
* @H_WIDTH_1: horizontal line width is 1 pixel
* @H_WIDTH_4: horizontal line width is 4 pixels
* @H_WIDTH_8: horizontal line width is 8 pixels
* @H_WIDTH_12: horizontal line width is 12 pixels
* @H_WIDTH_16: horizontal line width is 16 pixels
* @H_WIDTH_20: horizontal line width is 20 pixels
* @H_WIDTH_24: horizontal line width is 24 pixels
* @H_WIDTH_28: horizontal line width is 28 pixels
*/
enum osd_cursor_h_width {
H_WIDTH_1,
H_WIDTH_4,
H_WIDTH_8,
H_WIDTH_12,
H_WIDTH_16,
H_WIDTH_20,
H_WIDTH_24,
H_WIDTH_28,
};
/**
* enum davinci_cursor_v_width
* @V_WIDTH_1: vertical line width is 1 line
* @V_WIDTH_2: vertical line width is 2 lines
* @V_WIDTH_4: vertical line width is 4 lines
* @V_WIDTH_6: vertical line width is 6 lines
* @V_WIDTH_8: vertical line width is 8 lines
* @V_WIDTH_10: vertical line width is 10 lines
* @V_WIDTH_12: vertical line width is 12 lines
* @V_WIDTH_14: vertical line width is 14 lines
*/
enum osd_cursor_v_width {
V_WIDTH_1,
V_WIDTH_2,
V_WIDTH_4,
V_WIDTH_6,
V_WIDTH_8,
V_WIDTH_10,
V_WIDTH_12,
V_WIDTH_14,
};
/**
* struct osd_cursor_config
* @xsize: horizontal size in pixels
* @ysize: vertical size in lines
* @xpos: horizontal offset in pixels from the left edge of the display
* @ypos: vertical offset in lines from the top of the display
* @interlaced: Non-zero if the display is interlaced, or zero otherwise
* @h_width: horizontal line width
* @v_width: vertical line width
* @clut: the CLUT selector (ROM or RAM) for the cursor color
* @clut_index: an index into the CLUT for the cursor color
*
* Description:
* A structure describing the configuration parameters of the hardware
* rectangular cursor.
*/
struct osd_cursor_config {
unsigned xsize;
unsigned ysize;
unsigned xpos;
unsigned ypos;
int interlaced;
enum osd_cursor_h_width h_width;
enum osd_cursor_v_width v_width;
enum osd_clut clut;
unsigned char clut_index;
};
/**
* struct osd_layer_config
* @pixfmt: pixel format
* @line_length: offset in bytes between start of each line in memory
* @xsize: number of horizontal pixels displayed per line
* @ysize: number of lines displayed
* @xpos: horizontal offset in pixels from the left edge of the display
* @ypos: vertical offset in lines from the top of the display
* @interlaced: Non-zero if the display is interlaced, or zero otherwise
*
* Description:
* A structure describing the configuration parameters of an On-Screen Display
* (OSD) or video layer related to how the image is stored in memory.
* @line_length must be a multiple of the cache line size (32 bytes).
*/
struct osd_layer_config {
enum osd_pix_format pixfmt;
unsigned line_length;
unsigned xsize;
unsigned ysize;
unsigned xpos;
unsigned ypos;
int interlaced;
};
/* parameters that apply on a per-window (OSD or video) basis */
struct osd_window_state {
int is_allocated;
int is_enabled;
unsigned long fb_base_phys;
enum osd_zoom_factor h_zoom;
enum osd_zoom_factor v_zoom;
struct osd_layer_config lconfig;
};
/* parameters that apply on a per-OSD-window basis */
struct osd_osdwin_state {
enum osd_clut clut;
enum osd_blending_factor blend;
int colorkey_blending;
unsigned colorkey;
int rec601_attenuation;
/* index is pixel value */
unsigned char palette_map[16];
};
/* hardware rectangular cursor parameters */
struct osd_cursor_state {
int is_enabled;
struct osd_cursor_config config;
};
struct osd_state;
struct vpbe_osd_ops {
int (*initialize)(struct osd_state *sd);
int (*request_layer)(struct osd_state *sd, enum osd_layer layer);
void (*release_layer)(struct osd_state *sd, enum osd_layer layer);
int (*enable_layer)(struct osd_state *sd, enum osd_layer layer,
int otherwin);
void (*disable_layer)(struct osd_state *sd, enum osd_layer layer);
int (*set_layer_config)(struct osd_state *sd, enum osd_layer layer,
struct osd_layer_config *lconfig);
void (*get_layer_config)(struct osd_state *sd, enum osd_layer layer,
struct osd_layer_config *lconfig);
void (*start_layer)(struct osd_state *sd, enum osd_layer layer,
unsigned long fb_base_phys,
unsigned long cbcr_ofst);
void (*set_left_margin)(struct osd_state *sd, u32 val);
void (*set_top_margin)(struct osd_state *sd, u32 val);
void (*set_interpolation_filter)(struct osd_state *sd, int filter);
int (*set_vid_expansion)(struct osd_state *sd,
enum osd_h_exp_ratio h_exp,
enum osd_v_exp_ratio v_exp);
void (*get_vid_expansion)(struct osd_state *sd,
enum osd_h_exp_ratio *h_exp,
enum osd_v_exp_ratio *v_exp);
void (*set_zoom)(struct osd_state *sd, enum osd_layer layer,
enum osd_zoom_factor h_zoom,
enum osd_zoom_factor v_zoom);
};
struct osd_state {
enum vpbe_version vpbe_type;
spinlock_t lock;
struct device *dev;
dma_addr_t osd_base_phys;
void __iomem *osd_base;
unsigned long osd_size;
/* 1-->the isr will toggle the VID0 ping-pong buffer */
int pingpong;
int interpolation_filter;
int field_inversion;
enum osd_h_exp_ratio osd_h_exp;
enum osd_v_exp_ratio osd_v_exp;
enum osd_h_exp_ratio vid_h_exp;
enum osd_v_exp_ratio vid_v_exp;
enum osd_clut backg_clut;
unsigned backg_clut_index;
enum osd_rom_clut rom_clut;
int is_blinking;
/* attribute window blinking enabled */
enum osd_blink_interval blink;
/* YCbCrI or YCrCbI */
enum osd_pix_format yc_pixfmt;
/* columns are Y, Cb, Cr */
unsigned char clut_ram[256][3];
struct osd_cursor_state cursor;
/* OSD0, VID0, OSD1, VID1 */
struct osd_window_state win[4];
/* OSD0, OSD1 */
struct osd_osdwin_state osdwin[2];
/* OSD device Operations */
struct vpbe_osd_ops ops;
};
struct osd_platform_data {
int field_inv_wa_enable;
};
#endif

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/*
* Copyright (C) 2010 Texas Instruments Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation version 2.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _VPBE_TYPES_H
#define _VPBE_TYPES_H
enum vpbe_version {
VPBE_VERSION_1 = 1,
VPBE_VERSION_2,
VPBE_VERSION_3,
};
/* vpbe_timing_type - Timing types used in vpbe device */
enum vpbe_enc_timings_type {
VPBE_ENC_STD = 0x1,
VPBE_ENC_DV_TIMINGS = 0x4,
/* Used when set timings through FB device interface */
VPBE_ENC_TIMINGS_INVALID = 0x8,
};
/*
* struct vpbe_enc_mode_info
* @name: ptr to name string of the standard, "NTSC", "PAL" etc
* @std: standard or non-standard mode. 1 - standard, 0 - nonstandard
* @interlaced: 1 - interlaced, 0 - non interlaced/progressive
* @xres: x or horizontal resolution of the display
* @yres: y or vertical resolution of the display
* @fps: frame per second
* @left_margin: left margin of the display
* @right_margin: right margin of the display
* @upper_margin: upper margin of the display
* @lower_margin: lower margin of the display
* @hsync_len: h-sync length
* @vsync_len: v-sync length
* @flags: bit field: bit usage is documented below
*
* Description:
* Structure holding timing and resolution information of a standard.
* Used by vpbe_device to set required non-standard timing in the
* venc when lcd controller output is connected to a external encoder.
* A table of timings is maintained in vpbe device to set this in
* venc when external encoder is connected to lcd controller output.
* Encoder may provide a g_dv_timings() API to override these values
* as needed.
*
* Notes
* ------
* if_type should be used only by encoder manager and encoder.
* flags usage
* b0 (LSB) - hsync polarity, 0 - negative, 1 - positive
* b1 - vsync polarity, 0 - negative, 1 - positive
* b2 - field id polarity, 0 - negative, 1 - positive
*/
struct vpbe_enc_mode_info {
unsigned char *name;
enum vpbe_enc_timings_type timings_type;
v4l2_std_id std_id;
struct v4l2_dv_timings dv_timings;
unsigned int interlaced;
unsigned int xres;
unsigned int yres;
struct v4l2_fract aspect;
struct v4l2_fract fps;
unsigned int left_margin;
unsigned int right_margin;
unsigned int upper_margin;
unsigned int lower_margin;
unsigned int hsync_len;
unsigned int vsync_len;
unsigned int flags;
};
#endif

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/*
* Copyright (C) 2010 Texas Instruments Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation version 2.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _VPBE_VENC_H
#define _VPBE_VENC_H
#include <media/v4l2-subdev.h>
#include <media/davinci/vpbe_types.h>
#define DM644X_VPBE_VENC_SUBDEV_NAME "dm644x,vpbe-venc"
#define DM365_VPBE_VENC_SUBDEV_NAME "dm365,vpbe-venc"
#define DM355_VPBE_VENC_SUBDEV_NAME "dm355,vpbe-venc"
/* venc events */
#define VENC_END_OF_FRAME BIT(0)
#define VENC_FIRST_FIELD BIT(1)
#define VENC_SECOND_FIELD BIT(2)
struct venc_platform_data {
int (*setup_pinmux)(enum v4l2_mbus_pixelcode if_type,
int field);
int (*setup_clock)(enum vpbe_enc_timings_type type,
unsigned int pixclock);
int (*setup_if_config)(enum v4l2_mbus_pixelcode pixcode);
/* Number of LCD outputs supported */
int num_lcd_outputs;
struct vpbe_if_params *lcd_if_params;
};
enum venc_ioctls {
VENC_GET_FLD = 1,
};
/* exported functions */
struct v4l2_subdev *venc_sub_dev_init(struct v4l2_device *v4l2_dev,
const char *venc_name);
#endif

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/*
* Copyright (C) 2008-2009 Texas Instruments Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _VPFE_CAPTURE_H
#define _VPFE_CAPTURE_H
#ifdef __KERNEL__
/* Header files */
#include <media/v4l2-dev.h>
#include <linux/videodev2.h>
#include <linux/clk.h>
#include <linux/i2c.h>
#include <media/v4l2-fh.h>
#include <media/v4l2-ioctl.h>
#include <media/v4l2-device.h>
#include <media/videobuf-dma-contig.h>
#include <media/davinci/vpfe_types.h>
#define VPFE_CAPTURE_NUM_DECODERS 5
/* Macros */
#define VPFE_MAJOR_RELEASE 0
#define VPFE_MINOR_RELEASE 0
#define VPFE_BUILD 1
#define VPFE_CAPTURE_VERSION_CODE ((VPFE_MAJOR_RELEASE << 16) | \
(VPFE_MINOR_RELEASE << 8) | \
VPFE_BUILD)
#define CAPTURE_DRV_NAME "vpfe-capture"
struct vpfe_pixel_format {
struct v4l2_fmtdesc fmtdesc;
/* bytes per pixel */
int bpp;
};
struct vpfe_std_info {
int active_pixels;
int active_lines;
/* current frame format */
int frame_format;
};
struct vpfe_route {
u32 input;
u32 output;
};
struct vpfe_subdev_info {
/* Sub device name */
char name[32];
/* Sub device group id */
int grp_id;
/* Number of inputs supported */
int num_inputs;
/* inputs available at the sub device */
struct v4l2_input *inputs;
/* Sub dev routing information for each input */
struct vpfe_route *routes;
/* check if sub dev supports routing */
int can_route;
/* ccdc bus/interface configuration */
struct vpfe_hw_if_param ccdc_if_params;
/* i2c subdevice board info */
struct i2c_board_info board_info;
};
struct vpfe_config {
/* Number of sub devices connected to vpfe */
int num_subdevs;
/* i2c bus adapter no */
int i2c_adapter_id;
/* information about each subdev */
struct vpfe_subdev_info *sub_devs;
/* evm card info */
char *card_name;
/* ccdc name */
char *ccdc;
/* vpfe clock */
struct clk *vpssclk;
struct clk *slaveclk;
/* Function for Clearing the interrupt */
void (*clr_intr)(int vdint);
};
struct vpfe_device {
/* V4l2 specific parameters */
/* Identifies video device for this channel */
struct video_device *video_dev;
/* sub devices */
struct v4l2_subdev **sd;
/* vpfe cfg */
struct vpfe_config *cfg;
/* V4l2 device */
struct v4l2_device v4l2_dev;
/* parent device */
struct device *pdev;
/* number of open instances of the channel */
u32 usrs;
/* Indicates id of the field which is being displayed */
u32 field_id;
/* flag to indicate whether decoder is initialized */
u8 initialized;
/* current interface type */
struct vpfe_hw_if_param vpfe_if_params;
/* ptr to currently selected sub device */
struct vpfe_subdev_info *current_subdev;
/* current input at the sub device */
int current_input;
/* Keeps track of the information about the standard */
struct vpfe_std_info std_info;
/* std index into std table */
int std_index;
/* CCDC IRQs used when CCDC/ISIF output to SDRAM */
unsigned int ccdc_irq0;
unsigned int ccdc_irq1;
/* number of buffers in fbuffers */
u32 numbuffers;
/* List of buffer pointers for storing frames */
u8 *fbuffers[VIDEO_MAX_FRAME];
/* Pointer pointing to current v4l2_buffer */
struct videobuf_buffer *cur_frm;
/* Pointer pointing to next v4l2_buffer */
struct videobuf_buffer *next_frm;
/*
* This field keeps track of type of buffer exchange mechanism
* user has selected
*/
enum v4l2_memory memory;
/* Used to store pixel format */
struct v4l2_format fmt;
/*
* used when IMP is chained to store the crop window which
* is different from the image window
*/
struct v4l2_rect crop;
/* Buffer queue used in video-buf */
struct videobuf_queue buffer_queue;
/* Queue of filled frames */
struct list_head dma_queue;
/* Used in video-buf */
spinlock_t irqlock;
/* IRQ lock for DMA queue */
spinlock_t dma_queue_lock;
/* lock used to access this structure */
struct mutex lock;
/* number of users performing IO */
u32 io_usrs;
/* Indicates whether streaming started */
u8 started;
/*
* offset where second field starts from the starting of the
* buffer for field separated YCbCr formats
*/
u32 field_off;
};
/* File handle structure */
struct vpfe_fh {
struct v4l2_fh fh;
struct vpfe_device *vpfe_dev;
/* Indicates whether this file handle is doing IO */
u8 io_allowed;
};
struct vpfe_config_params {
u8 min_numbuffers;
u8 numbuffers;
u32 min_bufsize;
u32 device_bufsize;
};
#endif /* End of __KERNEL__ */
/**
* VPFE_CMD_S_CCDC_RAW_PARAMS - EXPERIMENTAL IOCTL to set raw capture params
* This can be used to configure modules such as defect pixel correction,
* color space conversion, culling etc. This is an experimental ioctl that
* will change in future kernels. So use this ioctl with care !
* TODO: This is to be split into multiple ioctls and also explore the
* possibility of extending the v4l2 api to include this
**/
#define VPFE_CMD_S_CCDC_RAW_PARAMS _IOW('V', BASE_VIDIOC_PRIVATE + 1, \
void *)
#endif /* _DAVINCI_VPFE_H */

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/*
* Copyright (C) 2008-2009 Texas Instruments Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option)any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _VPFE_TYPES_H
#define _VPFE_TYPES_H
#ifdef __KERNEL__
enum vpfe_pin_pol {
VPFE_PINPOL_POSITIVE,
VPFE_PINPOL_NEGATIVE
};
enum vpfe_hw_if_type {
/* BT656 - 8 bit */
VPFE_BT656,
/* BT1120 - 16 bit */
VPFE_BT1120,
/* Raw Bayer */
VPFE_RAW_BAYER,
/* YCbCr - 8 bit with external sync */
VPFE_YCBCR_SYNC_8,
/* YCbCr - 16 bit with external sync */
VPFE_YCBCR_SYNC_16,
/* BT656 - 10 bit */
VPFE_BT656_10BIT
};
/* interface description */
struct vpfe_hw_if_param {
enum vpfe_hw_if_type if_type;
enum vpfe_pin_pol hdpol;
enum vpfe_pin_pol vdpol;
};
#endif
#endif

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/*
* Copyright (C) 2011 Texas Instruments Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation version 2.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _VPIF_TYPES_H
#define _VPIF_TYPES_H
#include <linux/i2c.h>
#define VPIF_CAPTURE_MAX_CHANNELS 2
#define VPIF_DISPLAY_MAX_CHANNELS 2
enum vpif_if_type {
VPIF_IF_BT656,
VPIF_IF_BT1120,
VPIF_IF_RAW_BAYER
};
struct vpif_interface {
enum vpif_if_type if_type;
unsigned hd_pol:1;
unsigned vd_pol:1;
unsigned fid_pol:1;
};
struct vpif_subdev_info {
const char *name;
struct i2c_board_info board_info;
};
struct vpif_output {
struct v4l2_output output;
const char *subdev_name;
u32 input_route;
u32 output_route;
};
struct vpif_display_chan_config {
const struct vpif_output *outputs;
int output_count;
bool clip_en;
};
struct vpif_display_config {
int (*set_clock)(int, int);
struct vpif_subdev_info *subdevinfo;
int subdev_count;
struct vpif_display_chan_config chan_config[VPIF_DISPLAY_MAX_CHANNELS];
const char *card_name;
struct v4l2_async_subdev **asd; /* Flat array, arranged in groups */
int *asd_sizes; /* 0-terminated array of asd group sizes */
};
struct vpif_input {
struct v4l2_input input;
const char *subdev_name;
u32 input_route;
u32 output_route;
};
struct vpif_capture_chan_config {
struct vpif_interface vpif_if;
const struct vpif_input *inputs;
int input_count;
};
struct vpif_capture_config {
int (*setup_input_channel_mode)(int);
int (*setup_input_path)(int, const char *);
struct vpif_capture_chan_config chan_config[VPIF_CAPTURE_MAX_CHANNELS];
struct vpif_subdev_info *subdev_info;
int subdev_count;
const char *card_name;
struct v4l2_async_subdev **asd; /* Flat array, arranged in groups */
int *asd_sizes; /* 0-terminated array of asd group sizes */
};
#endif /* _VPIF_TYPES_H */

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/*
* Copyright (C) 2009 Texas Instruments Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* vpss - video processing subsystem module header file.
*
* Include this header file if a driver needs to configure vpss system
* module. It exports a set of library functions for video drivers to
* configure vpss system module functions such as clock enable/disable,
* vpss interrupt mux to arm, and other common vpss system module
* functions.
*/
#ifndef _VPSS_H
#define _VPSS_H
/* selector for ccdc input selection on DM355 */
enum vpss_ccdc_source_sel {
VPSS_CCDCIN,
VPSS_HSSIIN,
VPSS_PGLPBK, /* for DM365 only */
VPSS_CCDCPG /* for DM365 only */
};
struct vpss_sync_pol {
unsigned int ccdpg_hdpol:1;
unsigned int ccdpg_vdpol:1;
};
struct vpss_pg_frame_size {
short hlpfr;
short pplen;
};
/* Used for enable/disable VPSS Clock */
enum vpss_clock_sel {
/* DM355/DM365 */
VPSS_CCDC_CLOCK,
VPSS_IPIPE_CLOCK,
VPSS_H3A_CLOCK,
VPSS_CFALD_CLOCK,
/*
* When using VPSS_VENC_CLOCK_SEL in vpss_enable_clock() api
* following applies:-
* en = 0 selects ENC_CLK
* en = 1 selects ENC_CLK/2
*/
VPSS_VENC_CLOCK_SEL,
VPSS_VPBE_CLOCK,
/* DM365 only clocks */
VPSS_IPIPEIF_CLOCK,
VPSS_RSZ_CLOCK,
VPSS_BL_CLOCK,
/*
* When using VPSS_PCLK_INTERNAL in vpss_enable_clock() api
* following applies:-
* en = 0 disable internal PCLK
* en = 1 enables internal PCLK
*/
VPSS_PCLK_INTERNAL,
/*
* When using VPSS_PSYNC_CLOCK_SEL in vpss_enable_clock() api
* following applies:-
* en = 0 enables MMR clock
* en = 1 enables VPSS clock
*/
VPSS_PSYNC_CLOCK_SEL,
VPSS_LDC_CLOCK_SEL,
VPSS_OSD_CLOCK_SEL,
VPSS_FDIF_CLOCK,
VPSS_LDC_CLOCK
};
/* select input to ccdc on dm355 */
int vpss_select_ccdc_source(enum vpss_ccdc_source_sel src_sel);
/* enable/disable a vpss clock, 0 - success, -1 - failure */
int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en);
/* set sync polarity, only for DM365*/
void dm365_vpss_set_sync_pol(struct vpss_sync_pol);
/* set the PG_FRAME_SIZE register, only for DM365 */
void dm365_vpss_set_pg_frame_size(struct vpss_pg_frame_size);
/* wbl reset for dm644x */
enum vpss_wbl_sel {
VPSS_PCR_AEW_WBL_0 = 16,
VPSS_PCR_AF_WBL_0,
VPSS_PCR_RSZ4_WBL_0,
VPSS_PCR_RSZ3_WBL_0,
VPSS_PCR_RSZ2_WBL_0,
VPSS_PCR_RSZ1_WBL_0,
VPSS_PCR_PREV_WBL_0,
VPSS_PCR_CCDC_WBL_O,
};
/* clear wbl overflow flag for DM6446 */
int vpss_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel);
/* set sync polarity*/
void vpss_set_sync_pol(struct vpss_sync_pol sync);
/* set the PG_FRAME_SIZE register */
void vpss_set_pg_frame_size(struct vpss_pg_frame_size frame_size);
/*
* vpss_check_and_clear_interrupt - check and clear interrupt
* @irq - common enumerator for IRQ
*
* Following return values used:-
* 0 - interrupt occurred and cleared
* 1 - interrupt not occurred
* 2 - interrupt status not available
*/
int vpss_dma_complete_interrupt(void);
#endif

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/*
* Samsung S5P/Exynos4 SoC series camera interface driver header
*
* Copyright (C) 2010 - 2013 Samsung Electronics Co., Ltd.
* Sylwester Nawrocki <s.nawrocki@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef S5P_FIMC_H_
#define S5P_FIMC_H_
#include <media/media-entity.h>
#include <media/v4l2-dev.h>
#include <media/v4l2-mediabus.h>
/*
* Enumeration of data inputs to the camera subsystem.
*/
enum fimc_input {
FIMC_INPUT_PARALLEL_0 = 1,
FIMC_INPUT_PARALLEL_1,
FIMC_INPUT_MIPI_CSI2_0 = 3,
FIMC_INPUT_MIPI_CSI2_1,
FIMC_INPUT_WRITEBACK_A = 5,
FIMC_INPUT_WRITEBACK_B,
FIMC_INPUT_WRITEBACK_ISP = 5,
};
/*
* Enumeration of the FIMC data bus types.
*/
enum fimc_bus_type {
/* Camera parallel bus */
FIMC_BUS_TYPE_ITU_601 = 1,
/* Camera parallel bus with embedded synchronization */
FIMC_BUS_TYPE_ITU_656,
/* Camera MIPI-CSI2 serial bus */
FIMC_BUS_TYPE_MIPI_CSI2,
/* FIFO link from LCD controller (WriteBack A) */
FIMC_BUS_TYPE_LCD_WRITEBACK_A,
/* FIFO link from LCD controller (WriteBack B) */
FIMC_BUS_TYPE_LCD_WRITEBACK_B,
/* FIFO link from FIMC-IS */
FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B,
};
#define fimc_input_is_parallel(x) ((x) == 1 || (x) == 2)
#define fimc_input_is_mipi_csi(x) ((x) == 3 || (x) == 4)
/*
* The subdevices' group IDs.
*/
#define GRP_ID_SENSOR (1 << 8)
#define GRP_ID_FIMC_IS_SENSOR (1 << 9)
#define GRP_ID_WRITEBACK (1 << 10)
#define GRP_ID_CSIS (1 << 11)
#define GRP_ID_FIMC (1 << 12)
#define GRP_ID_FLITE (1 << 13)
#define GRP_ID_FIMC_IS (1 << 14)
/**
* struct fimc_source_info - video source description required for the host
* interface configuration
*
* @fimc_bus_type: FIMC camera input type
* @sensor_bus_type: image sensor bus type, MIPI, ITU-R BT.601 etc.
* @flags: the parallel sensor bus flags defining signals polarity (V4L2_MBUS_*)
* @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
*/
struct fimc_source_info {
enum fimc_bus_type fimc_bus_type;
enum fimc_bus_type sensor_bus_type;
u16 flags;
u16 mux_id;
};
/*
* v4l2_device notification id. This is only for internal use in the kernel.
* Sensor subdevs should issue S5P_FIMC_TX_END_NOTIFY notification in single
* frame capture mode when there is only one VSYNC pulse issued by the sensor
* at begining of the frame transmission.
*/
#define S5P_FIMC_TX_END_NOTIFY _IO('e', 0)
#define FIMC_MAX_PLANES 3
/**
* struct fimc_fmt - color format data structure
* @mbus_code: media bus pixel code, -1 if not applicable
* @name: format description
* @fourcc: fourcc code for this format, 0 if not applicable
* @color: the driver's private color format id
* @memplanes: number of physically non-contiguous data planes
* @colplanes: number of physically contiguous data planes
* @colorspace: v4l2 colorspace (V4L2_COLORSPACE_*)
* @depth: per plane driver's private 'number of bits per pixel'
* @mdataplanes: bitmask indicating meta data plane(s), (1 << plane_no)
* @flags: flags indicating which operation mode format applies to
*/
struct fimc_fmt {
enum v4l2_mbus_pixelcode mbus_code;
char *name;
u32 fourcc;
u32 color;
u16 memplanes;
u16 colplanes;
u8 colorspace;
u8 depth[FIMC_MAX_PLANES];
u16 mdataplanes;
u16 flags;
#define FMT_FLAGS_CAM (1 << 0)
#define FMT_FLAGS_M2M_IN (1 << 1)
#define FMT_FLAGS_M2M_OUT (1 << 2)
#define FMT_FLAGS_M2M (1 << 1 | 1 << 2)
#define FMT_HAS_ALPHA (1 << 3)
#define FMT_FLAGS_COMPRESSED (1 << 4)
#define FMT_FLAGS_WRITEBACK (1 << 5)
#define FMT_FLAGS_RAW_BAYER (1 << 6)
#define FMT_FLAGS_YUV (1 << 7)
};
struct exynos_media_pipeline;
/*
* Media pipeline operations to be called from within a video node, i.e. the
* last entity within the pipeline. Implemented by related media device driver.
*/
struct exynos_media_pipeline_ops {
int (*prepare)(struct exynos_media_pipeline *p,
struct media_entity *me);
int (*unprepare)(struct exynos_media_pipeline *p);
int (*open)(struct exynos_media_pipeline *p, struct media_entity *me,
bool resume);
int (*close)(struct exynos_media_pipeline *p);
int (*set_stream)(struct exynos_media_pipeline *p, bool state);
};
struct exynos_video_entity {
struct video_device vdev;
struct exynos_media_pipeline *pipe;
};
struct exynos_media_pipeline {
struct media_pipeline mp;
const struct exynos_media_pipeline_ops *ops;
};
static inline struct exynos_video_entity *vdev_to_exynos_video_entity(
struct video_device *vdev)
{
return container_of(vdev, struct exynos_video_entity, vdev);
}
#define fimc_pipeline_call(ent, op, args...) \
(!(ent) ? -ENOENT : (((ent)->pipe->ops && (ent)->pipe->ops->op) ? \
(ent)->pipe->ops->op(((ent)->pipe), ##args) : -ENOIOCTLCMD)) \
#endif /* S5P_FIMC_H_ */

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/* linux/inclue/media/exynos_mc.h
*
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* header file for exynos media device driver
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef GSC_MDEVICE_H_
#define GSC_MDEVICE_H_
#include <linux/clk.h>
#include <linux/platform_device.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <media/media-device.h>
#include <media/media-entity.h>
#include <media/v4l2-device.h>
#include <media/v4l2-subdev.h>
#define err(fmt, args...) \
printk(KERN_ERR "%s:%d: " fmt "\n", __func__, __LINE__, ##args)
#define MDEV_MODULE_NAME "exynos-mdev"
#define MAX_GSC_SUBDEV 3
#if defined(CONFIG_SOC_EXYNOS8890)
#define MAX_VPP_SUBDEV 9
#else
#define MAX_VPP_SUBDEV 4
#endif
#define MAX_DSIM_SUBDEV 2
#define MDEV_MAX_NUM 3
#define VPP_PAD_SOURCE 0
#define GSC_OUT_PAD_SINK 0
#define GSC_OUT_PAD_SOURCE 1
#define GSC_CAP_PAD_SINK 0
#define GSC_CAP_PAD_SOURCE 1
#define FLITE_PAD_SINK 0
#define FLITE_PAD_SOURCE_PREV 1
#define FLITE_PAD_SOURCE_CAMCORD 2
#define FLITE_PAD_SOURCE_MEM 3
#define FLITE_PADS_NUM 4
#define CSIS_PAD_SINK 0
#define CSIS_PAD_SOURCE 1
#define CSIS_PADS_NUM 2
#define MAX_CAMIF_CLIENTS 2
#if defined(CONFIG_SOC_EXYNOS5410)
#define MAX_CAMIF_CHANNEL 3
#else
#define MAX_CAMIF_CHANNEL 2
#endif
#define MXR_SUBDEV_NAME "s5p-mixer"
#define GSC_MODULE_NAME "exynos-gsc"
#define GSC_SUBDEV_NAME "exynos-gsc-sd"
#define FIMD_MODULE_NAME "s5p-fimd1"
#define FIMD_ENTITY_NAME "s3c-fb-window"
#define FLITE_MODULE_NAME "exynos-fimc-lite"
#define CSIS_MODULE_NAME "s5p-mipi-csis"
#define DEX_WB_NAME "dex-wb-sd"
#define GSC_CAP_GRP_ID (1 << 0)
#define FLITE_GRP_ID (1 << 1)
#define CSIS_GRP_ID (1 << 2)
#define SENSOR_GRP_ID (1 << 3)
#define FIMD_GRP_ID (1 << 4)
#define SENSOR_MAX_ENTITIES MAX_CAMIF_CLIENTS
#define FLITE_MAX_ENTITIES MAX_CAMIF_CHANNEL
#define CSIS_MAX_ENTITIES MAX_CAMIF_CHANNEL
enum decon_ioctl_for_sync {
S3CFB_FLUSH_WORKQUEUE,
S3CFB_DUMP_REGISTER,
};
enum gsc_ioctl_for_sync {
GSC_SFR_UPDATE,
GSC_WAIT_STOP,
};
enum vpp_sd_ioctl {
VPP_WIN_CONFIG,
VPP_STOP,
VPP_GET_BTS_VAL,
VPP_SET_BW,
VPP_SET_ROT_MIF,
VPP_WAIT_FOR_UPDATE,
VPP_DUMP,
VPP_WAIT_IDLE,
VPP_WAIT_FOR_FRAMEDONE,
};
enum mdev_node {
MDEV_OUTPUT,
MDEV_CAPTURE,
MDEV_ISP,
};
enum mxr_data_from {
FROM_GSC_SD,
FROM_MXR_VD,
};
struct exynos_media_ops {
int (*power_off)(struct v4l2_subdev *sd);
};
struct exynos_entity_data {
const struct exynos_media_ops *media_ops;
enum mxr_data_from mxr_data_from;
};
/**
* struct exynos_md - Exynos media device information
* @media_dev: top level media device
* @v4l2_dev: top level v4l2_device holding up the subdevs
* @pdev: platform device this media device is hooked up into
* @slock: spinlock protecting @sensor array
* @id: media device IDs
* @gsc_sd: each pointer of g-scaler's subdev array
*/
struct exynos_md {
struct media_device media_dev;
struct v4l2_device v4l2_dev;
struct platform_device *pdev;
struct v4l2_subdev *vpp_sd[MAX_VPP_SUBDEV];
struct device *vpp_dev[MAX_VPP_SUBDEV];
struct v4l2_subdev *gsc_sd[MAX_GSC_SUBDEV];
struct v4l2_subdev *gsc_wb_sd;
struct v4l2_subdev *gsc_cap_sd[MAX_GSC_SUBDEV];
struct v4l2_subdev *csis_sd[CSIS_MAX_ENTITIES];
struct v4l2_subdev *flite_sd[FLITE_MAX_ENTITIES];
struct v4l2_subdev *sensor_sd[SENSOR_MAX_ENTITIES];
struct v4l2_subdev *dsim_sd[MAX_DSIM_SUBDEV];
struct v4l2_subdev *hdmi_sd;
u16 id;
bool is_flite_on;
spinlock_t slock;
};
static int dummy_callback(struct device *dev, void *md)
{
/* non-zero return stops iteration */
return -1;
}
static inline void *module_name_to_driver_data(char *module_name)
{
struct device_driver *drv;
struct device *dev;
void *driver_data;
drv = driver_find(module_name, &platform_bus_type);
if (drv) {
dev = driver_find_device(drv, NULL, NULL, dummy_callback);
driver_data = dev_get_drvdata(dev);
return driver_data;
} else
return NULL;
}
/* print entity information for debug*/
static inline void entity_info_print(struct media_entity *me, struct device *dev)
{
u16 num_pads = me->num_pads;
u16 num_links = me->num_links;
int i;
dev_dbg(dev, "entity name : %s\n", me->name);
dev_dbg(dev, "number of pads = %d\n", num_pads);
for (i = 0; i < num_pads; ++i) {
dev_dbg(dev, "pad[%d] flag : %s\n", i,
(me->pads[i].flags == 1) ? "SINK" : "SOURCE");
}
dev_dbg(dev, "number of links = %d\n", num_links);
for (i = 0; i < num_links; ++i) {
dev_dbg(dev, "link[%d] info = ", i);
dev_dbg(dev, "%s : %s[%d] ---> %s : %s[%d]\n",
me->links[i].source->entity->name,
me->links[i].source->flags == 1 ? "SINK" : "SOURCE",
me->links[i].source->index,
me->links[i].sink->entity->name,
me->links[i].sink->flags == 1 ? "SINK" : "SOURCE",
me->links[i].sink->index);
}
}
#endif

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/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __GPIO_IR_RECV_H__
#define __GPIO_IR_RECV_H__
struct gpio_ir_recv_platform_data {
int gpio_nr;
bool active_low;
u64 allowed_protos;
const char *map_name;
};
#endif /* __GPIO_IR_RECV_H__ */

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/*
* V4L I2C address list
*
*
* Copyright (C) 2006 Mauro Carvalho Chehab <mchehab@infradead.org>
* Based on a previous mapping by
* Ralph Metzler (rjkm@thp.uni-koeln.de)
* Gerd Knorr <kraxel@goldbach.in-berlin.de>
*
*/
/* bttv address list */
#define I2C_ADDR_TSA5522 0xc2
#define I2C_ADDR_TDA7432 0x8a
#define I2C_ADDR_TDA8425 0x82
#define I2C_ADDR_TDA9840 0x84
#define I2C_ADDR_TDA9850 0xb6 /* also used by 9855,9873 */
#define I2C_ADDR_TDA9874 0xb0 /* also used by 9875 */
#define I2C_ADDR_TDA9875 0xb0
#define I2C_ADDR_HAUPEE 0xa0
#define I2C_ADDR_STBEE 0xae
#define I2C_ADDR_VHX 0xc0
#define I2C_ADDR_MSP3400 0x80
#define I2C_ADDR_MSP3400_ALT 0x88
#define I2C_ADDR_TEA6300 0x80 /* also used by 6320 */
#define I2C_ADDR_DPL3518 0x84
#define I2C_ADDR_TDA9887 0x86
/*
* i2c bus addresses for the chips supported by tvaudio.c
*/
#define I2C_ADDR_TDA8425 0x82
#define I2C_ADDR_TDA9840 0x84 /* also used by TA8874Z */
#define I2C_ADDR_TDA985x_L 0xb4 /* also used by 9873 */
#define I2C_ADDR_TDA985x_H 0xb6
#define I2C_ADDR_TDA9874 0xb0 /* also used by 9875 */
#define I2C_ADDR_TEA6300 0x80 /* also used by 6320 */
#define I2C_ADDR_TEA6420 0x98
#define I2C_ADDR_PIC16C54 0x96 /* PV951 */

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#ifndef _IR_I2C
#define _IR_I2C
#include <media/rc-core.h>
#define DEFAULT_POLLING_INTERVAL 100 /* ms */
struct IR_i2c;
struct IR_i2c {
char *ir_codes;
struct i2c_client *c;
struct rc_dev *rc;
/* Used to avoid fast repeating */
unsigned char old;
u32 polling_interval; /* in ms */
struct delayed_work work;
char name[32];
char phys[32];
int (*get_key)(struct IR_i2c *ir, enum rc_type *protocol,
u32 *scancode, u8 *toggle);
};
enum ir_kbd_get_key_fn {
IR_KBD_GET_KEY_CUSTOM = 0,
IR_KBD_GET_KEY_PIXELVIEW,
IR_KBD_GET_KEY_HAUP,
IR_KBD_GET_KEY_KNC1,
IR_KBD_GET_KEY_FUSIONHDTV,
IR_KBD_GET_KEY_HAUP_XVR,
IR_KBD_GET_KEY_AVERMEDIA_CARDBUS,
};
/* Can be passed when instantiating an ir_video i2c device */
struct IR_i2c_init_data {
char *ir_codes;
const char *name;
u64 type; /* RC_BIT_RC5, etc */
u32 polling_interval; /* 0 means DEFAULT_POLLING_INTERVAL */
/*
* Specify either a function pointer or a value indicating one of
* ir_kbd_i2c's internal get_key functions
*/
int (*get_key)(struct IR_i2c *ir, enum rc_type *protocol,
u32 *scancode, u8 *toggle);
enum ir_kbd_get_key_fn internal_get_key_func;
struct rc_dev *rc_dev;
};
#endif

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#ifndef _LIRC_RX51_H
#define _LIRC_RX51_H
struct lirc_rx51_platform_data {
int pwm_timer;
int(*set_max_mpu_wakeup_lat)(struct device *dev, long t);
};
#endif

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/*
* lirc.h - linux infrared remote control header file
* last modified 2010/07/13 by Jarod Wilson
*/
#ifndef _LINUX_LIRC_H
#define _LINUX_LIRC_H
#include <linux/types.h>
#include <linux/ioctl.h>
#define PULSE_BIT 0x01000000
#define PULSE_MASK 0x00FFFFFF
#define LIRC_MODE2_SPACE 0x00000000
#define LIRC_MODE2_PULSE 0x01000000
#define LIRC_MODE2_FREQUENCY 0x02000000
#define LIRC_MODE2_TIMEOUT 0x03000000
#define LIRC_VALUE_MASK 0x00FFFFFF
#define LIRC_MODE2_MASK 0xFF000000
#define LIRC_SPACE(val) (((val)&LIRC_VALUE_MASK) | LIRC_MODE2_SPACE)
#define LIRC_PULSE(val) (((val)&LIRC_VALUE_MASK) | LIRC_MODE2_PULSE)
#define LIRC_FREQUENCY(val) (((val)&LIRC_VALUE_MASK) | LIRC_MODE2_FREQUENCY)
#define LIRC_TIMEOUT(val) (((val)&LIRC_VALUE_MASK) | LIRC_MODE2_TIMEOUT)
#define LIRC_VALUE(val) ((val)&LIRC_VALUE_MASK)
#define LIRC_MODE2(val) ((val)&LIRC_MODE2_MASK)
#define LIRC_IS_SPACE(val) (LIRC_MODE2(val) == LIRC_MODE2_SPACE)
#define LIRC_IS_PULSE(val) (LIRC_MODE2(val) == LIRC_MODE2_PULSE)
#define LIRC_IS_FREQUENCY(val) (LIRC_MODE2(val) == LIRC_MODE2_FREQUENCY)
#define LIRC_IS_TIMEOUT(val) (LIRC_MODE2(val) == LIRC_MODE2_TIMEOUT)
/* used heavily by lirc userspace */
#define lirc_t int
/*** lirc compatible hardware features ***/
#define LIRC_MODE2SEND(x) (x)
#define LIRC_SEND2MODE(x) (x)
#define LIRC_MODE2REC(x) ((x) << 16)
#define LIRC_REC2MODE(x) ((x) >> 16)
#define LIRC_MODE_RAW 0x00000001
#define LIRC_MODE_PULSE 0x00000002
#define LIRC_MODE_MODE2 0x00000004
#define LIRC_MODE_LIRCCODE 0x00000010
#define LIRC_CAN_SEND_RAW LIRC_MODE2SEND(LIRC_MODE_RAW)
#define LIRC_CAN_SEND_PULSE LIRC_MODE2SEND(LIRC_MODE_PULSE)
#define LIRC_CAN_SEND_MODE2 LIRC_MODE2SEND(LIRC_MODE_MODE2)
#define LIRC_CAN_SEND_LIRCCODE LIRC_MODE2SEND(LIRC_MODE_LIRCCODE)
#define LIRC_CAN_SEND_MASK 0x0000003f
#define LIRC_CAN_SET_SEND_CARRIER 0x00000100
#define LIRC_CAN_SET_SEND_DUTY_CYCLE 0x00000200
#define LIRC_CAN_SET_TRANSMITTER_MASK 0x00000400
#define LIRC_CAN_REC_RAW LIRC_MODE2REC(LIRC_MODE_RAW)
#define LIRC_CAN_REC_PULSE LIRC_MODE2REC(LIRC_MODE_PULSE)
#define LIRC_CAN_REC_MODE2 LIRC_MODE2REC(LIRC_MODE_MODE2)
#define LIRC_CAN_REC_LIRCCODE LIRC_MODE2REC(LIRC_MODE_LIRCCODE)
#define LIRC_CAN_REC_MASK LIRC_MODE2REC(LIRC_CAN_SEND_MASK)
#define LIRC_CAN_SET_REC_CARRIER (LIRC_CAN_SET_SEND_CARRIER << 16)
#define LIRC_CAN_SET_REC_DUTY_CYCLE (LIRC_CAN_SET_SEND_DUTY_CYCLE << 16)
#define LIRC_CAN_SET_REC_DUTY_CYCLE_RANGE 0x40000000
#define LIRC_CAN_SET_REC_CARRIER_RANGE 0x80000000
#define LIRC_CAN_GET_REC_RESOLUTION 0x20000000
#define LIRC_CAN_SET_REC_TIMEOUT 0x10000000
#define LIRC_CAN_SET_REC_FILTER 0x08000000
#define LIRC_CAN_MEASURE_CARRIER 0x02000000
#define LIRC_CAN_USE_WIDEBAND_RECEIVER 0x04000000
#define LIRC_CAN_SEND(x) ((x)&LIRC_CAN_SEND_MASK)
#define LIRC_CAN_REC(x) ((x)&LIRC_CAN_REC_MASK)
#define LIRC_CAN_NOTIFY_DECODE 0x01000000
/*** IOCTL commands for lirc driver ***/
#define LIRC_GET_FEATURES _IOR('i', 0x00000000, __u32)
#define LIRC_GET_SEND_MODE _IOR('i', 0x00000001, __u32)
#define LIRC_GET_REC_MODE _IOR('i', 0x00000002, __u32)
#define LIRC_GET_SEND_CARRIER _IOR('i', 0x00000003, __u32)
#define LIRC_GET_REC_CARRIER _IOR('i', 0x00000004, __u32)
#define LIRC_GET_SEND_DUTY_CYCLE _IOR('i', 0x00000005, __u32)
#define LIRC_GET_REC_DUTY_CYCLE _IOR('i', 0x00000006, __u32)
#define LIRC_GET_REC_RESOLUTION _IOR('i', 0x00000007, __u32)
#define LIRC_GET_MIN_TIMEOUT _IOR('i', 0x00000008, __u32)
#define LIRC_GET_MAX_TIMEOUT _IOR('i', 0x00000009, __u32)
#define LIRC_GET_MIN_FILTER_PULSE _IOR('i', 0x0000000a, __u32)
#define LIRC_GET_MAX_FILTER_PULSE _IOR('i', 0x0000000b, __u32)
#define LIRC_GET_MIN_FILTER_SPACE _IOR('i', 0x0000000c, __u32)
#define LIRC_GET_MAX_FILTER_SPACE _IOR('i', 0x0000000d, __u32)
/* code length in bits, currently only for LIRC_MODE_LIRCCODE */
#define LIRC_GET_LENGTH _IOR('i', 0x0000000f, __u32)
#define LIRC_SET_SEND_MODE _IOW('i', 0x00000011, __u32)
#define LIRC_SET_REC_MODE _IOW('i', 0x00000012, __u32)
/* Note: these can reset the according pulse_width */
#define LIRC_SET_SEND_CARRIER _IOW('i', 0x00000013, __u32)
#define LIRC_SET_REC_CARRIER _IOW('i', 0x00000014, __u32)
#define LIRC_SET_SEND_DUTY_CYCLE _IOW('i', 0x00000015, __u32)
#define LIRC_SET_REC_DUTY_CYCLE _IOW('i', 0x00000016, __u32)
#define LIRC_SET_TRANSMITTER_MASK _IOW('i', 0x00000017, __u32)
/*
* when a timeout != 0 is set the driver will send a
* LIRC_MODE2_TIMEOUT data packet, otherwise LIRC_MODE2_TIMEOUT is
* never sent, timeout is disabled by default
*/
#define LIRC_SET_REC_TIMEOUT _IOW('i', 0x00000018, __u32)
/* 1 enables, 0 disables timeout reports in MODE2 */
#define LIRC_SET_REC_TIMEOUT_REPORTS _IOW('i', 0x00000019, __u32)
/*
* pulses shorter than this are filtered out by hardware (software
* emulation in lirc_dev?)
*/
#define LIRC_SET_REC_FILTER_PULSE _IOW('i', 0x0000001a, __u32)
/*
* spaces shorter than this are filtered out by hardware (software
* emulation in lirc_dev?)
*/
#define LIRC_SET_REC_FILTER_SPACE _IOW('i', 0x0000001b, __u32)
/*
* if filter cannot be set independently for pulse/space, this should
* be used
*/
#define LIRC_SET_REC_FILTER _IOW('i', 0x0000001c, __u32)
/*
* if enabled from the next key press on the driver will send
* LIRC_MODE2_FREQUENCY packets
*/
#define LIRC_SET_MEASURE_CARRIER_MODE _IOW('i', 0x0000001d, __u32)
/*
* to set a range use
* LIRC_SET_REC_DUTY_CYCLE_RANGE/LIRC_SET_REC_CARRIER_RANGE with the
* lower bound first and later
* LIRC_SET_REC_DUTY_CYCLE/LIRC_SET_REC_CARRIER with the upper bound
*/
#define LIRC_SET_REC_DUTY_CYCLE_RANGE _IOW('i', 0x0000001e, __u32)
#define LIRC_SET_REC_CARRIER_RANGE _IOW('i', 0x0000001f, __u32)
#define LIRC_NOTIFY_DECODE _IO('i', 0x00000020)
#define LIRC_SETUP_START _IO('i', 0x00000021)
#define LIRC_SETUP_END _IO('i', 0x00000022)
#define LIRC_SET_WIDEBAND_RECEIVER _IOW('i', 0x00000023, __u32)
#endif

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/*
* LIRC base driver
*
* by Artur Lipowski <alipowski@interia.pl>
* This code is licensed under GNU GPL
*
*/
#ifndef _LINUX_LIRC_DEV_H
#define _LINUX_LIRC_DEV_H
#define MAX_IRCTL_DEVICES 8
#define BUFLEN 16
#define mod(n, div) ((n) % (div))
#include <linux/slab.h>
#include <linux/fs.h>
#include <linux/ioctl.h>
#include <linux/poll.h>
#include <linux/kfifo.h>
#include <media/lirc.h>
struct lirc_buffer {
wait_queue_head_t wait_poll;
spinlock_t fifo_lock;
unsigned int chunk_size;
unsigned int size; /* in chunks */
/* Using chunks instead of bytes pretends to simplify boundary checking
* And should allow for some performance fine tunning later */
struct kfifo fifo;
u8 fifo_initialized;
};
static inline void lirc_buffer_clear(struct lirc_buffer *buf)
{
unsigned long flags;
if (buf->fifo_initialized) {
spin_lock_irqsave(&buf->fifo_lock, flags);
kfifo_reset(&buf->fifo);
spin_unlock_irqrestore(&buf->fifo_lock, flags);
} else
WARN(1, "calling %s on an uninitialized lirc_buffer\n",
__func__);
}
static inline int lirc_buffer_init(struct lirc_buffer *buf,
unsigned int chunk_size,
unsigned int size)
{
int ret;
init_waitqueue_head(&buf->wait_poll);
spin_lock_init(&buf->fifo_lock);
buf->chunk_size = chunk_size;
buf->size = size;
ret = kfifo_alloc(&buf->fifo, size * chunk_size, GFP_KERNEL);
if (ret == 0)
buf->fifo_initialized = 1;
return ret;
}
static inline void lirc_buffer_free(struct lirc_buffer *buf)
{
if (buf->fifo_initialized) {
kfifo_free(&buf->fifo);
buf->fifo_initialized = 0;
} else
WARN(1, "calling %s on an uninitialized lirc_buffer\n",
__func__);
}
static inline int lirc_buffer_len(struct lirc_buffer *buf)
{
int len;
unsigned long flags;
spin_lock_irqsave(&buf->fifo_lock, flags);
len = kfifo_len(&buf->fifo);
spin_unlock_irqrestore(&buf->fifo_lock, flags);
return len;
}
static inline int lirc_buffer_full(struct lirc_buffer *buf)
{
return lirc_buffer_len(buf) == buf->size * buf->chunk_size;
}
static inline int lirc_buffer_empty(struct lirc_buffer *buf)
{
return !lirc_buffer_len(buf);
}
static inline int lirc_buffer_available(struct lirc_buffer *buf)
{
return buf->size - (lirc_buffer_len(buf) / buf->chunk_size);
}
static inline unsigned int lirc_buffer_read(struct lirc_buffer *buf,
unsigned char *dest)
{
unsigned int ret = 0;
if (lirc_buffer_len(buf) >= buf->chunk_size)
ret = kfifo_out_locked(&buf->fifo, dest, buf->chunk_size,
&buf->fifo_lock);
return ret;
}
static inline unsigned int lirc_buffer_write(struct lirc_buffer *buf,
unsigned char *orig)
{
unsigned int ret;
ret = kfifo_in_locked(&buf->fifo, orig, buf->chunk_size,
&buf->fifo_lock);
return ret;
}
struct lirc_driver {
char name[40];
int minor;
__u32 code_length;
unsigned int buffer_size; /* in chunks holding one code each */
int sample_rate;
__u32 features;
unsigned int chunk_size;
void *data;
int min_timeout;
int max_timeout;
int (*add_to_buf) (void *data, struct lirc_buffer *buf);
struct lirc_buffer *rbuf;
int (*set_use_inc) (void *data);
void (*set_use_dec) (void *data);
struct rc_dev *rdev;
const struct file_operations *fops;
struct device *dev;
struct module *owner;
};
/* name:
* this string will be used for logs
*
* minor:
* indicates minor device (/dev/lirc) number for registered driver
* if caller fills it with negative value, then the first free minor
* number will be used (if available)
*
* code_length:
* length of the remote control key code expressed in bits
*
* sample_rate:
*
* data:
* it may point to any driver data and this pointer will be passed to
* all callback functions
*
* add_to_buf:
* add_to_buf will be called after specified period of the time or
* triggered by the external event, this behavior depends on value of
* the sample_rate this function will be called in user context. This
* routine should return 0 if data was added to the buffer and
* -ENODATA if none was available. This should add some number of bits
* evenly divisible by code_length to the buffer
*
* rbuf:
* if not NULL, it will be used as a read buffer, you will have to
* write to the buffer by other means, like irq's (see also
* lirc_serial.c).
*
* set_use_inc:
* set_use_inc will be called after device is opened
*
* set_use_dec:
* set_use_dec will be called after device is closed
*
* fops:
* file_operations for drivers which don't fit the current driver model.
*
* Some ioctl's can be directly handled by lirc_dev if the driver's
* ioctl function is NULL or if it returns -ENOIOCTLCMD (see also
* lirc_serial.c).
*
* owner:
* the module owning this struct
*
*/
/* following functions can be called ONLY from user context
*
* returns negative value on error or minor number
* of the registered device if success
* contents of the structure pointed by p is copied
*/
extern int lirc_register_driver(struct lirc_driver *d);
/* returns negative value on error or 0 if success
*/
extern int lirc_unregister_driver(int minor);
/* Returns the private data stored in the lirc_driver
* associated with the given device file pointer.
*/
void *lirc_get_pdata(struct file *file);
/* default file operations
* used by drivers if they override only some operations
*/
int lirc_dev_fop_open(struct inode *inode, struct file *file);
int lirc_dev_fop_close(struct inode *inode, struct file *file);
unsigned int lirc_dev_fop_poll(struct file *file, poll_table *wait);
long lirc_dev_fop_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
ssize_t lirc_dev_fop_read(struct file *file, char __user *buffer, size_t length,
loff_t *ppos);
ssize_t lirc_dev_fop_write(struct file *file, const char __user *buffer,
size_t length, loff_t *ppos);
#endif

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/*
* include/media/lm3560.h
*
* Copyright (C) 2013 Texas Instruments
*
* Contact: Daniel Jeong <gshark.jeong@gmail.com>
* Ldd-Mlp <ldd-mlp@list.ti.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef __LM3560_H__
#define __LM3560_H__
#include <media/v4l2-subdev.h>
#define LM3560_NAME "lm3560"
#define LM3560_I2C_ADDR (0x53)
/* FLASH Brightness
* min 62500uA, step 62500uA, max 1000000uA
*/
#define LM3560_FLASH_BRT_MIN 62500
#define LM3560_FLASH_BRT_STEP 62500
#define LM3560_FLASH_BRT_MAX 1000000
#define LM3560_FLASH_BRT_uA_TO_REG(a) \
((a) < LM3560_FLASH_BRT_MIN ? 0 : \
(((a) - LM3560_FLASH_BRT_MIN) / LM3560_FLASH_BRT_STEP))
#define LM3560_FLASH_BRT_REG_TO_uA(a) \
((a) * LM3560_FLASH_BRT_STEP + LM3560_FLASH_BRT_MIN)
/* FLASH TIMEOUT DURATION
* min 32ms, step 32ms, max 1024ms
*/
#define LM3560_FLASH_TOUT_MIN 32
#define LM3560_FLASH_TOUT_STEP 32
#define LM3560_FLASH_TOUT_MAX 1024
#define LM3560_FLASH_TOUT_ms_TO_REG(a) \
((a) < LM3560_FLASH_TOUT_MIN ? 0 : \
(((a) - LM3560_FLASH_TOUT_MIN) / LM3560_FLASH_TOUT_STEP))
#define LM3560_FLASH_TOUT_REG_TO_ms(a) \
((a) * LM3560_FLASH_TOUT_STEP + LM3560_FLASH_TOUT_MIN)
/* TORCH BRT
* min 31250uA, step 31250uA, max 250000uA
*/
#define LM3560_TORCH_BRT_MIN 31250
#define LM3560_TORCH_BRT_STEP 31250
#define LM3560_TORCH_BRT_MAX 250000
#define LM3560_TORCH_BRT_uA_TO_REG(a) \
((a) < LM3560_TORCH_BRT_MIN ? 0 : \
(((a) - LM3560_TORCH_BRT_MIN) / LM3560_TORCH_BRT_STEP))
#define LM3560_TORCH_BRT_REG_TO_uA(a) \
((a) * LM3560_TORCH_BRT_STEP + LM3560_TORCH_BRT_MIN)
enum lm3560_led_id {
LM3560_LED0 = 0,
LM3560_LED1,
LM3560_LED_MAX
};
enum lm3560_peak_current {
LM3560_PEAK_1600mA = 0x00,
LM3560_PEAK_2300mA = 0x20,
LM3560_PEAK_3000mA = 0x40,
LM3560_PEAK_3600mA = 0x60
};
/* struct lm3560_platform_data
*
* @peak : peak current
* @max_flash_timeout: flash timeout
* @max_flash_brt: flash mode led brightness
* @max_torch_brt: torch mode led brightness
*/
struct lm3560_platform_data {
enum lm3560_peak_current peak;
u32 max_flash_timeout;
u32 max_flash_brt[LM3560_LED_MAX];
u32 max_torch_brt[LM3560_LED_MAX];
};
#endif /* __LM3560_H__ */

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/*
* include/media/lm3646.h
*
* Copyright (C) 2014 Texas Instruments
*
* Contact: Daniel Jeong <gshark.jeong@gmail.com>
* Ldd-Mlp <ldd-mlp@list.ti.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*/
#ifndef __LM3646_H__
#define __LM3646_H__
#include <media/v4l2-subdev.h>
#define LM3646_NAME "lm3646"
#define LM3646_I2C_ADDR_REV1 (0x67)
#define LM3646_I2C_ADDR_REV0 (0x63)
/* TOTAL FLASH Brightness Max
* min 93350uA, step 93750uA, max 1499600uA
*/
#define LM3646_TOTAL_FLASH_BRT_MIN 93350
#define LM3646_TOTAL_FLASH_BRT_STEP 93750
#define LM3646_TOTAL_FLASH_BRT_MAX 1499600
#define LM3646_TOTAL_FLASH_BRT_uA_TO_REG(a) \
((a) < LM3646_TOTAL_FLASH_BRT_MIN ? 0 : \
((((a) - LM3646_TOTAL_FLASH_BRT_MIN) / LM3646_TOTAL_FLASH_BRT_STEP)))
/* TOTAL TORCH Brightness Max
* min 23040uA, step 23430uA, max 187100uA
*/
#define LM3646_TOTAL_TORCH_BRT_MIN 23040
#define LM3646_TOTAL_TORCH_BRT_STEP 23430
#define LM3646_TOTAL_TORCH_BRT_MAX 187100
#define LM3646_TOTAL_TORCH_BRT_uA_TO_REG(a) \
((a) < LM3646_TOTAL_TORCH_BRT_MIN ? 0 : \
((((a) - LM3646_TOTAL_TORCH_BRT_MIN) / LM3646_TOTAL_TORCH_BRT_STEP)))
/* LED1 FLASH Brightness
* min 23040uA, step 11718uA, max 1499600uA
*/
#define LM3646_LED1_FLASH_BRT_MIN 23040
#define LM3646_LED1_FLASH_BRT_STEP 11718
#define LM3646_LED1_FLASH_BRT_MAX 1499600
#define LM3646_LED1_FLASH_BRT_uA_TO_REG(a) \
((a) <= LM3646_LED1_FLASH_BRT_MIN ? 0 : \
((((a) - LM3646_LED1_FLASH_BRT_MIN) / LM3646_LED1_FLASH_BRT_STEP))+1)
/* LED1 TORCH Brightness
* min 2530uA, step 1460uA, max 187100uA
*/
#define LM3646_LED1_TORCH_BRT_MIN 2530
#define LM3646_LED1_TORCH_BRT_STEP 1460
#define LM3646_LED1_TORCH_BRT_MAX 187100
#define LM3646_LED1_TORCH_BRT_uA_TO_REG(a) \
((a) <= LM3646_LED1_TORCH_BRT_MIN ? 0 : \
((((a) - LM3646_LED1_TORCH_BRT_MIN) / LM3646_LED1_TORCH_BRT_STEP))+1)
/* FLASH TIMEOUT DURATION
* min 50ms, step 50ms, max 400ms
*/
#define LM3646_FLASH_TOUT_MIN 50
#define LM3646_FLASH_TOUT_STEP 50
#define LM3646_FLASH_TOUT_MAX 400
#define LM3646_FLASH_TOUT_ms_TO_REG(a) \
((a) <= LM3646_FLASH_TOUT_MIN ? 0 : \
(((a) - LM3646_FLASH_TOUT_MIN) / LM3646_FLASH_TOUT_STEP))
/* struct lm3646_platform_data
*
* @flash_timeout: flash timeout
* @led1_flash_brt: led1 flash mode brightness, uA
* @led1_torch_brt: led1 torch mode brightness, uA
*/
struct lm3646_platform_data {
u32 flash_timeout;
u32 led1_flash_brt;
u32 led1_torch_brt;
};
#endif /* __LM3646_H__ */

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/*
* include/media/m2m1shot-helper.h
*
* Copyright (C) 2014 Samsung Electronics Co., Ltd.
*
* Contact: Cho KyongHo <pullip.cho@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef _M2M1SHOT_HELPER_H_
#define _M2M1SHOT_HELPER_H_
#include <linux/kernel.h>
#include <linux/dma-buf.h>
#include <media/m2m1shot.h>
int m2m1shot_map_dma_buf(struct device *dev,
struct m2m1shot_buffer_plane_dma *plane,
enum dma_data_direction dir);
void m2m1shot_unmap_dma_buf(struct device *dev,
struct m2m1shot_buffer_plane_dma *plane,
enum dma_data_direction dir);
int m2m1shot_dma_addr_map(struct device *dev,
struct m2m1shot_buffer_dma *buf,
int plane_idx, enum dma_data_direction dir);
void m2m1shot_dma_addr_unmap(struct device *dev,
struct m2m1shot_buffer_dma *buf, int plane_idx);
static inline dma_addr_t m2m1shot_dma_address(
struct m2m1shot_buffer_plane_dma *plane)
{
return plane->dma_addr;
}
#endif /* _M2M1SHOT_HELPER_H_ */

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/*
* include/media/m2m1shot.h
*
* Copyright (C) 2014 Samsung Electronics Co., Ltd.
*
* Contact: Cho KyongHo <pullip.cho@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef _M2M1SHOT_H_
#define _M2M1SHOT_H_
#include <linux/kernel.h>
#include <linux/videodev2.h>
#include <linux/list.h>
#include <linux/miscdevice.h>
#include <linux/dma-direction.h>
#include <linux/kref.h>
#include <linux/completion.h>
#include <uapi/linux/m2m1shot.h>
struct m2m1shot_devops;
struct m2m1shot_task;
/**
* struct m2m1shot_device
*
* @misc : misc device desciptor for user-kernel interface
* @tasks : the list of the tasks that are to be scheduled
* @contexts : the list of the contexts that is created for this device
* @dev : the client device desciptor
* @lock_task : lock to protect the consistency of @tasks list and
* @current_task
* @lock_ctx : lock to protect the consistency of @contexts list
* @timeout_jiffies: timeout jiffoes for a task. If a task is not finished
* until @timeout_jiffies elapsed,
* m2m1shot_devops.timeout_task() is invoked an the task
* is canced. The user will get an error.
* @current_task: indicate the task that is currently being processed
* @ops : callback functions that the client device driver must
* implement according to the events.
*/
struct m2m1shot_device {
struct miscdevice misc;
struct list_head tasks; /* pending tasks for processing */
struct list_head contexts; /* created contexts of this device */
struct device *dev;
spinlock_t lock_task; /* lock with irqsave for tasks */
spinlock_t lock_ctx; /* lock for contexts */
unsigned long timeout_jiffies; /* timeout jiffies for a task */
struct m2m1shot_task *current_task; /* current working task */
const struct m2m1shot_devops *ops;
};
/**
* struct m2m1shot_context - context of tasks
*
* @node : node entry to m2m1shot_device.contexts
* @mutex : lock to prevent racing between tasks between the same contexts
* @kref : usage count of the context not to release the context while a
* : task being processed.
* @m21dev : the singleton device instance that the context is born
* @priv : private data that is allowed to store client drivers' private
* data
*/
struct m2m1shot_context {
struct list_head node;
struct mutex mutex;
struct kref kref;
struct m2m1shot_device *m21dev;
void *priv;
};
/**
* enum m2m1shot_state - state of a task
*
* @M2M1SHOT_BUFSTATE_READY : Task is verified and scheduled for processing
* @M2M1SHOT_BUFSTATE_PROCESSING: Task is being processed by H/W.
* @M2M1SHOT_BUFSTATE_DONE : Task is completed.
* @M2M1SHOT_BUFSTATE_TIMEDOUT : Task is not completed until a timed out value
* @M2M1SHOT_BUFSTATE_ERROR: : Task is not processed due to verification
* failure
*/
enum m2m1shot_state {
M2M1SHOT_BUFSTATE_READY,
M2M1SHOT_BUFSTATE_PROCESSING,
M2M1SHOT_BUFSTATE_DONE,
M2M1SHOT_BUFSTATE_TIMEDOUT,
M2M1SHOT_BUFSTATE_ERROR,
};
/**
* struct m2m1shot_buffer_plane_dma - descriptions of a buffer
*
* @bytes_used : the size of the buffer that is accessed by H/W. This is filled
* by the client device driver when
* m2m1shot_devops.prepare_format() is called.
* @dmabuf : pointer to dmabuf descriptor if the buffer type is
* M2M1SHOT_BUFFER_DMABUF.
* @attachment : pointer to dmabuf attachment descriptor if the buffer type is
* M2M1SHOT_BUFFER_DMABUF.
* @sgt : scatter-gather list that describes physical memory information
* : of the buffer
* @dma_addr : DMA address that is the address of the buffer in the H/W's
* : address space.
* @priv : the client device driver's private data
*/
struct m2m1shot_buffer_plane_dma {
size_t bytes_used;
struct dma_buf *dmabuf;
struct dma_buf_attachment *attachment;
struct sg_table *sgt;
dma_addr_t dma_addr;
void *priv;
off_t offset;
};
/**
* struct m2m1shot_buffer_dma - description of buffers for a task
*
* @buffers : pointer to m2m1shot.buf_out or m2m1shot.buf_cap that are specified
* by user
* @plane : descriptions of buffers to pin the buffers while the task is
* processed.
*/
struct m2m1shot_buffer_dma {
/* pointer to m2m1shot_task.task.buf_out/cap */
const struct m2m1shot_buffer *buffer;
struct m2m1shot_buffer_plane_dma plane[M2M1SHOT_MAX_PLANES];
};
/**
* struct m2m1shot_task - describes a task to process
*
* @task : descriptions about the frames and format to process
* @task_node : list entry to m2m1shot_device.tasks
* @ctx : pointer to m2m1shot_context that the task is valid under.
* @complete : waiter to finish the task
* @dma_buf_out : descriptions of the capture buffers
* @dma_buf_cap : descriptions of the output buffers
* @state : state of the task
*/
struct m2m1shot_task {
struct m2m1shot task;
struct list_head task_node;
struct m2m1shot_context *ctx;
struct completion complete;
struct m2m1shot_buffer_dma dma_buf_out;
struct m2m1shot_buffer_dma dma_buf_cap;
enum m2m1shot_state state;
};
/**
* struct vb2_mem_ops - memory handling/memory allocator operations
*
* @init_context: [MANDATORY]
* called on creation of struct m2m1shot_context to give a chance
* to the driver for registering the driver's private data.
* New m2m1shot_context is created when user opens a device node
* of m2m1shot.
* @free_context: [MANDATORY]
* called on destruction of struct m2m1shot_context to inform
* the driver for unregistring the driver's private data.
* m2m1shot_context is destroyed when a user releases all
* references to the open file of the device node of m2m1shot.
* @prepare_format: [MANDATORY]
* called on user's request to process a task. The driver
* receives the format and resolutions of the images to
* process, should return the sizes in bytes and the number of
* buffers(planes) that the driver needs to process the images.
* @prepare_operation [OPTIONAL]
* called after format checking is finished. The drivers can
* check or prepare the followings:
* - scaling constraint check
* - constructing private or constext data
* @prepare_buffer: [MANDATORY]
* called after all size validation are passed. The driver
* should complete all procedures for safe access by H/W
* accelerators to process the given buffers.
* @finish_buffer: [MANDATORY]
* called after the task is finished to release all references
* to the buffers. The drivers should release all resources
* related to the buffer. This is called for every buffers that
* is called @prepare_buffer regardless of the processing the
* task is successful.
* @device_run: [MANDATORY]
* called on the time of the processing the given task. The driver
* should run H/W. The driver does not wait for an IRQ.
* @timeout_task: [MANDATORY]
* called when timed out of processing of the given task. The
* driver can reset the H/W to cancle the current task.
* @custom_ioctl: [OPTIONAL]
* The driver can directly interact with this @custom_ioctl.
*/
struct m2m1shot_devops {
int (*init_context)(struct m2m1shot_context *ctx);
int (*free_context)(struct m2m1shot_context *ctx);
/* return value: number of planes */
int (*prepare_format)(struct m2m1shot_context *ctx,
struct m2m1shot_pix_format *fmt,
enum dma_data_direction dir,
size_t bytes_used[]);
int (*prepare_operation)(struct m2m1shot_context *ctx,
struct m2m1shot_task *task);
int (*prepare_buffer)(struct m2m1shot_context *ctx,
struct m2m1shot_buffer_dma *dma_buffer,
int plane,
enum dma_data_direction dir);
void (*finish_buffer)(struct m2m1shot_context *ctx,
struct m2m1shot_buffer_dma *dma_buffer,
int plane,
enum dma_data_direction dir);
int (*device_run)(struct m2m1shot_context *ctx,
struct m2m1shot_task *task);
void (*timeout_task)(struct m2m1shot_context *ctx,
struct m2m1shot_task *task);
/* optional */
long (*custom_ioctl)(struct m2m1shot_context *ctx,
unsigned int cmd, unsigned long arg);
};
/**
* m2m1shot_task_finish - notify a task is finishes and schedule new task
*
* - m21dev: pointer to struct m2m1shot_device
* - task: The task that is finished
* - success: true if task is processed successfully, false otherwise.
*
* This function wakes up the process that is waiting for the completion of
* @task. An IRQ handler is the best place to call this function. If @error
* is true, the user that requested @task will receive an error.
*/
void m2m1shot_task_finish(struct m2m1shot_device *m21dev,
struct m2m1shot_task *task, bool error);
/**
* m2m1shot_task_cancel - cancel a task and schedule the next task
*
* - m21dev: pointer to struct m2m1shot_device
* - task: The task that is finished
* - reason: the reason of canceling the task
*
* This function is called by the driver that wants to cancel @task and
* schedule the next task. Most drivers do not need to call this function.
* Keep in mind that this function does not wake up the process that is blocked
* for the completion of @task.
*/
void m2m1shot_task_cancel(struct m2m1shot_device *m21dev,
struct m2m1shot_task *task,
enum m2m1shot_state reason);
/**
* m2m1shot_create_device - create and initialze constructs for m2m1shot
*
* - dev: the device that m2m1shot provides services
* - ops: callbacks to m2m1shot
* - suffix: suffix of device node in /dev after 'm2m1shot_'
* - id: device instance number if a device has multiple instance. @id will be
* attached after @suffix. If @id is -1, no instance number is attached to
* @suffix.
* - timeout_jiffies: timeout jiffies for a task being processed. For 0,
* m2m1shot waits for completion of a task infinitely.
*
* Returns the pointer to struct m2m1shot_device on success.
* Returns -error on failure.
* This function is most likely called in probe() of a driver.
*/
struct m2m1shot_device *m2m1shot_create_device(struct device *dev,
const struct m2m1shot_devops *ops,
const char *suffix, int id,
unsigned long timeout_jiffies);
/**
* m2m1shot_destroy_device - destroy all constructs for m2m1shot
*
* m21dev - pointer to struct m2m1shot_device that is returned by
* m2m1shot_create_device()
*
* The driver that has a valid pointer to struct m2m1shot_device returned by
* m2m1shot_create_device() must call m2m1shot_destroy_device() before removing
* the driver.
*/
void m2m1shot_destroy_device(struct m2m1shot_device *m21dev);
/**
* m2m1shot_get_current_task - request the current task under processing
*
* m21dev - pointer to struct m2m1shot_device.
*
* Returns the pointer to struct m2m1shot_task that is processed by the device
* whose driver is mostly the caller. The returned pointer is valid until
* m2m1shot_task_finish() which schedules another task.
* NULL is returned if no task is currently processed.
*/
static inline struct m2m1shot_task *m2m1shot_get_current_task(
struct m2m1shot_device *m21dev)
{
return m21dev->current_task;
}
/**
* m2m1shot_set_dma_address - set DMA address
*/
static inline void m2m1shot_set_dma_address(
struct m2m1shot_buffer_dma *buffer_dma,
int plane, dma_addr_t dma_addr)
{
buffer_dma->plane[plane].dma_addr = dma_addr;
}
#endif /* _M2M1SHOT_H_ */

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/*
m52790.h - definition for m52790 inputs and outputs
Copyright (C) 2007 Hans Verkuil (hverkuil@xs4all.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _M52790_H_
#define _M52790_H_
/* Input routing switch 1 */
#define M52790_SW1_IN_MASK 0x0003
#define M52790_SW1_IN_TUNER 0x0000
#define M52790_SW1_IN_V2 0x0001
#define M52790_SW1_IN_V3 0x0002
#define M52790_SW1_IN_V4 0x0003
/* Selects component input instead of composite */
#define M52790_SW1_YCMIX 0x0004
/* Input routing switch 2 */
#define M52790_SW2_IN_MASK 0x0300
#define M52790_SW2_IN_TUNER 0x0000
#define M52790_SW2_IN_V2 0x0100
#define M52790_SW2_IN_V3 0x0200
#define M52790_SW2_IN_V4 0x0300
/* Selects component input instead of composite */
#define M52790_SW2_YCMIX 0x0400
/* Output routing switch 1 */
/* Enable 6dB amplifier for composite out */
#define M52790_SW1_V_AMP 0x0008
/* Enable 6dB amplifier for component out */
#define M52790_SW1_YC_AMP 0x0010
/* Audio output mode */
#define M52790_SW1_AUDIO_MASK 0x00c0
#define M52790_SW1_AUDIO_MUTE 0x0000
#define M52790_SW1_AUDIO_R 0x0040
#define M52790_SW1_AUDIO_L 0x0080
#define M52790_SW1_AUDIO_STEREO 0x00c0
/* Output routing switch 2 */
/* Enable 6dB amplifier for composite out */
#define M52790_SW2_V_AMP 0x0800
/* Enable 6dB amplifier for component out */
#define M52790_SW2_YC_AMP 0x1000
/* Audio output mode */
#define M52790_SW2_AUDIO_MASK 0xc000
#define M52790_SW2_AUDIO_MUTE 0x0000
#define M52790_SW2_AUDIO_R 0x4000
#define M52790_SW2_AUDIO_L 0x8000
#define M52790_SW2_AUDIO_STEREO 0xc000
/* Common values */
#define M52790_IN_TUNER (M52790_SW1_IN_TUNER | M52790_SW2_IN_TUNER)
#define M52790_IN_V2 (M52790_SW1_IN_V2 | M52790_SW2_IN_V2)
#define M52790_IN_V3 (M52790_SW1_IN_V3 | M52790_SW2_IN_V3)
#define M52790_IN_V4 (M52790_SW1_IN_V4 | M52790_SW2_IN_V4)
#define M52790_OUT_STEREO (M52790_SW1_AUDIO_STEREO | \
M52790_SW2_AUDIO_STEREO)
#define M52790_OUT_AMP_STEREO (M52790_SW1_AUDIO_STEREO | \
M52790_SW1_V_AMP | \
M52790_SW2_AUDIO_STEREO | \
M52790_SW2_V_AMP)
#endif

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/*
* Driver header for M-5MOLS 8M Pixel camera sensor with ISP
*
* Copyright (C) 2011 Samsung Electronics Co., Ltd.
* Author: HeungJun Kim <riverful.kim@samsung.com>
*
* Copyright (C) 2009 Samsung Electronics Co., Ltd.
* Author: Dongsoo Nathaniel Kim <dongsoo45.kim@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef MEDIA_M5MOLS_H
#define MEDIA_M5MOLS_H
/**
* struct m5mols_platform_data - platform data for M-5MOLS driver
* @gpio_reset: GPIO driving the reset pin of M-5MOLS
* @reset_polarity: active state for gpio_reset pin, 0 or 1
* @set_power: an additional callback to the board setup code
* to be called after enabling and before disabling
* the sensor's supply regulators
*/
struct m5mols_platform_data {
int gpio_reset;
u8 reset_polarity;
int (*set_power)(struct device *dev, int on);
};
#endif /* MEDIA_M5MOLS_H */

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/*
* Media device
*
* Copyright (C) 2010 Nokia Corporation
*
* Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
* Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _MEDIA_DEVICE_H
#define _MEDIA_DEVICE_H
#include <linux/list.h>
#include <linux/mutex.h>
#include <linux/spinlock.h>
#include <media/media-devnode.h>
#include <media/media-entity.h>
struct device;
/**
* struct media_device - Media device
* @dev: Parent device
* @devnode: Media device node
* @model: Device model name
* @serial: Device serial number (optional)
* @bus_info: Unique and stable device location identifier
* @hw_revision: Hardware device revision
* @driver_version: Device driver version
* @entity_id: ID of the next entity to be registered
* @entities: List of registered entities
* @lock: Entities list lock
* @graph_mutex: Entities graph operation lock
* @link_notify: Link state change notification callback
*
* This structure represents an abstract high-level media device. It allows easy
* access to entities and provides basic media device-level support. The
* structure can be allocated directly or embedded in a larger structure.
*
* The parent @dev is a physical device. It must be set before registering the
* media device.
*
* @model is a descriptive model name exported through sysfs. It doesn't have to
* be unique.
*/
struct media_device {
/* dev->driver_data points to this struct. */
struct device *dev;
struct media_devnode devnode;
char model[32];
char serial[40];
char bus_info[32];
u32 hw_revision;
u32 driver_version;
u32 entity_id;
struct list_head entities;
/* Protects the entities list */
spinlock_t lock;
/* Serializes graph operations. */
struct mutex graph_mutex;
int (*link_notify)(struct media_link *link, u32 flags,
unsigned int notification);
};
/* Supported link_notify @notification values. */
#define MEDIA_DEV_NOTIFY_PRE_LINK_CH 0
#define MEDIA_DEV_NOTIFY_POST_LINK_CH 1
/* media_devnode to media_device */
#define to_media_device(node) container_of(node, struct media_device, devnode)
int __must_check __media_device_register(struct media_device *mdev,
struct module *owner);
#define media_device_register(mdev) __media_device_register(mdev, THIS_MODULE)
void media_device_unregister(struct media_device *mdev);
int __must_check media_device_register_entity(struct media_device *mdev,
struct media_entity *entity);
void media_device_unregister_entity(struct media_entity *entity);
/* Iterate over all entities. */
#define media_device_for_each_entity(entity, mdev) \
list_for_each_entry(entity, &(mdev)->entities, list)
#endif

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/*
* Media device node
*
* Copyright (C) 2010 Nokia Corporation
*
* Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
* Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
* --
*
* Common functions for media-related drivers to register and unregister media
* device nodes.
*/
#ifndef _MEDIA_DEVNODE_H
#define _MEDIA_DEVNODE_H
#include <linux/poll.h>
#include <linux/fs.h>
#include <linux/device.h>
#include <linux/cdev.h>
/*
* Flag to mark the media_devnode struct as registered. Drivers must not touch
* this flag directly, it will be set and cleared by media_devnode_register and
* media_devnode_unregister.
*/
#define MEDIA_FLAG_REGISTERED 0
struct media_file_operations {
struct module *owner;
ssize_t (*read) (struct file *, char __user *, size_t, loff_t *);
ssize_t (*write) (struct file *, const char __user *, size_t, loff_t *);
unsigned int (*poll) (struct file *, struct poll_table_struct *);
long (*ioctl) (struct file *, unsigned int, unsigned long);
long (*compat_ioctl) (struct file *, unsigned int, unsigned long);
int (*open) (struct file *);
int (*release) (struct file *);
};
/**
* struct media_devnode - Media device node
* @parent: parent device
* @minor: device node minor number
* @flags: flags, combination of the MEDIA_FLAG_* constants
*
* This structure represents a media-related device node.
*
* The @parent is a physical device. It must be set by core or device drivers
* before registering the node.
*/
struct media_devnode {
/* device ops */
const struct media_file_operations *fops;
/* sysfs */
struct device dev; /* media device */
struct cdev cdev; /* character device */
struct device *parent; /* device parent */
/* device info */
int minor;
unsigned long flags; /* Use bitops to access flags */
/* callbacks */
void (*release)(struct media_devnode *mdev);
};
/* dev to media_devnode */
#define to_media_devnode(cd) container_of(cd, struct media_devnode, dev)
int __must_check media_devnode_register(struct media_devnode *mdev,
struct module *owner);
void media_devnode_unregister(struct media_devnode *mdev);
static inline struct media_devnode *media_devnode_data(struct file *filp)
{
return filp->private_data;
}
static inline int media_devnode_is_registered(struct media_devnode *mdev)
{
return test_bit(MEDIA_FLAG_REGISTERED, &mdev->flags);
}
#endif /* _MEDIA_DEVNODE_H */

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/*
* Media entity
*
* Copyright (C) 2010 Nokia Corporation
*
* Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
* Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _MEDIA_ENTITY_H
#define _MEDIA_ENTITY_H
#include <linux/bitops.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/media.h>
struct media_pipeline {
};
struct media_link {
struct media_pad *source; /* Source pad */
struct media_pad *sink; /* Sink pad */
struct media_link *reverse; /* Link in the reverse direction */
unsigned long flags; /* Link flags (MEDIA_LNK_FL_*) */
};
struct media_pad {
struct media_entity *entity; /* Entity this pad belongs to */
u16 index; /* Pad index in the entity pads array */
unsigned long flags; /* Pad flags (MEDIA_PAD_FL_*) */
};
struct media_entity_operations {
int (*link_setup)(struct media_entity *entity,
const struct media_pad *local,
const struct media_pad *remote, u32 flags);
int (*link_validate)(struct media_link *link);
};
struct media_entity {
struct list_head list;
struct media_device *parent; /* Media device this entity belongs to*/
u32 id; /* Entity ID, unique in the parent media
* device context */
const char *name; /* Entity name */
u32 type; /* Entity type (MEDIA_ENT_T_*) */
u32 revision; /* Entity revision, driver specific */
unsigned long flags; /* Entity flags (MEDIA_ENT_FL_*) */
u32 group_id; /* Entity group ID */
u16 num_pads; /* Number of sink and source pads */
u16 num_links; /* Number of existing links, both
* enabled and disabled */
u16 num_backlinks; /* Number of backlinks */
u16 max_links; /* Maximum number of links */
struct media_pad *pads; /* Pads array (num_pads elements) */
struct media_link *links; /* Links array (max_links elements)*/
const struct media_entity_operations *ops; /* Entity operations */
/* Reference counts must never be negative, but are signed integers on
* purpose: a simple WARN_ON(<0) check can be used to detect reference
* count bugs that would make them negative.
*/
int stream_count; /* Stream count for the entity. */
int use_count; /* Use count for the entity. */
struct media_pipeline *pipe; /* Pipeline this entity belongs to. */
union {
/* Node specifications */
struct {
u32 major;
u32 minor;
} v4l;
struct {
u32 major;
u32 minor;
} fb;
struct {
u32 card;
u32 device;
u32 subdevice;
} alsa;
int dvb;
/* Sub-device specifications */
/* Nothing needed yet */
} info;
};
static inline u32 media_entity_type(struct media_entity *entity)
{
return entity->type & MEDIA_ENT_TYPE_MASK;
}
static inline u32 media_entity_subtype(struct media_entity *entity)
{
return entity->type & MEDIA_ENT_SUBTYPE_MASK;
}
#define MEDIA_ENTITY_ENUM_MAX_DEPTH 16
#define MEDIA_ENTITY_ENUM_MAX_ID 64
struct media_entity_graph {
struct {
struct media_entity *entity;
int link;
} stack[MEDIA_ENTITY_ENUM_MAX_DEPTH];
DECLARE_BITMAP(entities, MEDIA_ENTITY_ENUM_MAX_ID);
int top;
};
int media_entity_init(struct media_entity *entity, u16 num_pads,
struct media_pad *pads, u16 extra_links);
void media_entity_cleanup(struct media_entity *entity);
int media_entity_create_link(struct media_entity *source, u16 source_pad,
struct media_entity *sink, u16 sink_pad, u32 flags);
void __media_entity_remove_links(struct media_entity *entity);
void media_entity_remove_links(struct media_entity *entity);
int __media_entity_setup_link(struct media_link *link, u32 flags);
int media_entity_setup_link(struct media_link *link, u32 flags);
struct media_link *media_entity_find_link(struct media_pad *source,
struct media_pad *sink);
struct media_pad *media_entity_remote_pad(struct media_pad *pad);
struct media_entity *media_entity_get(struct media_entity *entity);
void media_entity_put(struct media_entity *entity);
void media_entity_graph_walk_start(struct media_entity_graph *graph,
struct media_entity *entity);
struct media_entity *
media_entity_graph_walk_next(struct media_entity_graph *graph);
__must_check int media_entity_pipeline_start(struct media_entity *entity,
struct media_pipeline *pipe);
void media_entity_pipeline_stop(struct media_entity *entity);
#define media_entity_call(entity, operation, args...) \
(((entity)->ops && (entity)->ops->operation) ? \
(entity)->ops->operation((entity) , ##args) : -ENOIOCTLCMD)
#endif

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/*
* Information for the Marvell Armada MMP camera
*/
struct mmp_camera_platform_data {
struct platform_device *i2c_device;
int sensor_power_gpio;
int sensor_reset_gpio;
};

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/*
msp3400.h - definition for msp3400 inputs and outputs
Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _MSP3400_H_
#define _MSP3400_H_
/* msp3400 routing
===============
The msp3400 has a complicated routing scheme with many possible
combinations. The details are all in the datasheets but I will try
to give a short description here.
Inputs
======
There are 1) tuner inputs, 2) I2S inputs, 3) SCART inputs. You will have
to select which tuner input to use and which SCART input to use. The
selected tuner input, the selected SCART input and all I2S inputs go to
the DSP (the tuner input first goes through the demodulator).
The DSP handles things like volume, bass/treble, balance, and some chips
have support for surround sound. It has several outputs: MAIN, AUX, I2S
and SCART1/2. Each output can select which DSP input to use. So the MAIN
output can select the tuner input while at the same time the SCART1 output
uses the I2S input.
Outputs
=======
Most DSP outputs are also the outputs of the msp3400. However, the SCART
outputs of the msp3400 can select which input to use: either the SCART1 or
SCART2 output from the DSP, or the msp3400 SCART inputs, thus completely
bypassing the DSP.
Summary
=======
So to specify a complete routing scheme for the msp3400 you will have to
specify in the 'input' arg of the s_routing function:
1) which tuner input to use
2) which SCART input to use
3) which DSP input to use for each DSP output
And in the 'output' arg of the s_routing function you specify:
1) which SCART input to use for each SCART output
Depending on how the msp is wired to the other components you can
ignore or mute certain inputs or outputs.
Also, depending on the msp version only a subset of the inputs or
outputs may be present. At the end of this header some tables are
added containing a list of what is available for each msp version.
*/
/* Inputs to the DSP unit: two independent selections have to be made:
1) the tuner (SIF) input
2) the SCART input
Bits 0-2 are used for the SCART input select, bit 3 is used for the tuner
input, bits 4-7 are reserved.
*/
/* SCART input to DSP selection */
#define MSP_IN_SCART1 0 /* Pin SC1_IN */
#define MSP_IN_SCART2 1 /* Pin SC2_IN */
#define MSP_IN_SCART3 2 /* Pin SC3_IN */
#define MSP_IN_SCART4 3 /* Pin SC4_IN */
#define MSP_IN_MONO 6 /* Pin MONO_IN */
#define MSP_IN_MUTE 7 /* Mute DSP input */
#define MSP_SCART_TO_DSP(in) (in)
/* Tuner input to demodulator and DSP selection */
#define MSP_IN_TUNER1 0 /* Analog Sound IF input pin ANA_IN1 */
#define MSP_IN_TUNER2 1 /* Analog Sound IF input pin ANA_IN2 */
#define MSP_TUNER_TO_DSP(in) ((in) << 3)
/* The msp has up to 5 DSP outputs, each output can independently select
a DSP input.
The DSP outputs are: loudspeaker output (aka MAIN), headphones output
(aka AUX), SCART1 DA output, SCART2 DA output and an I2S output.
There also is a quasi-peak detector output, but that is not used by
this driver and is set to the same input as the loudspeaker output.
Not all outputs are supported by all msp models. Setting the input
of an unsupported output will be ignored by the driver.
There are up to 16 DSP inputs to choose from, so each output is
assigned 4 bits.
Note: the 44x8G can mix two inputs and feed the result back to the
DSP. This is currently not implemented. Also not implemented is the
multi-channel capable I2S3 input of the 44x0G. If someone can demonstrate
a need for one of those features then additional support can be added. */
#define MSP_DSP_IN_TUNER 0 /* Tuner DSP input */
#define MSP_DSP_IN_SCART 2 /* SCART DSP input */
#define MSP_DSP_IN_I2S1 5 /* I2S1 DSP input */
#define MSP_DSP_IN_I2S2 6 /* I2S2 DSP input */
#define MSP_DSP_IN_I2S3 7 /* I2S3 DSP input */
#define MSP_DSP_IN_MAIN_AVC 11 /* MAIN AVC processed DSP input */
#define MSP_DSP_IN_MAIN 12 /* MAIN DSP input */
#define MSP_DSP_IN_AUX 13 /* AUX DSP input */
#define MSP_DSP_TO_MAIN(in) ((in) << 4)
#define MSP_DSP_TO_AUX(in) ((in) << 8)
#define MSP_DSP_TO_SCART1(in) ((in) << 12)
#define MSP_DSP_TO_SCART2(in) ((in) << 16)
#define MSP_DSP_TO_I2S(in) ((in) << 20)
/* Output SCART select: the SCART outputs can select which input
to use. */
#define MSP_SC_IN_SCART1 0 /* SCART1 input, bypassing the DSP */
#define MSP_SC_IN_SCART2 1 /* SCART2 input, bypassing the DSP */
#define MSP_SC_IN_SCART3 2 /* SCART3 input, bypassing the DSP */
#define MSP_SC_IN_SCART4 3 /* SCART4 input, bypassing the DSP */
#define MSP_SC_IN_DSP_SCART1 4 /* DSP SCART1 input */
#define MSP_SC_IN_DSP_SCART2 5 /* DSP SCART2 input */
#define MSP_SC_IN_MONO 6 /* MONO input, bypassing the DSP */
#define MSP_SC_IN_MUTE 7 /* MUTE output */
#define MSP_SC_TO_SCART1(in) (in)
#define MSP_SC_TO_SCART2(in) ((in) << 4)
/* Shortcut macros */
#define MSP_INPUT(sc, t, main_aux_src, sc_i2s_src) \
(MSP_SCART_TO_DSP(sc) | \
MSP_TUNER_TO_DSP(t) | \
MSP_DSP_TO_MAIN(main_aux_src) | \
MSP_DSP_TO_AUX(main_aux_src) | \
MSP_DSP_TO_SCART1(sc_i2s_src) | \
MSP_DSP_TO_SCART2(sc_i2s_src) | \
MSP_DSP_TO_I2S(sc_i2s_src))
#define MSP_INPUT_DEFAULT MSP_INPUT(MSP_IN_SCART1, MSP_IN_TUNER1, \
MSP_DSP_IN_TUNER, MSP_DSP_IN_TUNER)
#define MSP_OUTPUT(sc) \
(MSP_SC_TO_SCART1(sc) | \
MSP_SC_TO_SCART2(sc))
/* This equals the RESET position of the msp3400 ACB register */
#define MSP_OUTPUT_DEFAULT (MSP_SC_TO_SCART1(MSP_SC_IN_SCART3) | \
MSP_SC_TO_SCART2(MSP_SC_IN_DSP_SCART1))
/* Tuner inputs vs. msp version */
/* Chip TUNER_1 TUNER_2
-------------------------
msp34x0b y y
msp34x0c y y
msp34x0d y y
msp34x5d y n
msp34x7d y n
msp34x0g y y
msp34x1g y y
msp34x2g y y
msp34x5g y n
msp34x7g y n
msp44x0g y y
msp44x8g y y
*/
/* SCART inputs vs. msp version */
/* Chip SC1 SC2 SC3 SC4
-------------------------
msp34x0b y y y n
msp34x0c y y y n
msp34x0d y y y y
msp34x5d y y n n
msp34x7d y n n n
msp34x0g y y y y
msp34x1g y y y y
msp34x2g y y y y
msp34x5g y y n n
msp34x7g y n n n
msp44x0g y y y y
msp44x8g y y y y
*/
/* DSP inputs vs. msp version (tuner and SCART inputs are always available) */
/* Chip I2S1 I2S2 I2S3 MAIN_AVC MAIN AUX
------------------------------------------
msp34x0b y n n n n n
msp34x0c y y n n n n
msp34x0d y y n n n n
msp34x5d y y n n n n
msp34x7d n n n n n n
msp34x0g y y n n n n
msp34x1g y y n n n n
msp34x2g y y n y y y
msp34x5g y y n n n n
msp34x7g n n n n n n
msp44x0g y y y y y y
msp44x8g y y y n n n
*/
/* DSP outputs vs. msp version */
/* Chip MAIN AUX SCART1 SCART2 I2S
------------------------------------
msp34x0b y y y n y
msp34x0c y y y n y
msp34x0d y y y y y
msp34x5d y n y n y
msp34x7d y n y n n
msp34x0g y y y y y
msp34x1g y y y y y
msp34x2g y y y y y
msp34x5g y n y n y
msp34x7g y n y n n
msp44x0g y y y y y
msp44x8g y y y y y
*/
#endif /* MSP3400_H */

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/*
* Driver for MT9M032 CMOS Image Sensor from Micron
*
* Copyright (C) 2010-2011 Lund Engineering
* Contact: Gil Lund <gwlund@lundeng.com>
* Author: Martin Hostettler <martin@neutronstar.dyndns.org>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef MT9M032_H
#define MT9M032_H
#define MT9M032_NAME "mt9m032"
#define MT9M032_I2C_ADDR (0xb8 >> 1)
struct mt9m032_platform_data {
u32 ext_clock;
u32 pix_clock;
bool invert_pixclock;
};
#endif /* MT9M032_H */

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#ifndef MT9P031_H
#define MT9P031_H
struct v4l2_subdev;
/*
* struct mt9p031_platform_data - MT9P031 platform data
* @reset: Chip reset GPIO (set to -1 if not used)
* @ext_freq: Input clock frequency
* @target_freq: Pixel clock frequency
*/
struct mt9p031_platform_data {
int reset;
int ext_freq;
int target_freq;
};
#endif

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#ifndef _MEDIA_MT9T001_H
#define _MEDIA_MT9T001_H
struct mt9t001_platform_data {
unsigned int clk_pol:1;
unsigned int ext_clk;
};
#endif

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/* mt9t112 Camera
*
* Copyright (C) 2009 Renesas Solutions Corp.
* Kuninori Morimoto <morimoto.kuninori@renesas.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __MT9T112_H__
#define __MT9T112_H__
#define MT9T112_FLAG_PCLK_RISING_EDGE (1 << 0)
#define MT9T112_FLAG_DATAWIDTH_8 (1 << 1) /* default width is 10 */
struct mt9t112_pll_divider {
u8 m, n;
u8 p1, p2, p3, p4, p5, p6, p7;
};
/*
* mt9t112 camera info
*/
struct mt9t112_camera_info {
u32 flags;
struct mt9t112_pll_divider divider;
};
#endif /* __MT9T112_H__ */

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/* mt9v011 sensor
*
* Copyright (C) 2011 Hans Verkuil <hverkuil@xs4all.nl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __MT9V011_H__
#define __MT9V011_H__
struct mt9v011_platform_data {
unsigned xtal; /* Hz */
};
#endif

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/*
* mt9v022 sensor
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __MT9V022_H__
#define __MT9V022_H__
struct mt9v022_platform_data {
unsigned short y_skip_top; /* Lines to skip at the top */
};
#endif

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#ifndef _MEDIA_MT9V032_H
#define _MEDIA_MT9V032_H
struct mt9v032_platform_data {
unsigned int clk_pol:1;
const s64 *link_freqs;
s64 link_def_freq;
};
#endif

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/*
* Driver header for NOON010PC30L camera sensor chip.
*
* Copyright (c) 2010 Samsung Electronics, Co. Ltd
* Contact: Sylwester Nawrocki <s.nawrocki@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef NOON010PC30_H
#define NOON010PC30_H
/**
* @clk_rate: the clock frequency in Hz
* @gpio_nreset: GPIO driving nRESET pin
* @gpio_nstby: GPIO driving nSTBY pin
*/
struct noon010pc30_platform_data {
unsigned long clk_rate;
int gpio_nreset;
int gpio_nstby;
};
#endif /* NOON010PC30_H */

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/*
* Header for V4L2 SoC Camera driver for OMAP1 Camera Interface
*
* Copyright (C) 2010, Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __MEDIA_OMAP1_CAMERA_H_
#define __MEDIA_OMAP1_CAMERA_H_
#include <linux/bitops.h>
#define OMAP1_CAMERA_IOSIZE 0x1c
enum omap1_cam_vb_mode {
OMAP1_CAM_DMA_CONTIG = 0,
OMAP1_CAM_DMA_SG,
};
#define OMAP1_CAMERA_MIN_BUF_COUNT(x) ((x) == OMAP1_CAM_DMA_CONTIG ? 3 : 2)
struct omap1_cam_platform_data {
unsigned long camexclk_khz;
unsigned long lclk_khz_max;
unsigned long flags;
};
#define OMAP1_CAMERA_LCLK_RISING BIT(0)
#define OMAP1_CAMERA_RST_LOW BIT(1)
#define OMAP1_CAMERA_RST_HIGH BIT(2)
#endif /* __MEDIA_OMAP1_CAMERA_H_ */

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/*
* omap3isp.h
*
* TI OMAP3 ISP - Platform data
*
* Copyright (C) 2011 Nokia Corporation
*
* Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
* Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*/
#ifndef __MEDIA_OMAP3ISP_H__
#define __MEDIA_OMAP3ISP_H__
struct i2c_board_info;
struct isp_device;
enum isp_interface_type {
ISP_INTERFACE_PARALLEL,
ISP_INTERFACE_CSI2A_PHY2,
ISP_INTERFACE_CCP2B_PHY1,
ISP_INTERFACE_CCP2B_PHY2,
ISP_INTERFACE_CSI2C_PHY1,
};
enum {
ISP_LANE_SHIFT_0 = 0,
ISP_LANE_SHIFT_2 = 1,
ISP_LANE_SHIFT_4 = 2,
ISP_LANE_SHIFT_6 = 3,
};
/**
* struct isp_parallel_platform_data - Parallel interface platform data
* @data_lane_shift: Data lane shifter
* ISP_LANE_SHIFT_0 - CAMEXT[13:0] -> CAM[13:0]
* ISP_LANE_SHIFT_2 - CAMEXT[13:2] -> CAM[11:0]
* ISP_LANE_SHIFT_4 - CAMEXT[13:4] -> CAM[9:0]
* ISP_LANE_SHIFT_6 - CAMEXT[13:6] -> CAM[7:0]
* @clk_pol: Pixel clock polarity
* 0 - Sample on rising edge, 1 - Sample on falling edge
* @hs_pol: Horizontal synchronization polarity
* 0 - Active high, 1 - Active low
* @vs_pol: Vertical synchronization polarity
* 0 - Active high, 1 - Active low
* @fld_pol: Field signal polarity
* 0 - Positive, 1 - Negative
* @data_pol: Data polarity
* 0 - Normal, 1 - One's complement
*/
struct isp_parallel_platform_data {
unsigned int data_lane_shift:2;
unsigned int clk_pol:1;
unsigned int hs_pol:1;
unsigned int vs_pol:1;
unsigned int fld_pol:1;
unsigned int data_pol:1;
};
enum {
ISP_CCP2_PHY_DATA_CLOCK = 0,
ISP_CCP2_PHY_DATA_STROBE = 1,
};
enum {
ISP_CCP2_MODE_MIPI = 0,
ISP_CCP2_MODE_CCP2 = 1,
};
/**
* struct isp_csiphy_lane: CCP2/CSI2 lane position and polarity
* @pos: position of the lane
* @pol: polarity of the lane
*/
struct isp_csiphy_lane {
u8 pos;
u8 pol;
};
#define ISP_CSIPHY1_NUM_DATA_LANES 1
#define ISP_CSIPHY2_NUM_DATA_LANES 2
/**
* struct isp_csiphy_lanes_cfg - CCP2/CSI2 lane configuration
* @data: Configuration of one or two data lanes
* @clk: Clock lane configuration
*/
struct isp_csiphy_lanes_cfg {
struct isp_csiphy_lane data[ISP_CSIPHY2_NUM_DATA_LANES];
struct isp_csiphy_lane clk;
};
/**
* struct isp_ccp2_platform_data - CCP2 interface platform data
* @strobe_clk_pol: Strobe/clock polarity
* 0 - Non Inverted, 1 - Inverted
* @crc: Enable the cyclic redundancy check
* @ccp2_mode: Enable CCP2 compatibility mode
* ISP_CCP2_MODE_MIPI - MIPI-CSI1 mode
* ISP_CCP2_MODE_CCP2 - CCP2 mode
* @phy_layer: Physical layer selection
* ISP_CCP2_PHY_DATA_CLOCK - Data/clock physical layer
* ISP_CCP2_PHY_DATA_STROBE - Data/strobe physical layer
* @vpclk_div: Video port output clock control
*/
struct isp_ccp2_platform_data {
unsigned int strobe_clk_pol:1;
unsigned int crc:1;
unsigned int ccp2_mode:1;
unsigned int phy_layer:1;
unsigned int vpclk_div:2;
struct isp_csiphy_lanes_cfg lanecfg;
};
/**
* struct isp_csi2_platform_data - CSI2 interface platform data
* @crc: Enable the cyclic redundancy check
* @vpclk_div: Video port output clock control
*/
struct isp_csi2_platform_data {
unsigned crc:1;
unsigned vpclk_div:2;
struct isp_csiphy_lanes_cfg lanecfg;
};
struct isp_subdev_i2c_board_info {
struct i2c_board_info *board_info;
int i2c_adapter_id;
};
struct isp_v4l2_subdevs_group {
struct isp_subdev_i2c_board_info *subdevs;
enum isp_interface_type interface;
union {
struct isp_parallel_platform_data parallel;
struct isp_ccp2_platform_data ccp2;
struct isp_csi2_platform_data csi2;
} bus; /* gcc < 4.6.0 chokes on anonymous union initializers */
};
struct isp_platform_xclk {
const char *dev_id;
const char *con_id;
};
struct isp_platform_data {
struct isp_platform_xclk xclks[2];
struct isp_v4l2_subdevs_group *subdevs;
void (*set_constraints)(struct isp_device *isp, bool enable);
};
#endif /* __MEDIA_OMAP3ISP_H__ */

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#ifndef ARCH_ARM_PLAT_OMAP4_ISS_H
#define ARCH_ARM_PLAT_OMAP4_ISS_H
#include <linux/i2c.h>
struct iss_device;
enum iss_interface_type {
ISS_INTERFACE_CSI2A_PHY1,
ISS_INTERFACE_CSI2B_PHY2,
};
/**
* struct iss_csiphy_lane: CSI2 lane position and polarity
* @pos: position of the lane
* @pol: polarity of the lane
*/
struct iss_csiphy_lane {
u8 pos;
u8 pol;
};
#define ISS_CSIPHY1_NUM_DATA_LANES 4
#define ISS_CSIPHY2_NUM_DATA_LANES 1
/**
* struct iss_csiphy_lanes_cfg - CSI2 lane configuration
* @data: Configuration of one or two data lanes
* @clk: Clock lane configuration
*/
struct iss_csiphy_lanes_cfg {
struct iss_csiphy_lane data[ISS_CSIPHY1_NUM_DATA_LANES];
struct iss_csiphy_lane clk;
};
/**
* struct iss_csi2_platform_data - CSI2 interface platform data
* @crc: Enable the cyclic redundancy check
* @vpclk_div: Video port output clock control
*/
struct iss_csi2_platform_data {
unsigned crc:1;
unsigned vpclk_div:2;
struct iss_csiphy_lanes_cfg lanecfg;
};
struct iss_subdev_i2c_board_info {
struct i2c_board_info *board_info;
int i2c_adapter_id;
};
struct iss_v4l2_subdevs_group {
struct iss_subdev_i2c_board_info *subdevs;
enum iss_interface_type interface;
union {
struct iss_csi2_platform_data csi2;
} bus; /* gcc < 4.6.0 chokes on anonymous union initializers */
};
struct iss_platform_data {
struct iss_v4l2_subdevs_group *subdevs;
void (*set_constraints)(struct iss_device *iss, bool enable);
};
#endif

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/*
* A V4L2 driver for OmniVision OV7670 cameras.
*
* Copyright 2010 One Laptop Per Child
*
* This file may be distributed under the terms of the GNU General
* Public License, version 2.
*/
#ifndef __OV7670_H
#define __OV7670_H
struct ov7670_config {
int min_width; /* Filter out smaller sizes */
int min_height; /* Filter out smaller sizes */
int clock_speed; /* External clock speed (MHz) */
bool use_smbus; /* Use smbus I/O instead of I2C */
bool pll_bypass; /* Choose whether to bypass the PLL */
bool pclk_hb_disable; /* Disable toggling pixclk during horizontal blanking */
};
#endif

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/*
* ov772x Camera
*
* Copyright (C) 2008 Renesas Solutions Corp.
* Kuninori Morimoto <morimoto.kuninori@renesas.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __OV772X_H__
#define __OV772X_H__
/* for flags */
#define OV772X_FLAG_VFLIP (1 << 0) /* Vertical flip image */
#define OV772X_FLAG_HFLIP (1 << 1) /* Horizontal flip image */
/*
* for Edge ctrl
*
* strength also control Auto or Manual Edge Control Mode
* see also OV772X_MANUAL_EDGE_CTRL
*/
struct ov772x_edge_ctrl {
unsigned char strength;
unsigned char threshold;
unsigned char upper;
unsigned char lower;
};
#define OV772X_MANUAL_EDGE_CTRL 0x80 /* un-used bit of strength */
#define OV772X_EDGE_STRENGTH_MASK 0x1F
#define OV772X_EDGE_THRESHOLD_MASK 0x0F
#define OV772X_EDGE_UPPER_MASK 0xFF
#define OV772X_EDGE_LOWER_MASK 0xFF
#define OV772X_AUTO_EDGECTRL(u, l) \
{ \
.upper = (u & OV772X_EDGE_UPPER_MASK), \
.lower = (l & OV772X_EDGE_LOWER_MASK), \
}
#define OV772X_MANUAL_EDGECTRL(s, t) \
{ \
.strength = (s & OV772X_EDGE_STRENGTH_MASK) | \
OV772X_MANUAL_EDGE_CTRL, \
.threshold = (t & OV772X_EDGE_THRESHOLD_MASK), \
}
/*
* ov772x camera info
*/
struct ov772x_camera_info {
unsigned long flags;
struct ov772x_edge_ctrl edgectrl;
};
#endif /* __OV772X_H__ */

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/*
* OV9650/OV9652 camera sensors driver
*
* Copyright (C) 2013 Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef OV9650_H_
#define OV9650_H_
/**
* struct ov9650_platform_data - ov9650 driver platform data
* @mclk_frequency: the sensor's master clock frequency in Hz
* @gpio_pwdn: number of a GPIO connected to OV965X PWDN pin
* @gpio_reset: number of a GPIO connected to OV965X RESET pin
*
* If any of @gpio_pwdn or @gpio_reset are unused then they should be
* set to a negative value. @mclk_frequency must always be specified.
*/
struct ov9650_platform_data {
unsigned long mclk_frequency;
int gpio_pwdn;
int gpio_reset;
};
#endif /* OV9650_H_ */

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/*
* include/media/radio-si4713.h
*
* Board related data definitions for Si4713 radio transmitter chip.
*
* Copyright (c) 2009 Nokia Corporation
* Contact: Eduardo Valentin <eduardo.valentin@nokia.com>
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*
*/
#ifndef RADIO_SI4713_H
#define RADIO_SI4713_H
#include <linux/i2c.h>
#define SI4713_NAME "radio-si4713"
/*
* Platform dependent definition
*/
struct radio_si4713_platform_data {
int i2c_bus;
struct i2c_board_info *subdev_board_info;
};
#endif /* ifndef RADIO_SI4713_H*/

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/*
* Remote Controller core header
*
* Copyright (C) 2009-2010 by Mauro Carvalho Chehab
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _RC_CORE
#define _RC_CORE
#include <linux/spinlock.h>
#include <linux/kfifo.h>
#include <linux/time.h>
#include <linux/timer.h>
#include <media/rc-map.h>
extern int rc_core_debug;
#define IR_dprintk(level, fmt, ...) \
do { \
if (rc_core_debug >= level) \
printk(KERN_DEBUG pr_fmt(fmt), ##__VA_ARGS__); \
} while (0)
enum rc_driver_type {
RC_DRIVER_SCANCODE = 0, /* Driver or hardware generates a scancode */
RC_DRIVER_IR_RAW, /* Needs a Infra-Red pulse/space decoder */
};
/**
* struct rc_scancode_filter - Filter scan codes.
* @data: Scancode data to match.
* @mask: Mask of bits of scancode to compare.
*/
struct rc_scancode_filter {
u32 data;
u32 mask;
};
/**
* enum rc_filter_type - Filter type constants.
* @RC_FILTER_NORMAL: Filter for normal operation.
* @RC_FILTER_WAKEUP: Filter for waking from suspend.
* @RC_FILTER_MAX: Number of filter types.
*/
enum rc_filter_type {
RC_FILTER_NORMAL = 0,
RC_FILTER_WAKEUP,
RC_FILTER_MAX
};
/**
* struct rc_dev - represents a remote control device
* @dev: driver model's view of this device
* @sysfs_groups: sysfs attribute groups
* @input_name: name of the input child device
* @input_phys: physical path to the input child device
* @input_id: id of the input child device (struct input_id)
* @driver_name: name of the hardware driver which registered this device
* @map_name: name of the default keymap
* @rc_map: current scan/key table
* @lock: used to ensure we've filled in all protocol details before
* anyone can call show_protocols or store_protocols
* @devno: unique remote control device number
* @raw: additional data for raw pulse/space devices
* @input_dev: the input child device used to communicate events to userspace
* @driver_type: specifies if protocol decoding is done in hardware or software
* @idle: used to keep track of RX state
* @allowed_protocols: bitmask with the supported RC_BIT_* protocols
* @enabled_protocols: bitmask with the enabled RC_BIT_* protocols
* @allowed_wakeup_protocols: bitmask with the supported RC_BIT_* wakeup protocols
* @enabled_wakeup_protocols: bitmask with the enabled RC_BIT_* wakeup protocols
* @scancode_filter: scancode filter
* @scancode_wakeup_filter: scancode wakeup filters
* @scancode_mask: some hardware decoders are not capable of providing the full
* scancode to the application. As this is a hardware limit, we can't do
* anything with it. Yet, as the same keycode table can be used with other
* devices, a mask is provided to allow its usage. Drivers should generally
* leave this field in blank
* @users: number of current users of the device
* @priv: driver-specific data
* @keylock: protects the remaining members of the struct
* @keypressed: whether a key is currently pressed
* @keyup_jiffies: time (in jiffies) when the current keypress should be released
* @timer_keyup: timer for releasing a keypress
* @last_keycode: keycode of last keypress
* @last_protocol: protocol of last keypress
* @last_scancode: scancode of last keypress
* @last_toggle: toggle value of last command
* @timeout: optional time after which device stops sending data
* @min_timeout: minimum timeout supported by device
* @max_timeout: maximum timeout supported by device
* @rx_resolution : resolution (in ns) of input sampler
* @tx_resolution: resolution (in ns) of output sampler
* @change_protocol: allow changing the protocol used on hardware decoders
* @change_wakeup_protocol: allow changing the protocol used for wakeup
* filtering
* @open: callback to allow drivers to enable polling/irq when IR input device
* is opened.
* @close: callback to allow drivers to disable polling/irq when IR input device
* is opened.
* @s_tx_mask: set transmitter mask (for devices with multiple tx outputs)
* @s_tx_carrier: set transmit carrier frequency
* @s_tx_duty_cycle: set transmit duty cycle (0% - 100%)
* @s_rx_carrier: inform driver about carrier it is expected to handle
* @tx_ir: transmit IR
* @s_idle: enable/disable hardware idle mode, upon which,
* device doesn't interrupt host until it sees IR pulses
* @s_learning_mode: enable wide band receiver used for learning
* @s_carrier_report: enable carrier reports
* @s_filter: set the scancode filter
* @s_wakeup_filter: set the wakeup scancode filter
*/
struct rc_dev {
struct device dev;
const struct attribute_group *sysfs_groups[5];
const char *input_name;
const char *input_phys;
struct input_id input_id;
char *driver_name;
const char *map_name;
struct rc_map rc_map;
struct mutex lock;
unsigned long devno;
struct ir_raw_event_ctrl *raw;
struct input_dev *input_dev;
enum rc_driver_type driver_type;
bool idle;
u64 allowed_protocols;
u64 enabled_protocols;
u64 allowed_wakeup_protocols;
u64 enabled_wakeup_protocols;
struct rc_scancode_filter scancode_filter;
struct rc_scancode_filter scancode_wakeup_filter;
u32 scancode_mask;
u32 users;
void *priv;
spinlock_t keylock;
bool keypressed;
unsigned long keyup_jiffies;
struct timer_list timer_keyup;
u32 last_keycode;
enum rc_type last_protocol;
u32 last_scancode;
u8 last_toggle;
u32 timeout;
u32 min_timeout;
u32 max_timeout;
u32 rx_resolution;
u32 tx_resolution;
int (*change_protocol)(struct rc_dev *dev, u64 *rc_type);
int (*change_wakeup_protocol)(struct rc_dev *dev, u64 *rc_type);
int (*open)(struct rc_dev *dev);
void (*close)(struct rc_dev *dev);
int (*s_tx_mask)(struct rc_dev *dev, u32 mask);
int (*s_tx_carrier)(struct rc_dev *dev, u32 carrier);
int (*s_tx_duty_cycle)(struct rc_dev *dev, u32 duty_cycle);
int (*s_rx_carrier_range)(struct rc_dev *dev, u32 min, u32 max);
int (*tx_ir)(struct rc_dev *dev, unsigned *txbuf, unsigned n);
void (*s_idle)(struct rc_dev *dev, bool enable);
int (*s_learning_mode)(struct rc_dev *dev, int enable);
int (*s_carrier_report) (struct rc_dev *dev, int enable);
int (*s_filter)(struct rc_dev *dev,
struct rc_scancode_filter *filter);
int (*s_wakeup_filter)(struct rc_dev *dev,
struct rc_scancode_filter *filter);
};
#define to_rc_dev(d) container_of(d, struct rc_dev, dev)
/*
* From rc-main.c
* Those functions can be used on any type of Remote Controller. They
* basically creates an input_dev and properly reports the device as a
* Remote Controller, at sys/class/rc.
*/
struct rc_dev *rc_allocate_device(void);
void rc_free_device(struct rc_dev *dev);
int rc_register_device(struct rc_dev *dev);
void rc_unregister_device(struct rc_dev *dev);
int rc_open(struct rc_dev *rdev);
void rc_close(struct rc_dev *rdev);
void rc_repeat(struct rc_dev *dev);
void rc_keydown(struct rc_dev *dev, enum rc_type protocol, u32 scancode, u8 toggle);
void rc_keydown_notimeout(struct rc_dev *dev, enum rc_type protocol, u32 scancode, u8 toggle);
void rc_keyup(struct rc_dev *dev);
u32 rc_g_keycode_from_table(struct rc_dev *dev, u32 scancode);
/*
* From rc-raw.c
* The Raw interface is specific to InfraRed. It may be a good idea to
* split it later into a separate header.
*/
enum raw_event_type {
IR_SPACE = (1 << 0),
IR_PULSE = (1 << 1),
IR_START_EVENT = (1 << 2),
IR_STOP_EVENT = (1 << 3),
};
struct ir_raw_event {
union {
u32 duration;
struct {
u32 carrier;
u8 duty_cycle;
};
};
unsigned pulse:1;
unsigned reset:1;
unsigned timeout:1;
unsigned carrier_report:1;
};
#define DEFINE_IR_RAW_EVENT(event) \
struct ir_raw_event event = { \
{ .duration = 0 } , \
.pulse = 0, \
.reset = 0, \
.timeout = 0, \
.carrier_report = 0 }
static inline void init_ir_raw_event(struct ir_raw_event *ev)
{
memset(ev, 0, sizeof(*ev));
}
#define IR_MAX_DURATION 0xFFFFFFFF /* a bit more than 4 seconds */
#define US_TO_NS(usec) ((usec) * 1000)
#define MS_TO_US(msec) ((msec) * 1000)
#define MS_TO_NS(msec) ((msec) * 1000 * 1000)
void ir_raw_event_handle(struct rc_dev *dev);
int ir_raw_event_store(struct rc_dev *dev, struct ir_raw_event *ev);
int ir_raw_event_store_edge(struct rc_dev *dev, enum raw_event_type type);
int ir_raw_event_store_with_filter(struct rc_dev *dev,
struct ir_raw_event *ev);
void ir_raw_event_set_idle(struct rc_dev *dev, bool idle);
static inline void ir_raw_event_reset(struct rc_dev *dev)
{
DEFINE_IR_RAW_EVENT(ev);
ev.reset = true;
ir_raw_event_store(dev, &ev);
ir_raw_event_handle(dev);
}
/* extract mask bits out of data and pack them into the result */
static inline u32 ir_extract_bits(u32 data, u32 mask)
{
u32 vbit = 1, value = 0;
do {
if (mask & 1) {
if (data & 1)
value |= vbit;
vbit <<= 1;
}
data >>= 1;
} while (mask >>= 1);
return value;
}
#endif /* _RC_CORE */

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/*
* rc-map.h - define RC map names used by RC drivers
*
* Copyright (c) 2010 by Mauro Carvalho Chehab
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/input.h>
enum rc_type {
RC_TYPE_UNKNOWN = 0, /* Protocol not known */
RC_TYPE_OTHER = 1, /* Protocol known but proprietary */
RC_TYPE_LIRC = 2, /* Pass raw IR to lirc userspace */
RC_TYPE_RC5 = 3, /* Philips RC5 protocol */
RC_TYPE_RC5X = 4, /* Philips RC5x protocol */
RC_TYPE_RC5_SZ = 5, /* StreamZap variant of RC5 */
RC_TYPE_JVC = 6, /* JVC protocol */
RC_TYPE_SONY12 = 7, /* Sony 12 bit protocol */
RC_TYPE_SONY15 = 8, /* Sony 15 bit protocol */
RC_TYPE_SONY20 = 9, /* Sony 20 bit protocol */
RC_TYPE_NEC = 10, /* NEC protocol */
RC_TYPE_SANYO = 11, /* Sanyo protocol */
RC_TYPE_MCE_KBD = 12, /* RC6-ish MCE keyboard/mouse */
RC_TYPE_RC6_0 = 13, /* Philips RC6-0-16 protocol */
RC_TYPE_RC6_6A_20 = 14, /* Philips RC6-6A-20 protocol */
RC_TYPE_RC6_6A_24 = 15, /* Philips RC6-6A-24 protocol */
RC_TYPE_RC6_6A_32 = 16, /* Philips RC6-6A-32 protocol */
RC_TYPE_RC6_MCE = 17, /* MCE (Philips RC6-6A-32 subtype) protocol */
RC_TYPE_SHARP = 18, /* Sharp protocol */
RC_TYPE_XMP = 19, /* XMP protocol */
};
#define RC_BIT_NONE 0
#define RC_BIT_UNKNOWN (1 << RC_TYPE_UNKNOWN)
#define RC_BIT_OTHER (1 << RC_TYPE_OTHER)
#define RC_BIT_LIRC (1 << RC_TYPE_LIRC)
#define RC_BIT_RC5 (1 << RC_TYPE_RC5)
#define RC_BIT_RC5X (1 << RC_TYPE_RC5X)
#define RC_BIT_RC5_SZ (1 << RC_TYPE_RC5_SZ)
#define RC_BIT_JVC (1 << RC_TYPE_JVC)
#define RC_BIT_SONY12 (1 << RC_TYPE_SONY12)
#define RC_BIT_SONY15 (1 << RC_TYPE_SONY15)
#define RC_BIT_SONY20 (1 << RC_TYPE_SONY20)
#define RC_BIT_NEC (1 << RC_TYPE_NEC)
#define RC_BIT_SANYO (1 << RC_TYPE_SANYO)
#define RC_BIT_MCE_KBD (1 << RC_TYPE_MCE_KBD)
#define RC_BIT_RC6_0 (1 << RC_TYPE_RC6_0)
#define RC_BIT_RC6_6A_20 (1 << RC_TYPE_RC6_6A_20)
#define RC_BIT_RC6_6A_24 (1 << RC_TYPE_RC6_6A_24)
#define RC_BIT_RC6_6A_32 (1 << RC_TYPE_RC6_6A_32)
#define RC_BIT_RC6_MCE (1 << RC_TYPE_RC6_MCE)
#define RC_BIT_SHARP (1 << RC_TYPE_SHARP)
#define RC_BIT_XMP (1 << RC_TYPE_XMP)
#define RC_BIT_ALL (RC_BIT_UNKNOWN | RC_BIT_OTHER | RC_BIT_LIRC | \
RC_BIT_RC5 | RC_BIT_RC5X | RC_BIT_RC5_SZ | \
RC_BIT_JVC | \
RC_BIT_SONY12 | RC_BIT_SONY15 | RC_BIT_SONY20 | \
RC_BIT_NEC | RC_BIT_SANYO | RC_BIT_MCE_KBD | \
RC_BIT_RC6_0 | RC_BIT_RC6_6A_20 | RC_BIT_RC6_6A_24 | \
RC_BIT_RC6_6A_32 | RC_BIT_RC6_MCE | RC_BIT_SHARP | \
RC_BIT_XMP)
#define RC_SCANCODE_UNKNOWN(x) (x)
#define RC_SCANCODE_OTHER(x) (x)
#define RC_SCANCODE_NEC(addr, cmd) (((addr) << 8) | (cmd))
#define RC_SCANCODE_NECX(addr, cmd) (((addr) << 8) | (cmd))
#define RC_SCANCODE_NEC32(data) ((data) & 0xffffffff)
#define RC_SCANCODE_RC5(sys, cmd) (((sys) << 8) | (cmd))
#define RC_SCANCODE_RC5_SZ(sys, cmd) (((sys) << 8) | (cmd))
#define RC_SCANCODE_RC6_0(sys, cmd) (((sys) << 8) | (cmd))
#define RC_SCANCODE_RC6_6A(vendor, sys, cmd) (((vendor) << 16) | ((sys) << 8) | (cmd))
struct rc_map_table {
u32 scancode;
u32 keycode;
};
struct rc_map {
struct rc_map_table *scan;
unsigned int size; /* Max number of entries */
unsigned int len; /* Used number of entries */
unsigned int alloc; /* Size of *scan in bytes */
enum rc_type rc_type;
const char *name;
spinlock_t lock;
};
struct rc_map_list {
struct list_head list;
struct rc_map map;
};
/* Routines from rc-map.c */
int rc_map_register(struct rc_map_list *map);
void rc_map_unregister(struct rc_map_list *map);
struct rc_map *rc_map_get(const char *name);
void rc_map_init(void);
/* Names of the several keytables defined in-kernel */
#define RC_MAP_ADSTECH_DVB_T_PCI "rc-adstech-dvb-t-pci"
#define RC_MAP_ALINK_DTU_M "rc-alink-dtu-m"
#define RC_MAP_ANYSEE "rc-anysee"
#define RC_MAP_APAC_VIEWCOMP "rc-apac-viewcomp"
#define RC_MAP_ASUS_PC39 "rc-asus-pc39"
#define RC_MAP_ASUS_PS3_100 "rc-asus-ps3-100"
#define RC_MAP_ATI_TV_WONDER_HD_600 "rc-ati-tv-wonder-hd-600"
#define RC_MAP_ATI_X10 "rc-ati-x10"
#define RC_MAP_AVERMEDIA_A16D "rc-avermedia-a16d"
#define RC_MAP_AVERMEDIA_CARDBUS "rc-avermedia-cardbus"
#define RC_MAP_AVERMEDIA_DVBT "rc-avermedia-dvbt"
#define RC_MAP_AVERMEDIA_M135A "rc-avermedia-m135a"
#define RC_MAP_AVERMEDIA_M733A_RM_K6 "rc-avermedia-m733a-rm-k6"
#define RC_MAP_AVERMEDIA_RM_KS "rc-avermedia-rm-ks"
#define RC_MAP_AVERMEDIA "rc-avermedia"
#define RC_MAP_AVERTV_303 "rc-avertv-303"
#define RC_MAP_AZUREWAVE_AD_TU700 "rc-azurewave-ad-tu700"
#define RC_MAP_BEHOLD_COLUMBUS "rc-behold-columbus"
#define RC_MAP_BEHOLD "rc-behold"
#define RC_MAP_BUDGET_CI_OLD "rc-budget-ci-old"
#define RC_MAP_CINERGY_1400 "rc-cinergy-1400"
#define RC_MAP_CINERGY "rc-cinergy"
#define RC_MAP_DELOCK_61959 "rc-delock-61959"
#define RC_MAP_DIB0700_NEC_TABLE "rc-dib0700-nec"
#define RC_MAP_DIB0700_RC5_TABLE "rc-dib0700-rc5"
#define RC_MAP_DIGITALNOW_TINYTWIN "rc-digitalnow-tinytwin"
#define RC_MAP_DIGITTRADE "rc-digittrade"
#define RC_MAP_DM1105_NEC "rc-dm1105-nec"
#define RC_MAP_DNTV_LIVE_DVBT_PRO "rc-dntv-live-dvbt-pro"
#define RC_MAP_DNTV_LIVE_DVB_T "rc-dntv-live-dvb-t"
#define RC_MAP_DVBSKY "rc-dvbsky"
#define RC_MAP_EMPTY "rc-empty"
#define RC_MAP_EM_TERRATEC "rc-em-terratec"
#define RC_MAP_ENCORE_ENLTV2 "rc-encore-enltv2"
#define RC_MAP_ENCORE_ENLTV_FM53 "rc-encore-enltv-fm53"
#define RC_MAP_ENCORE_ENLTV "rc-encore-enltv"
#define RC_MAP_EVGA_INDTUBE "rc-evga-indtube"
#define RC_MAP_EZTV "rc-eztv"
#define RC_MAP_FLYDVB "rc-flydvb"
#define RC_MAP_FLYVIDEO "rc-flyvideo"
#define RC_MAP_FUSIONHDTV_MCE "rc-fusionhdtv-mce"
#define RC_MAP_GADMEI_RM008Z "rc-gadmei-rm008z"
#define RC_MAP_GENIUS_TVGO_A11MCE "rc-genius-tvgo-a11mce"
#define RC_MAP_GOTVIEW7135 "rc-gotview7135"
#define RC_MAP_HAUPPAUGE_NEW "rc-hauppauge"
#define RC_MAP_IMON_MCE "rc-imon-mce"
#define RC_MAP_IMON_PAD "rc-imon-pad"
#define RC_MAP_IODATA_BCTV7E "rc-iodata-bctv7e"
#define RC_MAP_IT913X_V1 "rc-it913x-v1"
#define RC_MAP_IT913X_V2 "rc-it913x-v2"
#define RC_MAP_KAIOMY "rc-kaiomy"
#define RC_MAP_KWORLD_315U "rc-kworld-315u"
#define RC_MAP_KWORLD_PC150U "rc-kworld-pc150u"
#define RC_MAP_KWORLD_PLUS_TV_ANALOG "rc-kworld-plus-tv-analog"
#define RC_MAP_LEADTEK_Y04G0051 "rc-leadtek-y04g0051"
#define RC_MAP_LIRC "rc-lirc"
#define RC_MAP_LME2510 "rc-lme2510"
#define RC_MAP_MANLI "rc-manli"
#define RC_MAP_MEDION_X10 "rc-medion-x10"
#define RC_MAP_MEDION_X10_DIGITAINER "rc-medion-x10-digitainer"
#define RC_MAP_MEDION_X10_OR2X "rc-medion-x10-or2x"
#define RC_MAP_MSI_DIGIVOX_II "rc-msi-digivox-ii"
#define RC_MAP_MSI_DIGIVOX_III "rc-msi-digivox-iii"
#define RC_MAP_MSI_TVANYWHERE_PLUS "rc-msi-tvanywhere-plus"
#define RC_MAP_MSI_TVANYWHERE "rc-msi-tvanywhere"
#define RC_MAP_NEBULA "rc-nebula"
#define RC_MAP_NEC_TERRATEC_CINERGY_XS "rc-nec-terratec-cinergy-xs"
#define RC_MAP_NORWOOD "rc-norwood"
#define RC_MAP_NPGTECH "rc-npgtech"
#define RC_MAP_PCTV_SEDNA "rc-pctv-sedna"
#define RC_MAP_PINNACLE_COLOR "rc-pinnacle-color"
#define RC_MAP_PINNACLE_GREY "rc-pinnacle-grey"
#define RC_MAP_PINNACLE_PCTV_HD "rc-pinnacle-pctv-hd"
#define RC_MAP_PIXELVIEW_NEW "rc-pixelview-new"
#define RC_MAP_PIXELVIEW "rc-pixelview"
#define RC_MAP_PIXELVIEW_002T "rc-pixelview-002t"
#define RC_MAP_PIXELVIEW_MK12 "rc-pixelview-mk12"
#define RC_MAP_POWERCOLOR_REAL_ANGEL "rc-powercolor-real-angel"
#define RC_MAP_PROTEUS_2309 "rc-proteus-2309"
#define RC_MAP_PURPLETV "rc-purpletv"
#define RC_MAP_PV951 "rc-pv951"
#define RC_MAP_HAUPPAUGE "rc-hauppauge"
#define RC_MAP_RC5_TV "rc-rc5-tv"
#define RC_MAP_RC6_MCE "rc-rc6-mce"
#define RC_MAP_REAL_AUDIO_220_32_KEYS "rc-real-audio-220-32-keys"
#define RC_MAP_REDDO "rc-reddo"
#define RC_MAP_SNAPSTREAM_FIREFLY "rc-snapstream-firefly"
#define RC_MAP_STREAMZAP "rc-streamzap"
#define RC_MAP_TBS_NEC "rc-tbs-nec"
#define RC_MAP_TECHNISAT_USB2 "rc-technisat-usb2"
#define RC_MAP_TERRATEC_CINERGY_XS "rc-terratec-cinergy-xs"
#define RC_MAP_TERRATEC_SLIM "rc-terratec-slim"
#define RC_MAP_TERRATEC_SLIM_2 "rc-terratec-slim-2"
#define RC_MAP_TEVII_NEC "rc-tevii-nec"
#define RC_MAP_TIVO "rc-tivo"
#define RC_MAP_TOTAL_MEDIA_IN_HAND "rc-total-media-in-hand"
#define RC_MAP_TOTAL_MEDIA_IN_HAND_02 "rc-total-media-in-hand-02"
#define RC_MAP_TREKSTOR "rc-trekstor"
#define RC_MAP_TT_1500 "rc-tt-1500"
#define RC_MAP_TWINHAN_VP1027_DVBS "rc-twinhan1027"
#define RC_MAP_VIDEOMATE_K100 "rc-videomate-k100"
#define RC_MAP_VIDEOMATE_S350 "rc-videomate-s350"
#define RC_MAP_VIDEOMATE_TV_PVR "rc-videomate-tv-pvr"
#define RC_MAP_WINFAST "rc-winfast"
#define RC_MAP_WINFAST_USBII_DELUXE "rc-winfast-usbii-deluxe"
#define RC_MAP_SU3000 "rc-su3000"
/*
* Please, do not just append newer Remote Controller names at the end.
* The names should be ordered in alphabetical order
*/

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/*
* RJ54N1CB0C Private data
*
* Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __RJ54N1CB0C_H__
#define __RJ54N1CB0C_H__
struct rj54n1_pdata {
unsigned int mclk_freq;
bool ioctl_high;
};
#endif

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/*
* s3c24xx/s3c64xx SoC series Camera Interface (CAMIF) driver
*
* Copyright (C) 2012 Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef MEDIA_S3C_CAMIF_
#define MEDIA_S3C_CAMIF_
#include <linux/i2c.h>
#include <media/v4l2-mediabus.h>
/**
* struct s3c_camif_sensor_info - an image sensor description
* @i2c_board_info: pointer to an I2C sensor subdevice board info
* @clock_frequency: frequency of the clock the host provides to a sensor
* @mbus_type: media bus type
* @i2c_bus_num: i2c control bus id the sensor is attached to
* @flags: the parallel bus flags defining signals polarity (V4L2_MBUS_*)
* @use_field: 1 if parallel bus FIELD signal is used (only s3c64xx)
*/
struct s3c_camif_sensor_info {
struct i2c_board_info i2c_board_info;
unsigned long clock_frequency;
enum v4l2_mbus_type mbus_type;
u16 i2c_bus_num;
u16 flags;
u8 use_field;
};
struct s3c_camif_plat_data {
struct s3c_camif_sensor_info sensor;
int (*gpio_get)(void);
int (*gpio_put)(void);
};
/* Platform default helper functions */
int s3c_camif_gpio_get(void);
int s3c_camif_gpio_put(void);
#endif /* MEDIA_S3C_CAMIF_ */

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/*
* Samsung LSI S5C73M3 8M pixel camera driver
*
* Copyright (C) 2012, Samsung Electronics, Co., Ltd.
* Sylwester Nawrocki <s.nawrocki@samsung.com>
* Andrzej Hajda <a.hajda@samsung.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef MEDIA_S5C73M3__
#define MEDIA_S5C73M3__
#include <linux/videodev2.h>
#include <media/v4l2-mediabus.h>
/**
* struct s5c73m3_gpio - data structure describing a GPIO
* @gpio: GPIO number
* @level: indicates active state of the @gpio
*/
struct s5c73m3_gpio {
int gpio;
int level;
};
/**
* struct s5c73m3_platform_data - s5c73m3 driver platform data
* @mclk_frequency: sensor's master clock frequency in Hz
* @gpio_reset: GPIO driving RESET pin
* @gpio_stby: GPIO driving STBY pin
* @nlanes: maximum number of MIPI-CSI lanes used
* @horiz_flip: default horizontal image flip value, non zero to enable
* @vert_flip: default vertical image flip value, non zero to enable
*/
struct s5c73m3_platform_data {
unsigned long mclk_frequency;
struct s5c73m3_gpio gpio_reset;
struct s5c73m3_gpio gpio_stby;
enum v4l2_mbus_type bus_type;
u8 nlanes;
u8 horiz_flip;
u8 vert_flip;
};
#endif /* MEDIA_S5C73M3__ */

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/*
* S5K4ECGX image sensor header file
*
* Copyright (C) 2012, Linaro
* Copyright (C) 2012, Samsung Electronics Co., Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef S5K4ECGX_H
#define S5K4ECGX_H
/**
* struct s5k4ecgx_gpio - data structure describing a GPIO
* @gpio : GPIO number
* @level: indicates active state of the @gpio
*/
struct s5k4ecgx_gpio {
int gpio;
int level;
};
/**
* struct ss5k4ecgx_platform_data- s5k4ecgx driver platform data
* @gpio_reset: GPIO driving RESET pin
* @gpio_stby : GPIO driving STBY pin
*/
struct s5k4ecgx_platform_data {
struct s5k4ecgx_gpio gpio_reset;
struct s5k4ecgx_gpio gpio_stby;
};
#endif /* S5K4ECGX_H */

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/*
* S5K6AAFX camera sensor driver header
*
* Copyright (C) 2011 Samsung Electronics Co., Ltd.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef S5K6AA_H
#define S5K6AA_H
#include <media/v4l2-mediabus.h>
/**
* struct s5k6aa_gpio - data structure describing a GPIO
* @gpio: GPIO number
* @level: indicates active state of the @gpio
*/
struct s5k6aa_gpio {
int gpio;
int level;
};
/**
* struct s5k6aa_platform_data - s5k6aa driver platform data
* @set_power: an additional callback to the board code, called
* after enabling the regulators and before switching
* the sensor off
* @mclk_frequency: sensor's master clock frequency in Hz
* @gpio_reset: GPIO driving RESET pin
* @gpio_stby: GPIO driving STBY pin
* @nlanes: maximum number of MIPI-CSI lanes used
* @horiz_flip: default horizontal image flip value, non zero to enable
* @vert_flip: default vertical image flip value, non zero to enable
*/
struct s5k6aa_platform_data {
int (*set_power)(int enable);
unsigned long mclk_frequency;
struct s5k6aa_gpio gpio_reset;
struct s5k6aa_gpio gpio_stby;
enum v4l2_mbus_type bus_type;
u8 nlanes;
u8 horiz_flip;
u8 vert_flip;
};
#endif /* S5K6AA_H */

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/*
* Driver header for S5P HDMI chip.
*
* Copyright (c) 2011 Samsung Electronics, Co. Ltd
* Contact: Tomasz Stanislawski <t.stanislaws@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef S5P_HDMI_H
#define S5P_HDMI_H
struct i2c_board_info;
/**
* @hdmiphy_bus: controller id for HDMIPHY bus
* @hdmiphy_info: template for HDMIPHY I2C device
* @mhl_bus: controller id for MHL control bus
* @mhl_info: template for MHL I2C device
* @hpd_gpio: GPIO for Hot-Plug-Detect pin
*
* NULL pointer for *_info fields indicates that
* the corresponding chip is not present
*/
struct s5p_hdmi_platform_data {
int hdmiphy_bus;
struct i2c_board_info *hdmiphy_info;
int mhl_bus;
struct i2c_board_info *mhl_info;
int hpd_gpio;
};
#endif /* S5P_HDMI_H */

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/*
Types and defines needed for RDS. This is included by
saa6588.c and every driver (e.g. bttv-driver.c) that wants
to use the saa6588 module.
(c) 2005 by Hans J. Koch
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _SAA6588_H
#define _SAA6588_H
struct saa6588_command {
unsigned int block_count;
bool nonblocking;
int result;
unsigned char __user *buffer;
struct file *instance;
poll_table *event_list;
};
/* These ioctls are internal to the kernel */
#define SAA6588_CMD_CLOSE _IOW('R', 2, int)
#define SAA6588_CMD_READ _IOR('R', 3, int)
#define SAA6588_CMD_POLL _IOR('R', 4, int)
#endif

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/*
saa7115.h - definition for saa7111/3/4/5 inputs and frequency flags
Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _SAA7115_H_
#define _SAA7115_H_
/* s_routing inputs, outputs, and config */
/* SAA7111/3/4/5 HW inputs */
#define SAA7115_COMPOSITE0 0
#define SAA7115_COMPOSITE1 1
#define SAA7115_COMPOSITE2 2
#define SAA7115_COMPOSITE3 3
#define SAA7115_COMPOSITE4 4 /* not available for the saa7111/3 */
#define SAA7115_COMPOSITE5 5 /* not available for the saa7111/3 */
#define SAA7115_SVIDEO0 6
#define SAA7115_SVIDEO1 7
#define SAA7115_SVIDEO2 8
#define SAA7115_SVIDEO3 9
/* outputs */
#define SAA7115_IPORT_ON 1
#define SAA7115_IPORT_OFF 0
/* SAA7111 specific outputs. */
#define SAA7111_VBI_BYPASS 2
#define SAA7111_FMT_YUV422 0x00
#define SAA7111_FMT_RGB 0x40
#define SAA7111_FMT_CCIR 0x80
#define SAA7111_FMT_YUV411 0xc0
/* config flags */
/*
* Register 0x85 should set bit 0 to 0 (it's 1 by default). This bit
* controls the IDQ signal polarity which is set to 'inverted' if the bit
* it 1 and to 'default' if it is 0.
*/
#define SAA7115_IDQ_IS_DEFAULT (1 << 0)
/* s_crystal_freq values and flags */
/* SAA7115 v4l2_crystal_freq frequency values */
#define SAA7115_FREQ_32_11_MHZ 32110000 /* 32.11 MHz crystal, SAA7114/5 only */
#define SAA7115_FREQ_24_576_MHZ 24576000 /* 24.576 MHz crystal */
/* SAA7115 v4l2_crystal_freq audio clock control flags */
#define SAA7115_FREQ_FL_UCGC (1 << 0) /* SA 3A[7], UCGC, SAA7115 only */
#define SAA7115_FREQ_FL_CGCDIV (1 << 1) /* SA 3A[6], CGCDIV, SAA7115 only */
#define SAA7115_FREQ_FL_APLL (1 << 2) /* SA 3A[3], APLL, SAA7114/5 only */
#define SAA7115_FREQ_FL_DOUBLE_ASCLK (1 << 3) /* SA 39, LRDIV, SAA7114/5 only */
/* ===== SAA7113 Config enums ===== */
/* Register 0x08 "Horizontal time constant" [Bit 3..4]:
* Should be set to "Fast Locking Mode" according to the datasheet,
* and that is the default setting in the gm7113c_init table.
* saa7113_init sets this value to "VTR Mode". */
enum saa7113_r08_htc {
SAA7113_HTC_TV_MODE = 0x00,
SAA7113_HTC_VTR_MODE, /* Default for saa7113_init */
SAA7113_HTC_FAST_LOCKING_MODE = 0x03 /* Default for gm7113c_init */
};
/* Register 0x10 "Output format selection" [Bit 6..7]:
* Defaults to ITU_656 as specified in datasheet. */
enum saa7113_r10_ofts {
SAA7113_OFTS_ITU_656 = 0x0, /* Default */
SAA7113_OFTS_VFLAG_BY_VREF,
SAA7113_OFTS_VFLAG_BY_DATA_TYPE
};
/*
* Register 0x12 "Output control" [Bit 0..3 Or Bit 4..7]:
* This is used to select what data is output on the RTS0 and RTS1 pins.
* RTS1 [Bit 4..7] Defaults to DOT_IN. (This value can not be set for RTS0)
* RTS0 [Bit 0..3] Defaults to VIPB in gm7113c_init as specified
* in the datasheet, but is set to HREF_HS in the saa7113_init table.
*/
enum saa7113_r12_rts {
SAA7113_RTS_DOT_IN = 0, /* OBS: Only for RTS1 (Default RTS1) */
SAA7113_RTS_VIPB, /* Default RTS0 For gm7113c_init */
SAA7113_RTS_GPSW,
SAA7115_RTS_HL,
SAA7113_RTS_VL,
SAA7113_RTS_DL,
SAA7113_RTS_PLIN,
SAA7113_RTS_HREF_HS, /* Default RTS0 For saa7113_init */
SAA7113_RTS_HS,
SAA7113_RTS_HQ,
SAA7113_RTS_ODD,
SAA7113_RTS_VS,
SAA7113_RTS_V123,
SAA7113_RTS_VGATE,
SAA7113_RTS_VREF,
SAA7113_RTS_FID
};
/**
* struct saa7115_platform_data - Allow overriding default initialization
*
* @saa7113_force_gm7113c_init: Force the use of the gm7113c_init table
* instead of saa7113_init table
* (saa7113 only)
* @saa7113_r08_htc: [R_08 - Bit 3..4]
* @saa7113_r10_vrln: [R_10 - Bit 3]
* default: Disabled for gm7113c_init
* Enabled for saa7113c_init
* @saa7113_r10_ofts: [R_10 - Bit 6..7]
* @saa7113_r12_rts0: [R_12 - Bit 0..3]
* @saa7113_r12_rts1: [R_12 - Bit 4..7]
* @saa7113_r13_adlsb: [R_13 - Bit 7] - default: disabled
*/
struct saa7115_platform_data {
bool saa7113_force_gm7113c_init;
enum saa7113_r08_htc *saa7113_r08_htc;
bool *saa7113_r10_vrln;
enum saa7113_r10_ofts *saa7113_r10_ofts;
enum saa7113_r12_rts *saa7113_r12_rts0;
enum saa7113_r12_rts *saa7113_r12_rts1;
bool *saa7113_r13_adlsb;
};
#endif

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/*
saa7127.h - definition for saa7126/7/8/9 inputs/outputs
Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _SAA7127_H_
#define _SAA7127_H_
/* Enumeration for the supported input types */
enum saa7127_input_type {
SAA7127_INPUT_TYPE_NORMAL,
SAA7127_INPUT_TYPE_TEST_IMAGE
};
/* Enumeration for the supported output signal types */
enum saa7127_output_type {
SAA7127_OUTPUT_TYPE_BOTH,
SAA7127_OUTPUT_TYPE_COMPOSITE,
SAA7127_OUTPUT_TYPE_SVIDEO,
SAA7127_OUTPUT_TYPE_RGB,
SAA7127_OUTPUT_TYPE_YUV_C,
SAA7127_OUTPUT_TYPE_YUV_V
};
#endif

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#ifndef __SAA7146__
#define __SAA7146__
#include <linux/delay.h> /* for delay-stuff */
#include <linux/slab.h> /* for kmalloc/kfree */
#include <linux/pci.h> /* for pci-config-stuff, vendor ids etc. */
#include <linux/init.h> /* for "__init" */
#include <linux/interrupt.h> /* for IMMEDIATE_BH */
#include <linux/kmod.h> /* for kernel module loader */
#include <linux/i2c.h> /* for i2c subsystem */
#include <asm/io.h> /* for accessing devices */
#include <linux/stringify.h>
#include <linux/mutex.h>
#include <linux/scatterlist.h>
#include <media/v4l2-device.h>
#include <media/v4l2-ctrls.h>
#include <linux/vmalloc.h> /* for vmalloc() */
#include <linux/mm.h> /* for vmalloc_to_page() */
#define saa7146_write(sxy,adr,dat) writel((dat),(sxy->mem+(adr)))
#define saa7146_read(sxy,adr) readl(sxy->mem+(adr))
extern unsigned int saa7146_debug;
#ifndef DEBUG_VARIABLE
#define DEBUG_VARIABLE saa7146_debug
#endif
#define ERR(fmt, ...) pr_err("%s: " fmt, __func__, ##__VA_ARGS__)
#define _DBG(mask, fmt, ...) \
do { \
if (DEBUG_VARIABLE & mask) \
pr_debug("%s(): " fmt, __func__, ##__VA_ARGS__); \
} while (0)
/* simple debug messages */
#define DEB_S(fmt, ...) _DBG(0x01, fmt, ##__VA_ARGS__)
/* more detailed debug messages */
#define DEB_D(fmt, ...) _DBG(0x02, fmt, ##__VA_ARGS__)
/* print enter and exit of functions */
#define DEB_EE(fmt, ...) _DBG(0x04, fmt, ##__VA_ARGS__)
/* i2c debug messages */
#define DEB_I2C(fmt, ...) _DBG(0x08, fmt, ##__VA_ARGS__)
/* vbi debug messages */
#define DEB_VBI(fmt, ...) _DBG(0x10, fmt, ##__VA_ARGS__)
/* interrupt debug messages */
#define DEB_INT(fmt, ...) _DBG(0x20, fmt, ##__VA_ARGS__)
/* capture debug messages */
#define DEB_CAP(fmt, ...) _DBG(0x40, fmt, ##__VA_ARGS__)
#define SAA7146_ISR_CLEAR(x,y) \
saa7146_write(x, ISR, (y));
struct module;
struct saa7146_dev;
struct saa7146_extension;
struct saa7146_vv;
/* saa7146 page table */
struct saa7146_pgtable {
unsigned int size;
__le32 *cpu;
dma_addr_t dma;
/* used for offsets for u,v planes for planar capture modes */
unsigned long offset;
/* used for custom pagetables (used for example by budget dvb cards) */
struct scatterlist *slist;
int nents;
};
struct saa7146_pci_extension_data {
struct saa7146_extension *ext;
void *ext_priv; /* most likely a name string */
};
#define MAKE_EXTENSION_PCI(x_var, x_vendor, x_device) \
{ \
.vendor = PCI_VENDOR_ID_PHILIPS, \
.device = PCI_DEVICE_ID_PHILIPS_SAA7146, \
.subvendor = x_vendor, \
.subdevice = x_device, \
.driver_data = (unsigned long)& x_var, \
}
struct saa7146_extension
{
char name[32]; /* name of the device */
#define SAA7146_USE_I2C_IRQ 0x1
#define SAA7146_I2C_SHORT_DELAY 0x2
int flags;
/* pairs of subvendor and subdevice ids for
supported devices, last entry 0xffff, 0xfff */
struct module *module;
struct pci_driver driver;
struct pci_device_id *pci_tbl;
/* extension functions */
int (*probe)(struct saa7146_dev *);
int (*attach)(struct saa7146_dev *, struct saa7146_pci_extension_data *);
int (*detach)(struct saa7146_dev*);
u32 irq_mask; /* mask to indicate, which irq-events are handled by the extension */
void (*irq_func)(struct saa7146_dev*, u32* irq_mask);
};
struct saa7146_dma
{
dma_addr_t dma_handle;
__le32 *cpu_addr;
};
struct saa7146_dev
{
struct module *module;
struct v4l2_device v4l2_dev;
struct v4l2_ctrl_handler ctrl_handler;
/* different device locks */
spinlock_t slock;
struct mutex v4l2_lock;
unsigned char __iomem *mem; /* pointer to mapped IO memory */
u32 revision; /* chip revision; needed for bug-workarounds*/
/* pci-device & irq stuff*/
char name[32];
struct pci_dev *pci;
u32 int_todo;
spinlock_t int_slock;
/* extension handling */
struct saa7146_extension *ext; /* indicates if handled by extension */
void *ext_priv; /* pointer for extension private use (most likely some private data) */
struct saa7146_ext_vv *ext_vv_data;
/* per device video/vbi informations (if available) */
struct saa7146_vv *vv_data;
void (*vv_callback)(struct saa7146_dev *dev, unsigned long status);
/* i2c-stuff */
struct mutex i2c_lock;
u32 i2c_bitrate;
struct saa7146_dma d_i2c; /* pointer to i2c memory */
wait_queue_head_t i2c_wq;
int i2c_op;
/* memories */
struct saa7146_dma d_rps0;
struct saa7146_dma d_rps1;
};
static inline struct saa7146_dev *to_saa7146_dev(struct v4l2_device *v4l2_dev)
{
return container_of(v4l2_dev, struct saa7146_dev, v4l2_dev);
}
/* from saa7146_i2c.c */
int saa7146_i2c_adapter_prepare(struct saa7146_dev *dev, struct i2c_adapter *i2c_adapter, u32 bitrate);
/* from saa7146_core.c */
int saa7146_register_extension(struct saa7146_extension*);
int saa7146_unregister_extension(struct saa7146_extension*);
struct saa7146_format* saa7146_format_by_fourcc(struct saa7146_dev *dev, int fourcc);
int saa7146_pgtable_alloc(struct pci_dev *pci, struct saa7146_pgtable *pt);
void saa7146_pgtable_free(struct pci_dev *pci, struct saa7146_pgtable *pt);
int saa7146_pgtable_build_single(struct pci_dev *pci, struct saa7146_pgtable *pt, struct scatterlist *list, int length );
void *saa7146_vmalloc_build_pgtable(struct pci_dev *pci, long length, struct saa7146_pgtable *pt);
void saa7146_vfree_destroy_pgtable(struct pci_dev *pci, void *mem, struct saa7146_pgtable *pt);
void saa7146_setgpio(struct saa7146_dev *dev, int port, u32 data);
int saa7146_wait_for_debi_done(struct saa7146_dev *dev, int nobusyloop);
/* some memory sizes */
#define SAA7146_I2C_MEM ( 1*PAGE_SIZE)
#define SAA7146_RPS_MEM ( 1*PAGE_SIZE)
/* some i2c constants */
#define SAA7146_I2C_TIMEOUT 100 /* i2c-timeout-value in ms */
#define SAA7146_I2C_RETRIES 3 /* how many times shall we retry an i2c-operation? */
#define SAA7146_I2C_DELAY 5 /* time we wait after certain i2c-operations */
/* unsorted defines */
#define ME1 0x0000000800
#define PV1 0x0000000008
/* gpio defines */
#define SAA7146_GPIO_INPUT 0x00
#define SAA7146_GPIO_IRQHI 0x10
#define SAA7146_GPIO_IRQLO 0x20
#define SAA7146_GPIO_IRQHL 0x30
#define SAA7146_GPIO_OUTLO 0x40
#define SAA7146_GPIO_OUTHI 0x50
/* debi defines */
#define DEBINOSWAP 0x000e0000
/* define for the register programming sequencer (rps) */
#define CMD_NOP 0x00000000 /* No operation */
#define CMD_CLR_EVENT 0x00000000 /* Clear event */
#define CMD_SET_EVENT 0x10000000 /* Set signal event */
#define CMD_PAUSE 0x20000000 /* Pause */
#define CMD_CHECK_LATE 0x30000000 /* Check late */
#define CMD_UPLOAD 0x40000000 /* Upload */
#define CMD_STOP 0x50000000 /* Stop */
#define CMD_INTERRUPT 0x60000000 /* Interrupt */
#define CMD_JUMP 0x80000000 /* Jump */
#define CMD_WR_REG 0x90000000 /* Write (load) register */
#define CMD_RD_REG 0xa0000000 /* Read (store) register */
#define CMD_WR_REG_MASK 0xc0000000 /* Write register with mask */
#define CMD_OAN MASK_27
#define CMD_INV MASK_26
#define CMD_SIG4 MASK_25
#define CMD_SIG3 MASK_24
#define CMD_SIG2 MASK_23
#define CMD_SIG1 MASK_22
#define CMD_SIG0 MASK_21
#define CMD_O_FID_B MASK_14
#define CMD_E_FID_B MASK_13
#define CMD_O_FID_A MASK_12
#define CMD_E_FID_A MASK_11
/* some events and command modifiers for rps1 squarewave generator */
#define EVT_HS (1<<15) // Source Line Threshold reached
#define EVT_VBI_B (1<<9) // VSYNC Event
#define RPS_OAN (1<<27) // 1: OR events, 0: AND events
#define RPS_INV (1<<26) // Invert (compound) event
#define GPIO3_MSK 0xFF000000 // GPIO #3 control bits
/* Bit mask constants */
#define MASK_00 0x00000001 /* Mask value for bit 0 */
#define MASK_01 0x00000002 /* Mask value for bit 1 */
#define MASK_02 0x00000004 /* Mask value for bit 2 */
#define MASK_03 0x00000008 /* Mask value for bit 3 */
#define MASK_04 0x00000010 /* Mask value for bit 4 */
#define MASK_05 0x00000020 /* Mask value for bit 5 */
#define MASK_06 0x00000040 /* Mask value for bit 6 */
#define MASK_07 0x00000080 /* Mask value for bit 7 */
#define MASK_08 0x00000100 /* Mask value for bit 8 */
#define MASK_09 0x00000200 /* Mask value for bit 9 */
#define MASK_10 0x00000400 /* Mask value for bit 10 */
#define MASK_11 0x00000800 /* Mask value for bit 11 */
#define MASK_12 0x00001000 /* Mask value for bit 12 */
#define MASK_13 0x00002000 /* Mask value for bit 13 */
#define MASK_14 0x00004000 /* Mask value for bit 14 */
#define MASK_15 0x00008000 /* Mask value for bit 15 */
#define MASK_16 0x00010000 /* Mask value for bit 16 */
#define MASK_17 0x00020000 /* Mask value for bit 17 */
#define MASK_18 0x00040000 /* Mask value for bit 18 */
#define MASK_19 0x00080000 /* Mask value for bit 19 */
#define MASK_20 0x00100000 /* Mask value for bit 20 */
#define MASK_21 0x00200000 /* Mask value for bit 21 */
#define MASK_22 0x00400000 /* Mask value for bit 22 */
#define MASK_23 0x00800000 /* Mask value for bit 23 */
#define MASK_24 0x01000000 /* Mask value for bit 24 */
#define MASK_25 0x02000000 /* Mask value for bit 25 */
#define MASK_26 0x04000000 /* Mask value for bit 26 */
#define MASK_27 0x08000000 /* Mask value for bit 27 */
#define MASK_28 0x10000000 /* Mask value for bit 28 */
#define MASK_29 0x20000000 /* Mask value for bit 29 */
#define MASK_30 0x40000000 /* Mask value for bit 30 */
#define MASK_31 0x80000000 /* Mask value for bit 31 */
#define MASK_B0 0x000000ff /* Mask value for byte 0 */
#define MASK_B1 0x0000ff00 /* Mask value for byte 1 */
#define MASK_B2 0x00ff0000 /* Mask value for byte 2 */
#define MASK_B3 0xff000000 /* Mask value for byte 3 */
#define MASK_W0 0x0000ffff /* Mask value for word 0 */
#define MASK_W1 0xffff0000 /* Mask value for word 1 */
#define MASK_PA 0xfffffffc /* Mask value for physical address */
#define MASK_PR 0xfffffffe /* Mask value for protection register */
#define MASK_ER 0xffffffff /* Mask value for the entire register */
#define MASK_NONE 0x00000000 /* No mask */
/* register aliases */
#define BASE_ODD1 0x00 /* Video DMA 1 registers */
#define BASE_EVEN1 0x04
#define PROT_ADDR1 0x08
#define PITCH1 0x0C
#define BASE_PAGE1 0x10 /* Video DMA 1 base page */
#define NUM_LINE_BYTE1 0x14
#define BASE_ODD2 0x18 /* Video DMA 2 registers */
#define BASE_EVEN2 0x1C
#define PROT_ADDR2 0x20
#define PITCH2 0x24
#define BASE_PAGE2 0x28 /* Video DMA 2 base page */
#define NUM_LINE_BYTE2 0x2C
#define BASE_ODD3 0x30 /* Video DMA 3 registers */
#define BASE_EVEN3 0x34
#define PROT_ADDR3 0x38
#define PITCH3 0x3C
#define BASE_PAGE3 0x40 /* Video DMA 3 base page */
#define NUM_LINE_BYTE3 0x44
#define PCI_BT_V1 0x48 /* Video/FIFO 1 */
#define PCI_BT_V2 0x49 /* Video/FIFO 2 */
#define PCI_BT_V3 0x4A /* Video/FIFO 3 */
#define PCI_BT_DEBI 0x4B /* DEBI */
#define PCI_BT_A 0x4C /* Audio */
#define DD1_INIT 0x50 /* Init setting of DD1 interface */
#define DD1_STREAM_B 0x54 /* DD1 B video data stream handling */
#define DD1_STREAM_A 0x56 /* DD1 A video data stream handling */
#define BRS_CTRL 0x58 /* BRS control register */
#define HPS_CTRL 0x5C /* HPS control register */
#define HPS_V_SCALE 0x60 /* HPS vertical scale */
#define HPS_V_GAIN 0x64 /* HPS vertical ACL and gain */
#define HPS_H_PRESCALE 0x68 /* HPS horizontal prescale */
#define HPS_H_SCALE 0x6C /* HPS horizontal scale */
#define BCS_CTRL 0x70 /* BCS control */
#define CHROMA_KEY_RANGE 0x74
#define CLIP_FORMAT_CTRL 0x78 /* HPS outputs formats & clipping */
#define DEBI_CONFIG 0x7C
#define DEBI_COMMAND 0x80
#define DEBI_PAGE 0x84
#define DEBI_AD 0x88
#define I2C_TRANSFER 0x8C
#define I2C_STATUS 0x90
#define BASE_A1_IN 0x94 /* Audio 1 input DMA */
#define PROT_A1_IN 0x98
#define PAGE_A1_IN 0x9C
#define BASE_A1_OUT 0xA0 /* Audio 1 output DMA */
#define PROT_A1_OUT 0xA4
#define PAGE_A1_OUT 0xA8
#define BASE_A2_IN 0xAC /* Audio 2 input DMA */
#define PROT_A2_IN 0xB0
#define PAGE_A2_IN 0xB4
#define BASE_A2_OUT 0xB8 /* Audio 2 output DMA */
#define PROT_A2_OUT 0xBC
#define PAGE_A2_OUT 0xC0
#define RPS_PAGE0 0xC4 /* RPS task 0 page register */
#define RPS_PAGE1 0xC8 /* RPS task 1 page register */
#define RPS_THRESH0 0xCC /* HBI threshold for task 0 */
#define RPS_THRESH1 0xD0 /* HBI threshold for task 1 */
#define RPS_TOV0 0xD4 /* RPS timeout for task 0 */
#define RPS_TOV1 0xD8 /* RPS timeout for task 1 */
#define IER 0xDC /* Interrupt enable register */
#define GPIO_CTRL 0xE0 /* GPIO 0-3 register */
#define EC1SSR 0xE4 /* Event cnt set 1 source select */
#define EC2SSR 0xE8 /* Event cnt set 2 source select */
#define ECT1R 0xEC /* Event cnt set 1 thresholds */
#define ECT2R 0xF0 /* Event cnt set 2 thresholds */
#define ACON1 0xF4
#define ACON2 0xF8
#define MC1 0xFC /* Main control register 1 */
#define MC2 0x100 /* Main control register 2 */
#define RPS_ADDR0 0x104 /* RPS task 0 address register */
#define RPS_ADDR1 0x108 /* RPS task 1 address register */
#define ISR 0x10C /* Interrupt status register */
#define PSR 0x110 /* Primary status register */
#define SSR 0x114 /* Secondary status register */
#define EC1R 0x118 /* Event counter set 1 register */
#define EC2R 0x11C /* Event counter set 2 register */
#define PCI_VDP1 0x120 /* Video DMA pointer of FIFO 1 */
#define PCI_VDP2 0x124 /* Video DMA pointer of FIFO 2 */
#define PCI_VDP3 0x128 /* Video DMA pointer of FIFO 3 */
#define PCI_ADP1 0x12C /* Audio DMA pointer of audio out 1 */
#define PCI_ADP2 0x130 /* Audio DMA pointer of audio in 1 */
#define PCI_ADP3 0x134 /* Audio DMA pointer of audio out 2 */
#define PCI_ADP4 0x138 /* Audio DMA pointer of audio in 2 */
#define PCI_DMA_DDP 0x13C /* DEBI DMA pointer */
#define LEVEL_REP 0x140,
#define A_TIME_SLOT1 0x180, /* from 180 - 1BC */
#define A_TIME_SLOT2 0x1C0, /* from 1C0 - 1FC */
/* isr masks */
#define SPCI_PPEF 0x80000000 /* PCI parity error */
#define SPCI_PABO 0x40000000 /* PCI access error (target or master abort) */
#define SPCI_PPED 0x20000000 /* PCI parity error on 'real time data' */
#define SPCI_RPS_I1 0x10000000 /* Interrupt issued by RPS1 */
#define SPCI_RPS_I0 0x08000000 /* Interrupt issued by RPS0 */
#define SPCI_RPS_LATE1 0x04000000 /* RPS task 1 is late */
#define SPCI_RPS_LATE0 0x02000000 /* RPS task 0 is late */
#define SPCI_RPS_E1 0x01000000 /* RPS error from task 1 */
#define SPCI_RPS_E0 0x00800000 /* RPS error from task 0 */
#define SPCI_RPS_TO1 0x00400000 /* RPS timeout task 1 */
#define SPCI_RPS_TO0 0x00200000 /* RPS timeout task 0 */
#define SPCI_UPLD 0x00100000 /* RPS in upload */
#define SPCI_DEBI_S 0x00080000 /* DEBI status */
#define SPCI_DEBI_E 0x00040000 /* DEBI error */
#define SPCI_IIC_S 0x00020000 /* I2C status */
#define SPCI_IIC_E 0x00010000 /* I2C error */
#define SPCI_A2_IN 0x00008000 /* Audio 2 input DMA protection / limit */
#define SPCI_A2_OUT 0x00004000 /* Audio 2 output DMA protection / limit */
#define SPCI_A1_IN 0x00002000 /* Audio 1 input DMA protection / limit */
#define SPCI_A1_OUT 0x00001000 /* Audio 1 output DMA protection / limit */
#define SPCI_AFOU 0x00000800 /* Audio FIFO over- / underflow */
#define SPCI_V_PE 0x00000400 /* Video protection address */
#define SPCI_VFOU 0x00000200 /* Video FIFO over- / underflow */
#define SPCI_FIDA 0x00000100 /* Field ID video port A */
#define SPCI_FIDB 0x00000080 /* Field ID video port B */
#define SPCI_PIN3 0x00000040 /* GPIO pin 3 */
#define SPCI_PIN2 0x00000020 /* GPIO pin 2 */
#define SPCI_PIN1 0x00000010 /* GPIO pin 1 */
#define SPCI_PIN0 0x00000008 /* GPIO pin 0 */
#define SPCI_ECS 0x00000004 /* Event counter 1, 2, 4, 5 */
#define SPCI_EC3S 0x00000002 /* Event counter 3 */
#define SPCI_EC0S 0x00000001 /* Event counter 0 */
/* i2c */
#define SAA7146_I2C_ABORT (1<<7)
#define SAA7146_I2C_SPERR (1<<6)
#define SAA7146_I2C_APERR (1<<5)
#define SAA7146_I2C_DTERR (1<<4)
#define SAA7146_I2C_DRERR (1<<3)
#define SAA7146_I2C_AL (1<<2)
#define SAA7146_I2C_ERR (1<<1)
#define SAA7146_I2C_BUSY (1<<0)
#define SAA7146_I2C_START (0x3)
#define SAA7146_I2C_CONT (0x2)
#define SAA7146_I2C_STOP (0x1)
#define SAA7146_I2C_NOP (0x0)
#define SAA7146_I2C_BUS_BIT_RATE_6400 (0x500)
#define SAA7146_I2C_BUS_BIT_RATE_3200 (0x100)
#define SAA7146_I2C_BUS_BIT_RATE_480 (0x400)
#define SAA7146_I2C_BUS_BIT_RATE_320 (0x600)
#define SAA7146_I2C_BUS_BIT_RATE_240 (0x700)
#define SAA7146_I2C_BUS_BIT_RATE_120 (0x000)
#define SAA7146_I2C_BUS_BIT_RATE_80 (0x200)
#define SAA7146_I2C_BUS_BIT_RATE_60 (0x300)
static inline void SAA7146_IER_DISABLE(struct saa7146_dev *x, unsigned y)
{
unsigned long flags;
spin_lock_irqsave(&x->int_slock, flags);
saa7146_write(x, IER, saa7146_read(x, IER) & ~y);
spin_unlock_irqrestore(&x->int_slock, flags);
}
static inline void SAA7146_IER_ENABLE(struct saa7146_dev *x, unsigned y)
{
unsigned long flags;
spin_lock_irqsave(&x->int_slock, flags);
saa7146_write(x, IER, saa7146_read(x, IER) | y);
spin_unlock_irqrestore(&x->int_slock, flags);
}
#endif

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#ifndef __SAA7146_VV__
#define __SAA7146_VV__
#include <media/v4l2-common.h>
#include <media/v4l2-ioctl.h>
#include <media/v4l2-fh.h>
#include <media/saa7146.h>
#include <media/videobuf-dma-sg.h>
#define MAX_SAA7146_CAPTURE_BUFFERS 32 /* arbitrary */
#define BUFFER_TIMEOUT (HZ/2) /* 0.5 seconds */
#define WRITE_RPS0(x) do { \
dev->d_rps0.cpu_addr[ count++ ] = cpu_to_le32(x); \
} while (0);
#define WRITE_RPS1(x) do { \
dev->d_rps1.cpu_addr[ count++ ] = cpu_to_le32(x); \
} while (0);
struct saa7146_video_dma {
u32 base_odd;
u32 base_even;
u32 prot_addr;
u32 pitch;
u32 base_page;
u32 num_line_byte;
};
#define FORMAT_BYTE_SWAP 0x1
#define FORMAT_IS_PLANAR 0x2
struct saa7146_format {
char *name;
u32 pixelformat;
u32 trans;
u8 depth;
u8 flags;
u8 swap;
};
struct saa7146_standard
{
char *name;
v4l2_std_id id;
int v_offset; /* number of lines of vertical offset before processing */
int v_field; /* number of lines in a field for HPS to process */
int h_offset; /* horizontal offset of processing window */
int h_pixels; /* number of horizontal pixels to process */
int v_max_out;
int h_max_out;
};
/* buffer for one video/vbi frame */
struct saa7146_buf {
/* common v4l buffer stuff -- must be first */
struct videobuf_buffer vb;
/* saa7146 specific */
struct v4l2_pix_format *fmt;
int (*activate)(struct saa7146_dev *dev,
struct saa7146_buf *buf,
struct saa7146_buf *next);
/* page tables */
struct saa7146_pgtable pt[3];
};
struct saa7146_dmaqueue {
struct saa7146_dev *dev;
struct saa7146_buf *curr;
struct list_head queue;
struct timer_list timeout;
};
struct saa7146_overlay {
struct saa7146_fh *fh;
struct v4l2_window win;
struct v4l2_clip clips[16];
int nclips;
};
/* per open data */
struct saa7146_fh {
/* Must be the first field! */
struct v4l2_fh fh;
struct saa7146_dev *dev;
/* video capture */
struct videobuf_queue video_q;
/* vbi capture */
struct videobuf_queue vbi_q;
unsigned int resources; /* resource management for device open */
};
#define STATUS_OVERLAY 0x01
#define STATUS_CAPTURE 0x02
struct saa7146_vv
{
/* vbi capture */
struct saa7146_dmaqueue vbi_dmaq;
struct v4l2_vbi_format vbi_fmt;
struct timer_list vbi_read_timeout;
/* vbi workaround interrupt queue */
wait_queue_head_t vbi_wq;
int vbi_fieldcount;
struct saa7146_fh *vbi_streaming;
int video_status;
struct saa7146_fh *video_fh;
/* video overlay */
struct saa7146_overlay ov;
struct v4l2_framebuffer ov_fb;
struct saa7146_format *ov_fmt;
struct saa7146_fh *ov_suspend;
/* video capture */
struct saa7146_dmaqueue video_dmaq;
struct v4l2_pix_format video_fmt;
enum v4l2_field last_field;
/* common: fixme? shouldn't this be in saa7146_fh?
(this leads to a more complicated question: shall the driver
store the different settings (for example S_INPUT) for every open
and restore it appropriately, or should all settings be common for
all opens? currently, we do the latter, like all other
drivers do... */
struct saa7146_standard *standard;
int vflip;
int hflip;
int current_hps_source;
int current_hps_sync;
struct saa7146_dma d_clipping; /* pointer to clipping memory */
unsigned int resources; /* resource management for device */
};
/* flags */
#define SAA7146_USE_PORT_B_FOR_VBI 0x2 /* use input port b for vbi hardware bug workaround */
struct saa7146_ext_vv
{
/* informations about the video capabilities of the device */
int inputs;
int audios;
u32 capabilities;
int flags;
/* additionally supported transmission standards */
struct saa7146_standard *stds;
int num_stds;
int (*std_callback)(struct saa7146_dev*, struct saa7146_standard *);
/* the extension can override this */
struct v4l2_ioctl_ops vid_ops;
struct v4l2_ioctl_ops vbi_ops;
/* pointer to the saa7146 core ops */
const struct v4l2_ioctl_ops *core_ops;
struct v4l2_file_operations vbi_fops;
};
struct saa7146_use_ops {
void (*init)(struct saa7146_dev *, struct saa7146_vv *);
int(*open)(struct saa7146_dev *, struct file *);
void (*release)(struct saa7146_dev *, struct file *);
void (*irq_done)(struct saa7146_dev *, unsigned long status);
ssize_t (*read)(struct file *, char __user *, size_t, loff_t *);
};
/* from saa7146_fops.c */
int saa7146_register_device(struct video_device **vid, struct saa7146_dev* dev, char *name, int type);
int saa7146_unregister_device(struct video_device **vid, struct saa7146_dev* dev);
void saa7146_buffer_finish(struct saa7146_dev *dev, struct saa7146_dmaqueue *q, int state);
void saa7146_buffer_next(struct saa7146_dev *dev, struct saa7146_dmaqueue *q,int vbi);
int saa7146_buffer_queue(struct saa7146_dev *dev, struct saa7146_dmaqueue *q, struct saa7146_buf *buf);
void saa7146_buffer_timeout(unsigned long data);
void saa7146_dma_free(struct saa7146_dev* dev,struct videobuf_queue *q,
struct saa7146_buf *buf);
int saa7146_vv_init(struct saa7146_dev* dev, struct saa7146_ext_vv *ext_vv);
int saa7146_vv_release(struct saa7146_dev* dev);
/* from saa7146_hlp.c */
int saa7146_enable_overlay(struct saa7146_fh *fh);
void saa7146_disable_overlay(struct saa7146_fh *fh);
void saa7146_set_capture(struct saa7146_dev *dev, struct saa7146_buf *buf, struct saa7146_buf *next);
void saa7146_write_out_dma(struct saa7146_dev* dev, int which, struct saa7146_video_dma* vdma) ;
void saa7146_set_hps_source_and_sync(struct saa7146_dev *saa, int source, int sync);
void saa7146_set_gpio(struct saa7146_dev *saa, u8 pin, u8 data);
/* from saa7146_video.c */
extern const struct v4l2_ioctl_ops saa7146_video_ioctl_ops;
extern const struct v4l2_ioctl_ops saa7146_vbi_ioctl_ops;
extern struct saa7146_use_ops saa7146_video_uops;
int saa7146_start_preview(struct saa7146_fh *fh);
int saa7146_stop_preview(struct saa7146_fh *fh);
long saa7146_video_do_ioctl(struct file *file, unsigned int cmd, void *arg);
int saa7146_s_ctrl(struct v4l2_ctrl *ctrl);
/* from saa7146_vbi.c */
extern struct saa7146_use_ops saa7146_vbi_uops;
/* resource management functions */
int saa7146_res_get(struct saa7146_fh *fh, unsigned int bit);
void saa7146_res_free(struct saa7146_fh *fh, unsigned int bits);
#define RESOURCE_DMA1_HPS 0x1
#define RESOURCE_DMA2_CLP 0x2
#define RESOURCE_DMA3_BRS 0x4
/* saa7146 source inputs */
#define SAA7146_HPS_SOURCE_PORT_A 0x00
#define SAA7146_HPS_SOURCE_PORT_B 0x01
#define SAA7146_HPS_SOURCE_YPB_CPA 0x02
#define SAA7146_HPS_SOURCE_YPA_CPB 0x03
/* sync inputs */
#define SAA7146_HPS_SYNC_PORT_A 0x00
#define SAA7146_HPS_SYNC_PORT_B 0x01
/* some memory sizes */
/* max. 16 clipping rectangles */
#define SAA7146_CLIPPING_MEM (16 * 4 * sizeof(u32))
/* some defines for the various clipping-modes */
#define SAA7146_CLIPPING_RECT 0x4
#define SAA7146_CLIPPING_RECT_INVERTED 0x5
#define SAA7146_CLIPPING_MASK 0x6
#define SAA7146_CLIPPING_MASK_INVERTED 0x7
/* output formats: each entry holds four informations */
#define RGB08_COMPOSED 0x0217 /* composed is used in the sense of "not-planar" */
/* this means: planar?=0, yuv2rgb-conversation-mode=2, dither=yes(=1), format-mode = 7 */
#define RGB15_COMPOSED 0x0213
#define RGB16_COMPOSED 0x0210
#define RGB24_COMPOSED 0x0201
#define RGB32_COMPOSED 0x0202
#define Y8 0x0006
#define YUV411_COMPOSED 0x0003
#define YUV422_COMPOSED 0x0000
/* this means: planar?=1, yuv2rgb-conversion-mode=0, dither=no(=0), format-mode = b */
#define YUV411_DECOMPOSED 0x100b
#define YUV422_DECOMPOSED 0x1009
#define YUV420_DECOMPOSED 0x100a
#define IS_PLANAR(x) (x & 0xf000)
/* misc defines */
#define SAA7146_NO_SWAP (0x0)
#define SAA7146_TWO_BYTE_SWAP (0x1)
#define SAA7146_FOUR_BYTE_SWAP (0x2)
#endif

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#ifndef __ASM_SH_MOBILE_CEU_H__
#define __ASM_SH_MOBILE_CEU_H__
#define SH_CEU_FLAG_USE_8BIT_BUS (1 << 0) /* use 8bit bus width */
#define SH_CEU_FLAG_USE_16BIT_BUS (1 << 1) /* use 16bit bus width */
#define SH_CEU_FLAG_HSYNC_LOW (1 << 2) /* default High if possible */
#define SH_CEU_FLAG_VSYNC_LOW (1 << 3) /* default High if possible */
#define SH_CEU_FLAG_LOWER_8BIT (1 << 4) /* default upper 8bit */
struct device;
struct resource;
struct sh_mobile_ceu_companion {
u32 num_resources;
struct resource *resource;
int id;
void *platform_data;
};
struct sh_mobile_ceu_info {
unsigned long flags;
int max_width;
int max_height;
struct sh_mobile_ceu_companion *csi2;
struct v4l2_async_subdev **asd; /* Flat array, arranged in groups */
unsigned int *asd_sizes; /* 0-terminated array pf asd group sizes */
};
#endif /* __ASM_SH_MOBILE_CEU_H__ */

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/*
* Driver header for the SH-Mobile MIPI CSI-2 unit
*
* Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef SH_MIPI_CSI
#define SH_MIPI_CSI
#include <linux/list.h>
enum sh_csi2_phy {
SH_CSI2_PHY_MAIN,
SH_CSI2_PHY_SUB,
};
enum sh_csi2_type {
SH_CSI2C,
SH_CSI2I,
};
#define SH_CSI2_CRC (1 << 0)
#define SH_CSI2_ECC (1 << 1)
struct platform_device;
struct sh_csi2_client_config {
enum sh_csi2_phy phy;
unsigned char lanes; /* bitmask[3:0] */
unsigned char channel; /* 0..3 */
struct platform_device *pdev; /* client platform device */
const char *name; /* async matching: client name */
};
struct v4l2_device;
struct sh_csi2_pdata {
enum sh_csi2_type type;
unsigned int flags;
struct sh_csi2_client_config *clients;
int num_clients;
};
#endif

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/*
* SuperH Video Output Unit (VOU) driver header
*
* Copyright (C) 2010, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef SH_VOU_H
#define SH_VOU_H
#include <linux/i2c.h>
/* Bus flags */
#define SH_VOU_PCLK_FALLING (1 << 0)
#define SH_VOU_HSYNC_LOW (1 << 1)
#define SH_VOU_VSYNC_LOW (1 << 2)
enum sh_vou_bus_fmt {
SH_VOU_BUS_8BIT,
SH_VOU_BUS_16BIT,
SH_VOU_BUS_BT656,
};
struct sh_vou_pdata {
enum sh_vou_bus_fmt bus_fmt;
int i2c_adap;
struct i2c_board_info *board_info;
unsigned long flags;
};
#endif

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/*
* include/media/si4713.h
*
* Board related data definitions for Si4713 i2c device driver.
*
* Copyright (c) 2009 Nokia Corporation
* Contact: Eduardo Valentin <eduardo.valentin@nokia.com>
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*
*/
#ifndef SI4713_H
#define SI4713_H
/* The SI4713 I2C sensor chip has a fixed slave address of 0xc6 or 0x22. */
#define SI4713_I2C_ADDR_BUSEN_HIGH 0x63
#define SI4713_I2C_ADDR_BUSEN_LOW 0x11
/*
* Platform dependent definition
*/
struct si4713_platform_data {
const char * const *supply_names;
unsigned supplies;
int gpio_reset; /* < 0 if not used */
};
/*
* Structure to query for Received Noise Level (RNL).
*/
struct si4713_rnl {
__u32 index; /* modulator index */
__u32 frequency; /* frequency to peform rnl measurement */
__s32 rnl; /* result of measurement in dBuV */
__u32 reserved[4]; /* drivers and apps must init this to 0 */
};
/*
* This is the ioctl number to query for rnl. Users must pass a
* struct si4713_rnl pointer specifying desired frequency in 'frequency' field
* following driver capabilities (i.e V4L2_TUNER_CAP_LOW).
* Driver must return measured value in the same struture, filling 'rnl' field.
*/
#define SI4713_IOC_MEASURE_RNL _IOWR('V', BASE_VIDIOC_PRIVATE + 0, \
struct si4713_rnl)
#endif /* ifndef SI4713_H*/

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/*
* include/media/si476x.h -- Common definitions for si476x driver
*
* Copyright (C) 2012 Innovative Converged Devices(ICD)
* Copyright (C) 2013 Andrey Smirnov
*
* Author: Andrey Smirnov <andrew.smirnov@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
*/
#ifndef SI476X_H
#define SI476X_H
#include <linux/types.h>
#include <linux/videodev2.h>
#include <linux/mfd/si476x-reports.h>
enum si476x_ctrl_id {
V4L2_CID_SI476X_RSSI_THRESHOLD = (V4L2_CID_USER_SI476X_BASE + 1),
V4L2_CID_SI476X_SNR_THRESHOLD = (V4L2_CID_USER_SI476X_BASE + 2),
V4L2_CID_SI476X_MAX_TUNE_ERROR = (V4L2_CID_USER_SI476X_BASE + 3),
V4L2_CID_SI476X_HARMONICS_COUNT = (V4L2_CID_USER_SI476X_BASE + 4),
V4L2_CID_SI476X_DIVERSITY_MODE = (V4L2_CID_USER_SI476X_BASE + 5),
V4L2_CID_SI476X_INTERCHIP_LINK = (V4L2_CID_USER_SI476X_BASE + 6),
};
#endif /* SI476X_H*/

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/*
* Driver header for SII9234 MHL converter chip.
*
* Copyright (c) 2011 Samsung Electronics, Co. Ltd
* Contact: Tomasz Stanislawski <t.stanislaws@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef SII9234_H
#define SII9234_H
/**
* @gpio_n_reset: GPIO driving nRESET pin
*/
struct sii9234_platform_data {
int gpio_n_reset;
};
#endif /* SII9234_H */

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/*
* include/media/smiapp.h
*
* Generic driver for SMIA/SMIA++ compliant camera modules
*
* Copyright (C) 2011--2012 Nokia Corporation
* Contact: Sakari Ailus <sakari.ailus@iki.fi>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
* 02110-1301 USA
*
*/
#ifndef __SMIAPP_H_
#define __SMIAPP_H_
#include <media/v4l2-subdev.h>
#define SMIAPP_NAME "smiapp"
#define SMIAPP_DFL_I2C_ADDR (0x20 >> 1) /* Default I2C Address */
#define SMIAPP_ALT_I2C_ADDR (0x6e >> 1) /* Alternate I2C Address */
#define SMIAPP_CSI_SIGNALLING_MODE_CCP2_DATA_CLOCK 0
#define SMIAPP_CSI_SIGNALLING_MODE_CCP2_DATA_STROBE 1
#define SMIAPP_CSI_SIGNALLING_MODE_CSI2 2
#define SMIAPP_NO_XSHUTDOWN -1
/*
* Sometimes due to board layout considerations the camera module can be
* mounted rotated. The typical rotation used is 180 degrees which can be
* corrected by giving a default H-FLIP and V-FLIP in the sensor readout.
* FIXME: rotation also changes the bayer pattern.
*/
enum smiapp_module_board_orient {
SMIAPP_MODULE_BOARD_ORIENT_0 = 0,
SMIAPP_MODULE_BOARD_ORIENT_180,
};
struct smiapp_flash_strobe_parms {
u8 mode;
u32 strobe_width_high_us;
u16 strobe_delay;
u16 stobe_start_point;
u8 trigger;
};
struct smiapp_platform_data {
/*
* Change the cci address if i2c_addr_alt is set.
* Both default and alternate cci addr need to be present
*/
unsigned short i2c_addr_dfl; /* Default i2c addr */
unsigned short i2c_addr_alt; /* Alternate i2c addr */
unsigned int nvm_size; /* bytes */
unsigned int ext_clk; /* sensor external clk */
unsigned int lanes; /* Number of CSI-2 lanes */
u8 csi_signalling_mode; /* SMIAPP_CSI_SIGNALLING_MODE_* */
const s64 *op_sys_clock;
enum smiapp_module_board_orient module_board_orient;
struct smiapp_flash_strobe_parms *strobe_setup;
int (*set_xclk)(struct v4l2_subdev *sd, int hz);
int xshutdown; /* gpio or SMIAPP_NO_XSHUTDOWN */
};
#endif /* __SMIAPP_H_ */

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/*
* camera image capture (abstract) bus driver header
*
* Copyright (C) 2006, Sascha Hauer, Pengutronix
* Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef SOC_CAMERA_H
#define SOC_CAMERA_H
#include <linux/bitops.h>
#include <linux/device.h>
#include <linux/mutex.h>
#include <linux/pm.h>
#include <linux/videodev2.h>
#include <media/videobuf-core.h>
#include <media/videobuf2-core.h>
#include <media/v4l2-async.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
struct file;
struct soc_camera_desc;
struct soc_camera_async_client;
struct soc_camera_device {
struct list_head list; /* list of all registered devices */
struct soc_camera_desc *sdesc;
struct device *pdev; /* Platform device */
struct device *parent; /* Camera host device */
struct device *control; /* E.g., the i2c client */
s32 user_width;
s32 user_height;
u32 bytesperline; /* for padding, zero if unused */
u32 sizeimage;
enum v4l2_colorspace colorspace;
unsigned char iface; /* Host number */
unsigned char devnum; /* Device number per host */
struct soc_camera_sense *sense; /* See comment in struct definition */
struct video_device *vdev;
struct v4l2_ctrl_handler ctrl_handler;
const struct soc_camera_format_xlate *current_fmt;
struct soc_camera_format_xlate *user_formats;
int num_user_formats;
enum v4l2_field field; /* Preserve field over close() */
void *host_priv; /* Per-device host private data */
/* soc_camera.c private count. Only accessed with .host_lock held */
int use_count;
struct file *streamer; /* stream owner */
struct v4l2_clk *clk;
/* Asynchronous subdevice management */
struct soc_camera_async_client *sasc;
/* video buffer queue */
union {
struct videobuf_queue vb_vidq;
struct vb2_queue vb2_vidq;
};
};
/* Host supports programmable stride */
#define SOCAM_HOST_CAP_STRIDE (1 << 0)
enum soc_camera_subdev_role {
SOCAM_SUBDEV_DATA_SOURCE = 1,
SOCAM_SUBDEV_DATA_SINK,
SOCAM_SUBDEV_DATA_PROCESSOR,
};
struct soc_camera_async_subdev {
struct v4l2_async_subdev asd;
enum soc_camera_subdev_role role;
};
struct soc_camera_host {
struct v4l2_device v4l2_dev;
struct list_head list;
struct mutex host_lock; /* Main synchronisation lock */
struct mutex clk_lock; /* Protect pipeline modifications */
unsigned char nr; /* Host number */
u32 capabilities;
struct soc_camera_device *icd; /* Currently attached client */
void *priv;
const char *drv_name;
struct soc_camera_host_ops *ops;
struct v4l2_async_subdev **asd; /* Flat array, arranged in groups */
unsigned int *asd_sizes; /* 0-terminated array of asd group sizes */
};
struct soc_camera_host_ops {
struct module *owner;
int (*add)(struct soc_camera_device *);
void (*remove)(struct soc_camera_device *);
int (*clock_start)(struct soc_camera_host *);
void (*clock_stop)(struct soc_camera_host *);
/*
* .get_formats() is called for each client device format, but
* .put_formats() is only called once. Further, if any of the calls to
* .get_formats() fail, .put_formats() will not be called at all, the
* failing .get_formats() must then clean up internally.
*/
int (*get_formats)(struct soc_camera_device *, unsigned int,
struct soc_camera_format_xlate *);
void (*put_formats)(struct soc_camera_device *);
int (*cropcap)(struct soc_camera_device *, struct v4l2_cropcap *);
int (*get_crop)(struct soc_camera_device *, struct v4l2_crop *);
int (*set_crop)(struct soc_camera_device *, const struct v4l2_crop *);
int (*get_selection)(struct soc_camera_device *, struct v4l2_selection *);
int (*set_selection)(struct soc_camera_device *, struct v4l2_selection *);
/*
* The difference to .set_crop() is, that .set_livecrop is not allowed
* to change the output sizes
*/
int (*set_livecrop)(struct soc_camera_device *, const struct v4l2_crop *);
int (*set_fmt)(struct soc_camera_device *, struct v4l2_format *);
int (*try_fmt)(struct soc_camera_device *, struct v4l2_format *);
void (*init_videobuf)(struct videobuf_queue *,
struct soc_camera_device *);
int (*init_videobuf2)(struct vb2_queue *,
struct soc_camera_device *);
int (*reqbufs)(struct soc_camera_device *, struct v4l2_requestbuffers *);
int (*querycap)(struct soc_camera_host *, struct v4l2_capability *);
int (*set_bus_param)(struct soc_camera_device *);
int (*get_parm)(struct soc_camera_device *, struct v4l2_streamparm *);
int (*set_parm)(struct soc_camera_device *, struct v4l2_streamparm *);
int (*enum_framesizes)(struct soc_camera_device *, struct v4l2_frmsizeenum *);
unsigned int (*poll)(struct file *, poll_table *);
};
#define SOCAM_SENSOR_INVERT_PCLK (1 << 0)
#define SOCAM_SENSOR_INVERT_MCLK (1 << 1)
#define SOCAM_SENSOR_INVERT_HSYNC (1 << 2)
#define SOCAM_SENSOR_INVERT_VSYNC (1 << 3)
#define SOCAM_SENSOR_INVERT_DATA (1 << 4)
struct i2c_board_info;
struct regulator_bulk_data;
struct soc_camera_subdev_desc {
/* Per camera SOCAM_SENSOR_* bus flags */
unsigned long flags;
/* sensor driver private platform data */
void *drv_priv;
/*
* Set unbalanced_power to true to deal with legacy drivers, failing to
* balance their calls to subdevice's .s_power() method. clock_state is
* then used internally by helper functions, it shouldn't be touched by
* drivers or the platform code.
*/
bool unbalanced_power;
unsigned long clock_state;
/* Optional callbacks to power on or off and reset the sensor */
int (*power)(struct device *, int);
int (*reset)(struct device *);
/*
* some platforms may support different data widths than the sensors
* native ones due to different data line routing. Let the board code
* overwrite the width flags.
*/
int (*set_bus_param)(struct soc_camera_subdev_desc *, unsigned long flags);
unsigned long (*query_bus_param)(struct soc_camera_subdev_desc *);
void (*free_bus)(struct soc_camera_subdev_desc *);
/* Optional regulators that have to be managed on power on/off events */
struct v4l2_subdev_platform_data sd_pdata;
};
struct soc_camera_host_desc {
/* Camera bus id, used to match a camera and a bus */
int bus_id;
int i2c_adapter_id;
struct i2c_board_info *board_info;
const char *module_name;
/*
* For non-I2C devices platform has to provide methods to add a device
* to the system and to remove it
*/
int (*add_device)(struct soc_camera_device *);
void (*del_device)(struct soc_camera_device *);
};
/*
* Platform data for "soc-camera-pdrv"
* This MUST be kept binary-identical to struct soc_camera_link below, until
* it is completely replaced by this one, after which we can split it into its
* two components.
*/
struct soc_camera_desc {
struct soc_camera_subdev_desc subdev_desc;
struct soc_camera_host_desc host_desc;
};
/* Prepare to replace this struct: don't change its layout any more! */
struct soc_camera_link {
/*
* Subdevice part - keep at top and compatible to
* struct soc_camera_subdev_desc
*/
/* Per camera SOCAM_SENSOR_* bus flags */
unsigned long flags;
void *priv;
/* Set by platforms to handle misbehaving drivers */
bool unbalanced_power;
/* Used by soc-camera helper functions */
unsigned long clock_state;
/* Optional callbacks to power on or off and reset the sensor */
int (*power)(struct device *, int);
int (*reset)(struct device *);
/*
* some platforms may support different data widths than the sensors
* native ones due to different data line routing. Let the board code
* overwrite the width flags.
*/
int (*set_bus_param)(struct soc_camera_link *, unsigned long flags);
unsigned long (*query_bus_param)(struct soc_camera_link *);
void (*free_bus)(struct soc_camera_link *);
/* Optional regulators that have to be managed on power on/off events */
struct regulator_bulk_data *regulators;
int num_regulators;
void *host_priv;
/*
* Host part - keep at bottom and compatible to
* struct soc_camera_host_desc
*/
/* Camera bus id, used to match a camera and a bus */
int bus_id;
int i2c_adapter_id;
struct i2c_board_info *board_info;
const char *module_name;
/*
* For non-I2C devices platform has to provide methods to add a device
* to the system and to remove it
*/
int (*add_device)(struct soc_camera_device *);
void (*del_device)(struct soc_camera_device *);
};
static inline struct soc_camera_host *to_soc_camera_host(
const struct device *dev)
{
struct v4l2_device *v4l2_dev = dev_get_drvdata(dev);
return container_of(v4l2_dev, struct soc_camera_host, v4l2_dev);
}
static inline struct soc_camera_desc *to_soc_camera_desc(
const struct soc_camera_device *icd)
{
return icd->sdesc;
}
static inline struct device *to_soc_camera_control(
const struct soc_camera_device *icd)
{
return icd->control;
}
static inline struct v4l2_subdev *soc_camera_to_subdev(
const struct soc_camera_device *icd)
{
struct device *control = to_soc_camera_control(icd);
return dev_get_drvdata(control);
}
int soc_camera_host_register(struct soc_camera_host *ici);
void soc_camera_host_unregister(struct soc_camera_host *ici);
const struct soc_camera_format_xlate *soc_camera_xlate_by_fourcc(
struct soc_camera_device *icd, unsigned int fourcc);
/**
* struct soc_camera_format_xlate - match between host and sensor formats
* @code: code of a sensor provided format
* @host_fmt: host format after host translation from code
*
* Host and sensor translation structure. Used in table of host and sensor
* formats matchings in soc_camera_device. A host can override the generic list
* generation by implementing get_formats(), and use it for format checks and
* format setup.
*/
struct soc_camera_format_xlate {
enum v4l2_mbus_pixelcode code;
const struct soc_mbus_pixelfmt *host_fmt;
};
#define SOCAM_SENSE_PCLK_CHANGED (1 << 0)
/**
* This struct can be attached to struct soc_camera_device by the host driver
* to request sense from the camera, for example, when calling .set_fmt(). The
* host then can check which flags are set and verify respective values if any.
* For example, if SOCAM_SENSE_PCLK_CHANGED is set, it means, pixclock has
* changed during this operation. After completion the host should detach sense.
*
* @flags ored SOCAM_SENSE_* flags
* @master_clock if the host wants to be informed about pixel-clock
* change, it better set master_clock.
* @pixel_clock_max maximum pixel clock frequency supported by the host,
* camera is not allowed to exceed this.
* @pixel_clock if the camera driver changed pixel clock during this
* operation, it sets SOCAM_SENSE_PCLK_CHANGED, uses
* master_clock to calculate the new pixel-clock and
* sets this field.
*/
struct soc_camera_sense {
unsigned long flags;
unsigned long master_clock;
unsigned long pixel_clock_max;
unsigned long pixel_clock;
};
#define SOCAM_DATAWIDTH(x) BIT((x) - 1)
#define SOCAM_DATAWIDTH_4 SOCAM_DATAWIDTH(4)
#define SOCAM_DATAWIDTH_8 SOCAM_DATAWIDTH(8)
#define SOCAM_DATAWIDTH_9 SOCAM_DATAWIDTH(9)
#define SOCAM_DATAWIDTH_10 SOCAM_DATAWIDTH(10)
#define SOCAM_DATAWIDTH_12 SOCAM_DATAWIDTH(12)
#define SOCAM_DATAWIDTH_15 SOCAM_DATAWIDTH(15)
#define SOCAM_DATAWIDTH_16 SOCAM_DATAWIDTH(16)
#define SOCAM_DATAWIDTH_18 SOCAM_DATAWIDTH(18)
#define SOCAM_DATAWIDTH_24 SOCAM_DATAWIDTH(24)
#define SOCAM_DATAWIDTH_MASK (SOCAM_DATAWIDTH_4 | SOCAM_DATAWIDTH_8 | \
SOCAM_DATAWIDTH_9 | SOCAM_DATAWIDTH_10 | \
SOCAM_DATAWIDTH_12 | SOCAM_DATAWIDTH_15 | \
SOCAM_DATAWIDTH_16 | SOCAM_DATAWIDTH_18 | \
SOCAM_DATAWIDTH_24)
static inline void soc_camera_limit_side(int *start, int *length,
unsigned int start_min,
unsigned int length_min, unsigned int length_max)
{
if (*length < length_min)
*length = length_min;
else if (*length > length_max)
*length = length_max;
if (*start < start_min)
*start = start_min;
else if (*start > start_min + length_max - *length)
*start = start_min + length_max - *length;
}
unsigned long soc_camera_apply_board_flags(struct soc_camera_subdev_desc *ssdd,
const struct v4l2_mbus_config *cfg);
int soc_camera_power_init(struct device *dev, struct soc_camera_subdev_desc *ssdd);
int soc_camera_power_on(struct device *dev, struct soc_camera_subdev_desc *ssdd,
struct v4l2_clk *clk);
int soc_camera_power_off(struct device *dev, struct soc_camera_subdev_desc *ssdd,
struct v4l2_clk *clk);
static inline int soc_camera_set_power(struct device *dev,
struct soc_camera_subdev_desc *ssdd, struct v4l2_clk *clk, bool on)
{
return on ? soc_camera_power_on(dev, ssdd, clk)
: soc_camera_power_off(dev, ssdd, clk);
}
/* This is only temporary here - until v4l2-subdev begins to link to video_device */
#include <linux/i2c.h>
static inline struct video_device *soc_camera_i2c_to_vdev(const struct i2c_client *client)
{
struct v4l2_subdev *sd = i2c_get_clientdata(client);
struct soc_camera_device *icd = v4l2_get_subdev_hostdata(sd);
return icd ? icd->vdev : NULL;
}
static inline struct soc_camera_subdev_desc *soc_camera_i2c_to_desc(const struct i2c_client *client)
{
return client->dev.platform_data;
}
static inline struct v4l2_subdev *soc_camera_vdev_to_subdev(struct video_device *vdev)
{
struct soc_camera_device *icd = video_get_drvdata(vdev);
return soc_camera_to_subdev(icd);
}
static inline struct soc_camera_device *soc_camera_from_vb2q(const struct vb2_queue *vq)
{
return container_of(vq, struct soc_camera_device, vb2_vidq);
}
static inline struct soc_camera_device *soc_camera_from_vbq(const struct videobuf_queue *vq)
{
return container_of(vq, struct soc_camera_device, vb_vidq);
}
static inline u32 soc_camera_grp_id(const struct soc_camera_device *icd)
{
return (icd->iface << 8) | (icd->devnum + 1);
}
void soc_camera_lock(struct vb2_queue *vq);
void soc_camera_unlock(struct vb2_queue *vq);
#endif

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/*
* Generic Platform Camera Driver Header
*
* Copyright (C) 2008 Magnus Damm
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __SOC_CAMERA_H__
#define __SOC_CAMERA_H__
#include <linux/videodev2.h>
#include <media/soc_camera.h>
#include <media/v4l2-mediabus.h>
struct device;
struct soc_camera_platform_info {
const char *format_name;
unsigned long format_depth;
struct v4l2_mbus_framefmt format;
unsigned long mbus_param;
enum v4l2_mbus_type mbus_type;
struct soc_camera_device *icd;
int (*set_capture)(struct soc_camera_platform_info *info, int enable);
};
static inline void soc_camera_platform_release(struct platform_device **pdev)
{
*pdev = NULL;
}
static inline int soc_camera_platform_add(struct soc_camera_device *icd,
struct platform_device **pdev,
struct soc_camera_link *plink,
void (*release)(struct device *dev),
int id)
{
struct soc_camera_subdev_desc *ssdd =
(struct soc_camera_subdev_desc *)plink;
struct soc_camera_platform_info *info = ssdd->drv_priv;
int ret;
if (&icd->sdesc->subdev_desc != ssdd)
return -ENODEV;
if (*pdev)
return -EBUSY;
*pdev = platform_device_alloc("soc_camera_platform", id);
if (!*pdev)
return -ENOMEM;
info->icd = icd;
(*pdev)->dev.platform_data = info;
(*pdev)->dev.release = release;
ret = platform_device_add(*pdev);
if (ret < 0) {
platform_device_put(*pdev);
*pdev = NULL;
info->icd = NULL;
}
return ret;
}
static inline void soc_camera_platform_del(const struct soc_camera_device *icd,
struct platform_device *pdev,
const struct soc_camera_link *plink)
{
const struct soc_camera_subdev_desc *ssdd =
(const struct soc_camera_subdev_desc *)plink;
if (&icd->sdesc->subdev_desc != ssdd || !pdev)
return;
platform_device_unregister(pdev);
}
#endif /* __SOC_CAMERA_H__ */

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/*
* SoC-camera Media Bus API extensions
*
* Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef SOC_MEDIABUS_H
#define SOC_MEDIABUS_H
#include <linux/videodev2.h>
#include <linux/v4l2-mediabus.h>
/**
* enum soc_mbus_packing - data packing types on the media-bus
* @SOC_MBUS_PACKING_NONE: no packing, bit-for-bit transfer to RAM, one
* sample represents one pixel
* @SOC_MBUS_PACKING_2X8_PADHI: 16 bits transferred in 2 8-bit samples, in the
* possibly incomplete byte high bits are padding
* @SOC_MBUS_PACKING_2X8_PADLO: as above, but low bits are padding
* @SOC_MBUS_PACKING_EXTEND16: sample width (e.g., 10 bits) has to be extended
* to 16 bits
* @SOC_MBUS_PACKING_VARIABLE: compressed formats with variable packing
* @SOC_MBUS_PACKING_1_5X8: used for packed YUV 4:2:0 formats, where 4
* pixels occupy 6 bytes in RAM
* @SOC_MBUS_PACKING_EXTEND32: sample width (e.g., 24 bits) has to be extended
* to 32 bits
*/
enum soc_mbus_packing {
SOC_MBUS_PACKING_NONE,
SOC_MBUS_PACKING_2X8_PADHI,
SOC_MBUS_PACKING_2X8_PADLO,
SOC_MBUS_PACKING_EXTEND16,
SOC_MBUS_PACKING_VARIABLE,
SOC_MBUS_PACKING_1_5X8,
SOC_MBUS_PACKING_EXTEND32,
};
/**
* enum soc_mbus_order - sample order on the media bus
* @SOC_MBUS_ORDER_LE: least significant sample first
* @SOC_MBUS_ORDER_BE: most significant sample first
*/
enum soc_mbus_order {
SOC_MBUS_ORDER_LE,
SOC_MBUS_ORDER_BE,
};
/**
* enum soc_mbus_layout - planes layout in memory
* @SOC_MBUS_LAYOUT_PACKED: color components packed
* @SOC_MBUS_LAYOUT_PLANAR_2Y_U_V: YUV components stored in 3 planes (4:2:2)
* @SOC_MBUS_LAYOUT_PLANAR_2Y_C: YUV components stored in a luma and a
* chroma plane (C plane is half the size
* of Y plane)
* @SOC_MBUS_LAYOUT_PLANAR_Y_C: YUV components stored in a luma and a
* chroma plane (C plane is the same size
* as Y plane)
*/
enum soc_mbus_layout {
SOC_MBUS_LAYOUT_PACKED = 0,
SOC_MBUS_LAYOUT_PLANAR_2Y_U_V,
SOC_MBUS_LAYOUT_PLANAR_2Y_C,
SOC_MBUS_LAYOUT_PLANAR_Y_C,
};
/**
* struct soc_mbus_pixelfmt - Data format on the media bus
* @name: Name of the format
* @fourcc: Fourcc code, that will be obtained if the data is
* stored in memory in the following way:
* @packing: Type of sample-packing, that has to be used
* @order: Sample order when storing in memory
* @bits_per_sample: How many bits the bridge has to sample
*/
struct soc_mbus_pixelfmt {
const char *name;
u32 fourcc;
enum soc_mbus_packing packing;
enum soc_mbus_order order;
enum soc_mbus_layout layout;
u8 bits_per_sample;
};
/**
* struct soc_mbus_lookup - Lookup FOURCC IDs by mediabus codes for pass-through
* @code: mediabus pixel-code
* @fmt: pixel format description
*/
struct soc_mbus_lookup {
enum v4l2_mbus_pixelcode code;
struct soc_mbus_pixelfmt fmt;
};
const struct soc_mbus_pixelfmt *soc_mbus_find_fmtdesc(
enum v4l2_mbus_pixelcode code,
const struct soc_mbus_lookup *lookup,
int n);
const struct soc_mbus_pixelfmt *soc_mbus_get_fmtdesc(
enum v4l2_mbus_pixelcode code);
s32 soc_mbus_bytes_per_line(u32 width, const struct soc_mbus_pixelfmt *mf);
s32 soc_mbus_image_size(const struct soc_mbus_pixelfmt *mf,
u32 bytes_per_line, u32 height);
int soc_mbus_samples_per_pixel(const struct soc_mbus_pixelfmt *mf,
unsigned int *numerator, unsigned int *denominator);
unsigned int soc_mbus_config_compatible(const struct v4l2_mbus_config *cfg,
unsigned int flags);
#endif

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/*
* Driver header for SR030PC30 camera sensor
*
* Copyright (c) 2010 Samsung Electronics, Co. Ltd
* Contact: Sylwester Nawrocki <s.nawrocki@samsung.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef SR030PC30_H
#define SR030PC30_H
struct sr030pc30_platform_data {
unsigned long clk_rate; /* master clock frequency in Hz */
int (*set_power)(struct device *dev, int on);
};
#endif /* SR030PC30_H */

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#ifndef __SOUND_TEA575X_TUNER_H
#define __SOUND_TEA575X_TUNER_H
/*
* ALSA driver for TEA5757/5759 Philips AM/FM tuner chips
*
* Copyright (c) 2004 Jaroslav Kysela <perex@perex.cz>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <linux/videodev2.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-dev.h>
#include <media/v4l2-device.h>
#define TEA575X_FMIF 10700
#define TEA575X_AMIF 450
#define TEA575X_DATA (1 << 0)
#define TEA575X_CLK (1 << 1)
#define TEA575X_WREN (1 << 2)
#define TEA575X_MOST (1 << 3)
struct snd_tea575x;
struct snd_tea575x_ops {
/* Drivers using snd_tea575x must either define read_ and write_val */
void (*write_val)(struct snd_tea575x *tea, u32 val);
u32 (*read_val)(struct snd_tea575x *tea);
/* Or define the 3 pin functions */
void (*set_pins)(struct snd_tea575x *tea, u8 pins);
u8 (*get_pins)(struct snd_tea575x *tea);
void (*set_direction)(struct snd_tea575x *tea, bool output);
};
struct snd_tea575x {
struct v4l2_device *v4l2_dev;
struct v4l2_file_operations fops;
struct video_device vd; /* video device */
int radio_nr; /* radio_nr */
bool tea5759; /* 5759 chip is present */
bool has_am; /* Device can tune to AM freqs */
bool cannot_read_data; /* Device cannot read the data pin */
bool cannot_mute; /* Device cannot mute */
bool mute; /* Device is muted? */
bool stereo; /* receiving stereo */
bool tuned; /* tuned to a station */
unsigned int val; /* hw value */
u32 band; /* 0: FM, 1: FM-Japan, 2: AM */
u32 freq; /* frequency */
struct mutex mutex;
struct snd_tea575x_ops *ops;
void *private_data;
u8 card[32];
u8 bus_info[32];
struct v4l2_ctrl_handler ctrl_handler;
int (*ext_init)(struct snd_tea575x *tea);
};
int snd_tea575x_hw_init(struct snd_tea575x *tea);
int snd_tea575x_init(struct snd_tea575x *tea, struct module *owner);
void snd_tea575x_exit(struct snd_tea575x *tea);
void snd_tea575x_set_freq(struct snd_tea575x *tea);
#endif /* __SOUND_TEA575X_TUNER_H */

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/*
* Copyright (C) 2013 Texas Instruments Inc
*
* Copyright 2013 Cisco Systems, Inc. and/or its affiliates.
*
* Contributors:
* Hans Verkuil <hans.verkuil@cisco.com>
* Lad, Prabhakar <prabhakar.lad@ti.com>
* Martin Bugge <marbugge@cisco.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef THS7353_H
#define THS7353_H
/**
* struct ths7303_platform_data - Platform dependent data
* @ch_1: Bias value for channel one.
* @ch_2: Bias value for channel two.
* @ch_3: Bias value for channel three.
*/
struct ths7303_platform_data {
u8 ch_1;
u8 ch_2;
u8 ch_3;
};
#endif

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/*
* timb_radio.h Platform struct for the Timberdale radio driver
* Copyright (c) 2009 Intel Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _TIMB_RADIO_
#define _TIMB_RADIO_ 1
#include <linux/i2c.h>
struct timb_radio_platform_data {
int i2c_adapter; /* I2C adapter where the tuner and dsp are attached */
struct i2c_board_info *tuner;
struct i2c_board_info *dsp;
};
#endif

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/*
* timb_video.h Platform struct for the Timberdale video driver
* Copyright (c) 2009-2010 Intel Corporation
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _TIMB_VIDEO_
#define _TIMB_VIDEO_ 1
#include <linux/i2c.h>
struct timb_video_platform_data {
int dma_channel;
int i2c_adapter; /* The I2C adapter where the encoder is attached */
struct {
const char *module_name;
struct i2c_board_info *info;
} encoder;
};
#endif

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/*
* descriptions for simple tuners.
*/
#ifndef __TUNER_TYPES_H__
#define __TUNER_TYPES_H__
enum param_type {
TUNER_PARAM_TYPE_RADIO,
TUNER_PARAM_TYPE_PAL,
TUNER_PARAM_TYPE_SECAM,
TUNER_PARAM_TYPE_NTSC,
TUNER_PARAM_TYPE_DIGITAL,
};
struct tuner_range {
unsigned short limit;
unsigned char config;
unsigned char cb;
};
struct tuner_params {
enum param_type type;
/* Many Philips based tuners have a comment like this in their
* datasheet:
*
* For channel selection involving band switching, and to ensure
* smooth tuning to the desired channel without causing
* unnecessary charge pump action, it is recommended to consider
* the difference between wanted channel frequency and the
* current channel frequency. Unnecessary charge pump action
* will result in very low tuning voltage which may drive the
* oscillator to extreme conditions.
*
* Set cb_first_if_lower_freq to 1, if this check is
* required for this tuner.
*
* I tested this for PAL by first setting the TV frequency to
* 203 MHz and then switching to 96.6 MHz FM radio. The result was
* static unless the control byte was sent first.
*/
unsigned int cb_first_if_lower_freq:1;
/* Set to 1 if this tuner uses a tda9887 */
unsigned int has_tda9887:1;
/* Many Philips tuners use tda9887 PORT1 to select the FM radio
sensitivity. If this setting is 1, then set PORT1 to 1 to
get proper FM reception. */
unsigned int port1_fm_high_sensitivity:1;
/* Some Philips tuners use tda9887 PORT2 to select the FM radio
sensitivity. If this setting is 1, then set PORT2 to 1 to
get proper FM reception. */
unsigned int port2_fm_high_sensitivity:1;
/* Some Philips tuners use tda9887 cGainNormal to select the FM radio
sensitivity. If this setting is 1, e register will use cGainNormal
instead of cGainLow. */
unsigned int fm_gain_normal:1;
/* Most tuners with a tda9887 use QSS mode. Some (cheaper) tuners
use Intercarrier mode. If this setting is 1, then the tuner
needs to be set to intercarrier mode. */
unsigned int intercarrier_mode:1;
/* This setting sets the default value for PORT1.
0 means inactive, 1 means active. Note: the actual bit
value written to the tda9887 is inverted. So a 0 here
means a 1 in the B6 bit. */
unsigned int port1_active:1;
/* This setting sets the default value for PORT2.
0 means inactive, 1 means active. Note: the actual bit
value written to the tda9887 is inverted. So a 0 here
means a 1 in the B7 bit. */
unsigned int port2_active:1;
/* Sometimes PORT1 is inverted when the SECAM-L' standard is selected.
Set this bit to 1 if this is needed. */
unsigned int port1_invert_for_secam_lc:1;
/* Sometimes PORT2 is inverted when the SECAM-L' standard is selected.
Set this bit to 1 if this is needed. */
unsigned int port2_invert_for_secam_lc:1;
/* Some cards require PORT1 to be 1 for mono Radio FM and 0 for stereo. */
unsigned int port1_set_for_fm_mono:1;
/* Select 18% (or according to datasheet 0%) L standard PLL gating,
vs the driver default of 36%. */
unsigned int default_pll_gating_18:1;
/* IF to use in radio mode. Tuners with a separate radio IF filter
seem to use 10.7, while those without use 33.3 for PAL/SECAM tuners
and 41.3 for NTSC tuners. 0 = 10.7, 1 = 33.3, 2 = 41.3 */
unsigned int radio_if:2;
/* Default tda9887 TOP value in dB for the low band. Default is 0.
Range: -16:+15 */
signed int default_top_low:5;
/* Default tda9887 TOP value in dB for the mid band. Default is 0.
Range: -16:+15 */
signed int default_top_mid:5;
/* Default tda9887 TOP value in dB for the high band. Default is 0.
Range: -16:+15 */
signed int default_top_high:5;
/* Default tda9887 TOP value in dB for SECAM-L/L' for the low band.
Default is 0. Several tuners require a different TOP value for
the SECAM-L/L' standards. Range: -16:+15 */
signed int default_top_secam_low:5;
/* Default tda9887 TOP value in dB for SECAM-L/L' for the mid band.
Default is 0. Several tuners require a different TOP value for
the SECAM-L/L' standards. Range: -16:+15 */
signed int default_top_secam_mid:5;
/* Default tda9887 TOP value in dB for SECAM-L/L' for the high band.
Default is 0. Several tuners require a different TOP value for
the SECAM-L/L' standards. Range: -16:+15 */
signed int default_top_secam_high:5;
u16 iffreq;
unsigned int count;
struct tuner_range *ranges;
};
struct tunertype {
char *name;
unsigned int count;
struct tuner_params *params;
u16 min;
u16 max;
u32 stepsize;
u8 *initdata;
u8 *sleepdata;
};
extern struct tunertype tuners[];
extern unsigned const int tuner_count;
#endif

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/*
tuner.h - definition for different tuners
Copyright (C) 1997 Markus Schroeder (schroedm@uni-duesseldorf.de)
minor modifications by Ralph Metzler (rjkm@thp.uni-koeln.de)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _TUNER_H
#define _TUNER_H
#ifdef __KERNEL__
#include <linux/videodev2.h>
#define ADDR_UNSET (255)
#define TUNER_TEMIC_PAL 0 /* 4002 FH5 (3X 7756, 9483) */
#define TUNER_PHILIPS_PAL_I 1
#define TUNER_PHILIPS_NTSC 2
#define TUNER_PHILIPS_SECAM 3 /* you must actively select B/G, L, L` */
#define TUNER_ABSENT 4
#define TUNER_PHILIPS_PAL 5
#define TUNER_TEMIC_NTSC 6 /* 4032 FY5 (3X 7004, 9498, 9789) */
#define TUNER_TEMIC_PAL_I 7 /* 4062 FY5 (3X 8501, 9957) */
#define TUNER_TEMIC_4036FY5_NTSC 8 /* 4036 FY5 (3X 1223, 1981, 7686) */
#define TUNER_ALPS_TSBH1_NTSC 9
#define TUNER_ALPS_TSBE1_PAL 10
#define TUNER_ALPS_TSBB5_PAL_I 11
#define TUNER_ALPS_TSBE5_PAL 12
#define TUNER_ALPS_TSBC5_PAL 13
#define TUNER_TEMIC_4006FH5_PAL 14 /* 4006 FH5 (3X 9500, 9501, 7291) */
#define TUNER_ALPS_TSHC6_NTSC 15
#define TUNER_TEMIC_PAL_DK 16 /* 4016 FY5 (3X 1392, 1393) */
#define TUNER_PHILIPS_NTSC_M 17
#define TUNER_TEMIC_4066FY5_PAL_I 18 /* 4066 FY5 (3X 7032, 7035) */
#define TUNER_TEMIC_4006FN5_MULTI_PAL 19 /* B/G, I and D/K autodetected (3X 7595, 7606, 7657) */
#define TUNER_TEMIC_4009FR5_PAL 20 /* incl. FM radio (3X 7607, 7488, 7711) */
#define TUNER_TEMIC_4039FR5_NTSC 21 /* incl. FM radio (3X 7246, 7578, 7732) */
#define TUNER_TEMIC_4046FM5 22 /* you must actively select B/G, D/K, I, L, L` ! (3X 7804, 7806, 8103, 8104) */
#define TUNER_PHILIPS_PAL_DK 23
#define TUNER_PHILIPS_FQ1216ME 24 /* you must actively select B/G/D/K, I, L, L` */
#define TUNER_LG_PAL_I_FM 25
#define TUNER_LG_PAL_I 26
#define TUNER_LG_NTSC_FM 27
#define TUNER_LG_PAL_FM 28
#define TUNER_LG_PAL 29
#define TUNER_TEMIC_4009FN5_MULTI_PAL_FM 30 /* B/G, I and D/K autodetected (3X 8155, 8160, 8163) */
#define TUNER_SHARP_2U5JF5540_NTSC 31
#define TUNER_Samsung_PAL_TCPM9091PD27 32
#define TUNER_MT2032 33
#define TUNER_TEMIC_4106FH5 34 /* 4106 FH5 (3X 7808, 7865) */
#define TUNER_TEMIC_4012FY5 35 /* 4012 FY5 (3X 0971, 1099) */
#define TUNER_TEMIC_4136FY5 36 /* 4136 FY5 (3X 7708, 7746) */
#define TUNER_LG_PAL_NEW_TAPC 37
#define TUNER_PHILIPS_FM1216ME_MK3 38
#define TUNER_LG_NTSC_NEW_TAPC 39
#define TUNER_HITACHI_NTSC 40
#define TUNER_PHILIPS_PAL_MK 41
#define TUNER_PHILIPS_FCV1236D 42
#define TUNER_PHILIPS_FM1236_MK3 43
#define TUNER_PHILIPS_4IN1 44 /* ATI TV Wonder Pro - Conexant */
/* Microtune merged with Temic 12/31/1999 partially financed by Alps - these may be similar to Temic */
#define TUNER_MICROTUNE_4049FM5 45
#define TUNER_PANASONIC_VP27 46
#define TUNER_LG_NTSC_TAPE 47
#define TUNER_TNF_8831BGFF 48
#define TUNER_MICROTUNE_4042FI5 49 /* DViCO FusionHDTV 3 Gold-Q - 4042 FI5 (3X 8147) */
#define TUNER_TCL_2002N 50
#define TUNER_PHILIPS_FM1256_IH3 51
#define TUNER_THOMSON_DTT7610 52
#define TUNER_PHILIPS_FQ1286 53
#define TUNER_PHILIPS_TDA8290 54
#define TUNER_TCL_2002MB 55 /* Hauppauge PVR-150 PAL */
#define TUNER_PHILIPS_FQ1216AME_MK4 56 /* Hauppauge PVR-150 PAL */
#define TUNER_PHILIPS_FQ1236A_MK4 57 /* Hauppauge PVR-500MCE NTSC */
#define TUNER_YMEC_TVF_8531MF 58
#define TUNER_YMEC_TVF_5533MF 59 /* Pixelview Pro Ultra NTSC */
#define TUNER_THOMSON_DTT761X 60 /* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */
#define TUNER_TENA_9533_DI 61
#define TUNER_TEA5767 62 /* Only FM Radio Tuner */
#define TUNER_PHILIPS_FMD1216ME_MK3 63
#define TUNER_LG_TDVS_H06XF 64 /* TDVS H061F, H062F, H064F */
#define TUNER_YMEC_TVF66T5_B_DFF 65 /* Acorp Y878F */
#define TUNER_LG_TALN 66
#define TUNER_PHILIPS_TD1316 67
#define TUNER_PHILIPS_TUV1236D 68 /* ATI HDTV Wonder */
#define TUNER_TNF_5335MF 69 /* Sabrent Bt848 */
#define TUNER_SAMSUNG_TCPN_2121P30A 70 /* Hauppauge PVR-500MCE NTSC */
#define TUNER_XC2028 71
#define TUNER_THOMSON_FE6600 72 /* DViCO FusionHDTV DVB-T Hybrid */
#define TUNER_SAMSUNG_TCPG_6121P30A 73 /* Hauppauge PVR-500 PAL */
#define TUNER_TDA9887 74 /* This tuner should be used only internally */
#define TUNER_TEA5761 75 /* Only FM Radio Tuner */
#define TUNER_XC5000 76 /* Xceive Silicon Tuner */
#define TUNER_TCL_MF02GIP_5N 77 /* TCL MF02GIP_5N */
#define TUNER_PHILIPS_FMD1216MEX_MK3 78
#define TUNER_PHILIPS_FM1216MK5 79
#define TUNER_PHILIPS_FQ1216LME_MK3 80 /* Active loopthrough, no FM */
#define TUNER_PARTSNIC_PTI_5NF05 81
#define TUNER_PHILIPS_CU1216L 82
#define TUNER_NXP_TDA18271 83
#define TUNER_SONY_BTF_PXN01Z 84
#define TUNER_PHILIPS_FQ1236_MK5 85 /* NTSC, TDA9885, no FM radio */
#define TUNER_TENA_TNF_5337 86
#define TUNER_XC4000 87 /* Xceive Silicon Tuner */
#define TUNER_XC5000C 88 /* Xceive Silicon Tuner */
#define TUNER_SONY_BTF_PG472Z 89 /* PAL+SECAM */
#define TUNER_SONY_BTF_PK467Z 90 /* NTSC_JP */
#define TUNER_SONY_BTF_PB463Z 91 /* NTSC */
/* tv card specific */
#define TDA9887_PRESENT (1<<0)
#define TDA9887_PORT1_INACTIVE (1<<1)
#define TDA9887_PORT2_INACTIVE (1<<2)
#define TDA9887_QSS (1<<3)
#define TDA9887_INTERCARRIER (1<<4)
#define TDA9887_PORT1_ACTIVE (1<<5)
#define TDA9887_PORT2_ACTIVE (1<<6)
#define TDA9887_INTERCARRIER_NTSC (1<<7)
/* Tuner takeover point adjustment, in dB, -16 <= top <= 15 */
#define TDA9887_TOP_MASK (0x3f << 8)
#define TDA9887_TOP_SET (1 << 13)
#define TDA9887_TOP(top) (TDA9887_TOP_SET | (((16 + (top)) & 0x1f) << 8))
/* config options */
#define TDA9887_DEEMPHASIS_MASK (3<<16)
#define TDA9887_DEEMPHASIS_NONE (1<<16)
#define TDA9887_DEEMPHASIS_50 (2<<16)
#define TDA9887_DEEMPHASIS_75 (3<<16)
#define TDA9887_AUTOMUTE (1<<18)
#define TDA9887_GATING_18 (1<<19)
#define TDA9887_GAIN_NORMAL (1<<20)
#define TDA9887_RIF_41_3 (1<<21) /* radio IF1 41.3 vs 33.3 */
enum tuner_mode {
T_RADIO = 1 << V4L2_TUNER_RADIO,
T_ANALOG_TV = 1 << V4L2_TUNER_ANALOG_TV,
/* Don't need to map V4L2_TUNER_DIGITAL_TV, as tuner-core won't use it */
};
/* Older boards only had a single tuner device. Nowadays multiple tuner
devices may be present on a single board. Using TUNER_SET_TYPE_ADDR
to pass the tuner_setup structure it is possible to setup each tuner
device in turn.
Since multiple devices may be present it is no longer sufficient to
send a command to a single i2c device. Instead you should broadcast
the command to all i2c devices.
By setting the mode_mask correctly you can select which commands are
accepted by a specific tuner device. For example, set mode_mask to
T_RADIO if the device is a radio-only tuner. That specific tuner will
only accept commands when the tuner is in radio mode and ignore them
when the tuner is set to TV mode.
*/
struct tuner_setup {
unsigned short addr; /* I2C address */
unsigned int type; /* Tuner type */
unsigned int mode_mask; /* Allowed tuner modes */
void *config; /* configuraion for more complex tuners */
int (*tuner_callback) (void *dev, int component, int cmd, int arg);
};
#endif /* __KERNEL__ */
#endif /* _TUNER_H */

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/*
tvaudio.h - definition for tvaudio inputs
Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _TVAUDIO_H
#define _TVAUDIO_H
#include <media/i2c-addr.h>
/* The tvaudio module accepts the following inputs: */
#define TVAUDIO_INPUT_TUNER 0
#define TVAUDIO_INPUT_RADIO 1
#define TVAUDIO_INPUT_EXTERN 2
#define TVAUDIO_INPUT_INTERN 3
static inline const unsigned short *tvaudio_addrs(void)
{
static const unsigned short addrs[] = {
I2C_ADDR_TDA8425 >> 1,
I2C_ADDR_TEA6300 >> 1,
I2C_ADDR_TEA6420 >> 1,
I2C_ADDR_TDA9840 >> 1,
I2C_ADDR_TDA985x_L >> 1,
I2C_ADDR_TDA985x_H >> 1,
I2C_ADDR_TDA9874 >> 1,
I2C_ADDR_PIC16C54 >> 1,
I2C_CLIENT_END
};
return addrs;
}
#endif

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/*
*/
enum tveeprom_audio_processor {
/* No audio processor present */
TVEEPROM_AUDPROC_NONE,
/* The audio processor is internal to the video processor */
TVEEPROM_AUDPROC_INTERNAL,
/* The audio processor is a MSPXXXX device */
TVEEPROM_AUDPROC_MSP,
/* The audio processor is another device */
TVEEPROM_AUDPROC_OTHER,
};
#include <linux/if_ether.h>
struct tveeprom {
u32 has_radio;
/* If has_ir == 0, then it is unknown what the IR capabilities are,
otherwise:
bit 0: 1 (= IR capabilities are known)
bit 1: IR receiver present
bit 2: IR transmitter (blaster) present */
u32 has_ir;
u32 has_MAC_address; /* 0: no MAC, 1: MAC present, 2: unknown */
u32 tuner_type;
u32 tuner_formats;
u32 tuner_hauppauge_model;
u32 tuner2_type;
u32 tuner2_formats;
u32 tuner2_hauppauge_model;
u32 digitizer;
u32 digitizer_formats;
u32 audio_processor;
u32 decoder_processor;
u32 model;
u32 revision;
u32 serial_number;
char rev_str[5];
u8 MAC_address[ETH_ALEN];
};
void tveeprom_hauppauge_analog(struct i2c_client *c, struct tveeprom *tvee,
unsigned char *eeprom_data);
int tveeprom_read(struct i2c_client *c, unsigned char *eedata, int len);

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/*
* drivers/media/video/tvp514x.h
*
* Copyright (C) 2008 Texas Instruments Inc
* Author: Vaibhav Hiremath <hvaibhav@ti.com>
*
* Contributors:
* Sivaraj R <sivaraj@ti.com>
* Brijesh R Jadav <brijesh.j@ti.com>
* Hardik Shah <hardik.shah@ti.com>
* Manjunath Hadli <mrh@ti.com>
* Karicheri Muralidharan <m-karicheri2@ti.com>
*
* This package is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
#ifndef _TVP514X_H
#define _TVP514X_H
/*
* Other macros
*/
#define TVP514X_MODULE_NAME "tvp514x"
#define TVP514X_XCLK_BT656 (27000000)
/* Number of pixels and number of lines per frame for different standards */
#define NTSC_NUM_ACTIVE_PIXELS (720)
#define NTSC_NUM_ACTIVE_LINES (480)
#define PAL_NUM_ACTIVE_PIXELS (720)
#define PAL_NUM_ACTIVE_LINES (576)
/**
* enum tvp514x_input - enum for different decoder input pin
* configuration.
*/
enum tvp514x_input {
/*
* CVBS input selection
*/
INPUT_CVBS_VI1A = 0x0,
INPUT_CVBS_VI1B,
INPUT_CVBS_VI1C,
INPUT_CVBS_VI2A = 0x04,
INPUT_CVBS_VI2B,
INPUT_CVBS_VI2C,
INPUT_CVBS_VI3A = 0x08,
INPUT_CVBS_VI3B,
INPUT_CVBS_VI3C,
INPUT_CVBS_VI4A = 0x0C,
/*
* S-Video input selection
*/
INPUT_SVIDEO_VI2A_VI1A = 0x44,
INPUT_SVIDEO_VI2B_VI1B,
INPUT_SVIDEO_VI2C_VI1C,
INPUT_SVIDEO_VI2A_VI3A = 0x54,
INPUT_SVIDEO_VI2B_VI3B,
INPUT_SVIDEO_VI2C_VI3C,
INPUT_SVIDEO_VI4A_VI1A = 0x4C,
INPUT_SVIDEO_VI4A_VI1B,
INPUT_SVIDEO_VI4A_VI1C,
INPUT_SVIDEO_VI4A_VI3A = 0x5C,
INPUT_SVIDEO_VI4A_VI3B,
INPUT_SVIDEO_VI4A_VI3C,
/* Need to add entries for
* RGB, YPbPr and SCART.
*/
INPUT_INVALID
};
/**
* enum tvp514x_output - enum for output format
* supported.
*
*/
enum tvp514x_output {
OUTPUT_10BIT_422_EMBEDDED_SYNC = 0,
OUTPUT_20BIT_422_SEPERATE_SYNC,
OUTPUT_10BIT_422_SEPERATE_SYNC = 3,
OUTPUT_INVALID
};
/**
* struct tvp514x_platform_data - Platform data values and access functions.
* @clk_polarity: Clock polarity of the current interface.
* @hs_polarity: HSYNC Polarity configuration for current interface.
* @vs_polarity: VSYNC Polarity configuration for current interface.
*/
struct tvp514x_platform_data {
/* Interface control params */
bool clk_polarity;
bool hs_polarity;
bool vs_polarity;
};
#endif /* ifndef _TVP514X_H */

34
include/media/tvp5150.h Normal file
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/*
tvp5150.h - definition for tvp5150 inputs
Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl)
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _TVP5150_H_
#define _TVP5150_H_
/* TVP5150 HW inputs */
#define TVP5150_COMPOSITE0 0
#define TVP5150_COMPOSITE1 1
#define TVP5150_SVIDEO 2
/* TVP5150 HW outputs */
#define TVP5150_NORMAL 0
#define TVP5150_BLACK_SCREEN 1
#endif

54
include/media/tvp7002.h Normal file
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/* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
* Digitizer with Horizontal PLL registers
*
* Copyright (C) 2009 Texas Instruments Inc
* Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
*
* This code is partially based upon the TVP5150 driver
* written by Mauro Carvalho Chehab (mchehab@infradead.org),
* the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
* and the TVP7002 driver in the TI LSP 2.10.00.14
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _TVP7002_H_
#define _TVP7002_H_
#define TVP7002_MODULE_NAME "tvp7002"
/**
* struct tvp7002_config - Platform dependent data
*@clk_polarity: Clock polarity
* 0 - Data clocked out on rising edge of DATACLK signal
* 1 - Data clocked out on falling edge of DATACLK signal
*@hs_polarity: HSYNC polarity
* 0 - Active low HSYNC output, 1 - Active high HSYNC output
*@vs_polarity: VSYNC Polarity
* 0 - Active low VSYNC output, 1 - Active high VSYNC output
*@fid_polarity: Active-high Field ID polarity.
* 0 - The field ID output is set to logic 1 for an odd field
* (field 1) and set to logic 0 for an even field (field 0).
* 1 - Operation with polarity inverted.
*@sog_polarity: Active high Sync on Green output polarity.
* 0 - Normal operation, 1 - Operation with polarity inverted
*/
struct tvp7002_config {
bool clk_polarity;
bool hs_polarity;
bool vs_polarity;
bool fid_polarity;
bool sog_polarity;
};
#endif

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