mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-08 09:08:05 -04:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
43
sound/arm/Kconfig
Normal file
43
sound/arm/Kconfig
Normal file
|
|
@ -0,0 +1,43 @@
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# ALSA ARM drivers
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menuconfig SND_ARM
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bool "ARM sound devices"
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depends on ARM
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default y
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help
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Support for sound devices specific to ARM architectures.
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Drivers that are implemented on ASoC can be found in
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"ALSA for SoC audio support" section.
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if SND_ARM
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config SND_ARMAACI
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tristate "ARM PrimeCell PL041 AC Link support"
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depends on ARM_AMBA
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select SND_PCM
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select SND_AC97_CODEC
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config SND_PXA2XX_PCM
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tristate
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select SND_PCM
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config SND_PXA2XX_LIB
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tristate
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select SND_AC97_CODEC if SND_PXA2XX_LIB_AC97
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config SND_PXA2XX_LIB_AC97
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bool
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config SND_PXA2XX_AC97
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tristate "AC97 driver for the Intel PXA2xx chip"
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depends on ARCH_PXA
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select SND_PXA2XX_PCM
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select SND_AC97_CODEC
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select SND_PXA2XX_LIB
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select SND_PXA2XX_LIB_AC97
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help
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Say Y or M if you want to support any AC97 codec attached to
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the PXA2xx AC97 interface.
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endif # SND_ARM
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16
sound/arm/Makefile
Normal file
16
sound/arm/Makefile
Normal file
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@ -0,0 +1,16 @@
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#
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# Makefile for ALSA
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#
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obj-$(CONFIG_SND_ARMAACI) += snd-aaci.o
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snd-aaci-objs := aaci.o
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obj-$(CONFIG_SND_PXA2XX_PCM) += snd-pxa2xx-pcm.o
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snd-pxa2xx-pcm-objs := pxa2xx-pcm.o
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obj-$(CONFIG_SND_PXA2XX_LIB) += snd-pxa2xx-lib.o
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snd-pxa2xx-lib-y := pxa2xx-pcm-lib.o
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snd-pxa2xx-lib-$(CONFIG_SND_PXA2XX_LIB_AC97) += pxa2xx-ac97-lib.o
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obj-$(CONFIG_SND_PXA2XX_AC97) += snd-pxa2xx-ac97.o
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snd-pxa2xx-ac97-objs := pxa2xx-ac97.o
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1111
sound/arm/aaci.c
Normal file
1111
sound/arm/aaci.c
Normal file
File diff suppressed because it is too large
Load diff
250
sound/arm/aaci.h
Normal file
250
sound/arm/aaci.h
Normal file
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@ -0,0 +1,250 @@
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/*
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* linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
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*
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* Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef AACI_H
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#define AACI_H
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/*
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* Control and status register offsets
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* P39.
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*/
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#define AACI_CSCH1 0x000
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#define AACI_CSCH2 0x014
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#define AACI_CSCH3 0x028
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#define AACI_CSCH4 0x03c
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#define AACI_RXCR 0x000 /* 29 bits Control Rx FIFO */
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#define AACI_TXCR 0x004 /* 17 bits Control Tx FIFO */
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#define AACI_SR 0x008 /* 12 bits Status */
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#define AACI_ISR 0x00c /* 7 bits Int Status */
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#define AACI_IE 0x010 /* 7 bits Int Enable */
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/*
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* Other registers
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*/
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#define AACI_SL1RX 0x050
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#define AACI_SL1TX 0x054
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#define AACI_SL2RX 0x058
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#define AACI_SL2TX 0x05c
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#define AACI_SL12RX 0x060
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#define AACI_SL12TX 0x064
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#define AACI_SLFR 0x068 /* slot flags */
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#define AACI_SLISTAT 0x06c /* slot interrupt status */
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#define AACI_SLIEN 0x070 /* slot interrupt enable */
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#define AACI_INTCLR 0x074 /* interrupt clear */
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#define AACI_MAINCR 0x078 /* main control */
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#define AACI_RESET 0x07c /* reset control */
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#define AACI_SYNC 0x080 /* sync control */
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#define AACI_ALLINTS 0x084 /* all fifo interrupt status */
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#define AACI_MAINFR 0x088 /* main flag register */
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#define AACI_DR1 0x090 /* data read/written fifo 1 */
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#define AACI_DR2 0x0b0 /* data read/written fifo 2 */
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#define AACI_DR3 0x0d0 /* data read/written fifo 3 */
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#define AACI_DR4 0x0f0 /* data read/written fifo 4 */
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/*
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* TX/RX fifo control register (CR). P48
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*/
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#define CR_FEN (1 << 16) /* fifo enable */
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#define CR_COMPACT (1 << 15) /* compact mode */
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#define CR_SZ16 (0 << 13) /* 16 bits */
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#define CR_SZ18 (1 << 13) /* 18 bits */
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#define CR_SZ20 (2 << 13) /* 20 bits */
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#define CR_SZ12 (3 << 13) /* 12 bits */
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#define CR_SL12 (1 << 12)
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#define CR_SL11 (1 << 11)
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#define CR_SL10 (1 << 10)
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#define CR_SL9 (1 << 9)
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#define CR_SL8 (1 << 8)
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#define CR_SL7 (1 << 7)
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#define CR_SL6 (1 << 6)
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#define CR_SL5 (1 << 5)
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#define CR_SL4 (1 << 4)
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#define CR_SL3 (1 << 3)
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#define CR_SL2 (1 << 2)
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#define CR_SL1 (1 << 1)
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#define CR_EN (1 << 0) /* transmit enable */
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/*
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* status register bits. P49
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*/
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#define SR_RXTOFE (1 << 11) /* rx timeout fifo empty */
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#define SR_TXTO (1 << 10) /* rx timeout fifo nonempty */
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#define SR_TXU (1 << 9) /* tx underrun */
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#define SR_RXO (1 << 8) /* rx overrun */
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#define SR_TXB (1 << 7) /* tx busy */
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#define SR_RXB (1 << 6) /* rx busy */
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#define SR_TXFF (1 << 5) /* tx fifo full */
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#define SR_RXFF (1 << 4) /* rx fifo full */
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#define SR_TXHE (1 << 3) /* tx fifo half empty */
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#define SR_RXHF (1 << 2) /* rx fifo half full */
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#define SR_TXFE (1 << 1) /* tx fifo empty */
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#define SR_RXFE (1 << 0) /* rx fifo empty */
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/*
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* interrupt status register bits.
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*/
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#define ISR_RXTOFEINTR (1 << 6) /* rx fifo empty */
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#define ISR_URINTR (1 << 5) /* tx underflow */
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#define ISR_ORINTR (1 << 4) /* rx overflow */
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#define ISR_RXINTR (1 << 3) /* rx fifo */
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#define ISR_TXINTR (1 << 2) /* tx fifo intr */
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#define ISR_RXTOINTR (1 << 1) /* tx timeout */
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#define ISR_TXCINTR (1 << 0) /* tx complete */
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/*
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* interrupt enable register bits.
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*/
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#define IE_RXTOIE (1 << 6)
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#define IE_URIE (1 << 5)
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#define IE_ORIE (1 << 4)
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#define IE_RXIE (1 << 3)
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#define IE_TXIE (1 << 2)
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#define IE_RXTIE (1 << 1)
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#define IE_TXCIE (1 << 0)
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/*
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* interrupt status. P51
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*/
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#define ISR_RXTOFE (1 << 6) /* rx timeout fifo empty */
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#define ISR_UR (1 << 5) /* tx fifo underrun */
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#define ISR_OR (1 << 4) /* rx fifo overrun */
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#define ISR_RX (1 << 3) /* rx interrupt status */
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#define ISR_TX (1 << 2) /* tx interrupt status */
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#define ISR_RXTO (1 << 1) /* rx timeout */
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#define ISR_TXC (1 << 0) /* tx complete */
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/*
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* interrupt enable. P52
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*/
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#define IE_RXTOFE (1 << 6) /* rx timeout fifo empty */
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#define IE_UR (1 << 5) /* tx fifo underrun */
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#define IE_OR (1 << 4) /* rx fifo overrun */
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#define IE_RX (1 << 3) /* rx interrupt status */
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#define IE_TX (1 << 2) /* tx interrupt status */
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#define IE_RXTO (1 << 1) /* rx timeout */
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#define IE_TXC (1 << 0) /* tx complete */
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/*
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* slot flag register bits. P56
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*/
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#define SLFR_RWIS (1 << 13) /* raw wake-up interrupt status */
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#define SLFR_RGPIOINTR (1 << 12) /* raw gpio interrupt */
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#define SLFR_12TXE (1 << 11) /* slot 12 tx empty */
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#define SLFR_12RXV (1 << 10) /* slot 12 rx valid */
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#define SLFR_2TXE (1 << 9) /* slot 2 tx empty */
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#define SLFR_2RXV (1 << 8) /* slot 2 rx valid */
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#define SLFR_1TXE (1 << 7) /* slot 1 tx empty */
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#define SLFR_1RXV (1 << 6) /* slot 1 rx valid */
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#define SLFR_12TXB (1 << 5) /* slot 12 tx busy */
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#define SLFR_12RXB (1 << 4) /* slot 12 rx busy */
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#define SLFR_2TXB (1 << 3) /* slot 2 tx busy */
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#define SLFR_2RXB (1 << 2) /* slot 2 rx busy */
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#define SLFR_1TXB (1 << 1) /* slot 1 tx busy */
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#define SLFR_1RXB (1 << 0) /* slot 1 rx busy */
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/*
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* Interrupt clear register.
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*/
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#define ICLR_RXTOFEC4 (1 << 12)
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#define ICLR_RXTOFEC3 (1 << 11)
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#define ICLR_RXTOFEC2 (1 << 10)
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#define ICLR_RXTOFEC1 (1 << 9)
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#define ICLR_TXUEC4 (1 << 8)
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#define ICLR_TXUEC3 (1 << 7)
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#define ICLR_TXUEC2 (1 << 6)
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#define ICLR_TXUEC1 (1 << 5)
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#define ICLR_RXOEC4 (1 << 4)
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#define ICLR_RXOEC3 (1 << 3)
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#define ICLR_RXOEC2 (1 << 2)
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#define ICLR_RXOEC1 (1 << 1)
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#define ICLR_WISC (1 << 0)
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|
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/*
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* Main control register bits. P62
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*/
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#define MAINCR_SCRA(x) ((x) << 10) /* secondary codec reg access */
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#define MAINCR_DMAEN (1 << 9) /* dma enable */
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#define MAINCR_SL12TXEN (1 << 8) /* slot 12 transmit enable */
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#define MAINCR_SL12RXEN (1 << 7) /* slot 12 receive enable */
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#define MAINCR_SL2TXEN (1 << 6) /* slot 2 transmit enable */
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#define MAINCR_SL2RXEN (1 << 5) /* slot 2 receive enable */
|
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#define MAINCR_SL1TXEN (1 << 4) /* slot 1 transmit enable */
|
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#define MAINCR_SL1RXEN (1 << 3) /* slot 1 receive enable */
|
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#define MAINCR_LPM (1 << 2) /* low power mode */
|
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#define MAINCR_LOOPBK (1 << 1) /* loopback */
|
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#define MAINCR_IE (1 << 0) /* aaci interface enable */
|
||||
|
||||
/*
|
||||
* Reset register bits. P65
|
||||
*/
|
||||
#define RESET_NRST (1 << 0)
|
||||
|
||||
/*
|
||||
* Sync register bits. P65
|
||||
*/
|
||||
#define SYNC_FORCE (1 << 0)
|
||||
|
||||
/*
|
||||
* Main flag register bits. P66
|
||||
*/
|
||||
#define MAINFR_TXB (1 << 1) /* transmit busy */
|
||||
#define MAINFR_RXB (1 << 0) /* receive busy */
|
||||
|
||||
|
||||
|
||||
struct aaci_runtime {
|
||||
void __iomem *base;
|
||||
void __iomem *fifo;
|
||||
spinlock_t lock;
|
||||
|
||||
struct ac97_pcm *pcm;
|
||||
int pcm_open;
|
||||
|
||||
u32 cr;
|
||||
struct snd_pcm_substream *substream;
|
||||
|
||||
unsigned int period; /* byte size of a "period" */
|
||||
|
||||
/*
|
||||
* PIO support
|
||||
*/
|
||||
void *start;
|
||||
void *end;
|
||||
void *ptr;
|
||||
int bytes;
|
||||
unsigned int fifo_bytes;
|
||||
};
|
||||
|
||||
struct aaci {
|
||||
struct amba_device *dev;
|
||||
struct snd_card *card;
|
||||
void __iomem *base;
|
||||
unsigned int fifo_depth;
|
||||
unsigned int users;
|
||||
struct mutex irq_lock;
|
||||
|
||||
/* AC'97 */
|
||||
struct mutex ac97_sem;
|
||||
struct snd_ac97_bus *ac97_bus;
|
||||
struct snd_ac97 *ac97;
|
||||
|
||||
u32 maincr;
|
||||
|
||||
struct aaci_runtime playback;
|
||||
struct aaci_runtime capture;
|
||||
|
||||
struct snd_pcm *pcm;
|
||||
};
|
||||
|
||||
#define ACSTREAM_FRONT 0
|
||||
#define ACSTREAM_SURROUND 1
|
||||
#define ACSTREAM_LFE 2
|
||||
|
||||
#endif
|
||||
415
sound/arm/pxa2xx-ac97-lib.c
Normal file
415
sound/arm/pxa2xx-ac97-lib.c
Normal file
|
|
@ -0,0 +1,415 @@
|
|||
/*
|
||||
* Based on sound/arm/pxa2xx-ac97.c and sound/soc/pxa/pxa2xx-ac97.c
|
||||
* which contain:
|
||||
*
|
||||
* Author: Nicolas Pitre
|
||||
* Created: Dec 02, 2004
|
||||
* Copyright: MontaVista Software Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <sound/ac97_codec.h>
|
||||
#include <sound/pxa2xx-lib.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/regs-ac97.h>
|
||||
#include <mach/audio.h>
|
||||
|
||||
static DEFINE_MUTEX(car_mutex);
|
||||
static DECLARE_WAIT_QUEUE_HEAD(gsr_wq);
|
||||
static volatile long gsr_bits;
|
||||
static struct clk *ac97_clk;
|
||||
static struct clk *ac97conf_clk;
|
||||
static int reset_gpio;
|
||||
|
||||
extern void pxa27x_configure_ac97reset(int reset_gpio, bool to_gpio);
|
||||
|
||||
/*
|
||||
* Beware PXA27x bugs:
|
||||
*
|
||||
* o Slot 12 read from modem space will hang controller.
|
||||
* o CDONE, SDONE interrupt fails after any slot 12 IO.
|
||||
*
|
||||
* We therefore have an hybrid approach for waiting on SDONE (interrupt or
|
||||
* 1 jiffy timeout if interrupt never comes).
|
||||
*/
|
||||
|
||||
unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
|
||||
{
|
||||
unsigned short val = -1;
|
||||
volatile u32 *reg_addr;
|
||||
|
||||
mutex_lock(&car_mutex);
|
||||
|
||||
/* set up primary or secondary codec space */
|
||||
if (cpu_is_pxa25x() && reg == AC97_GPIO_STATUS)
|
||||
reg_addr = ac97->num ? &SMC_REG_BASE : &PMC_REG_BASE;
|
||||
else
|
||||
reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE;
|
||||
reg_addr += (reg >> 1);
|
||||
|
||||
/* start read access across the ac97 link */
|
||||
GSR = GSR_CDONE | GSR_SDONE;
|
||||
gsr_bits = 0;
|
||||
val = *reg_addr;
|
||||
if (reg == AC97_GPIO_STATUS)
|
||||
goto out;
|
||||
if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1) <= 0 &&
|
||||
!((GSR | gsr_bits) & GSR_SDONE)) {
|
||||
printk(KERN_ERR "%s: read error (ac97_reg=%d GSR=%#lx)\n",
|
||||
__func__, reg, GSR | gsr_bits);
|
||||
val = -1;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* valid data now */
|
||||
GSR = GSR_CDONE | GSR_SDONE;
|
||||
gsr_bits = 0;
|
||||
val = *reg_addr;
|
||||
/* but we've just started another cycle... */
|
||||
wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_SDONE, 1);
|
||||
|
||||
out: mutex_unlock(&car_mutex);
|
||||
return val;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pxa2xx_ac97_read);
|
||||
|
||||
void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
|
||||
unsigned short val)
|
||||
{
|
||||
volatile u32 *reg_addr;
|
||||
|
||||
mutex_lock(&car_mutex);
|
||||
|
||||
/* set up primary or secondary codec space */
|
||||
if (cpu_is_pxa25x() && reg == AC97_GPIO_STATUS)
|
||||
reg_addr = ac97->num ? &SMC_REG_BASE : &PMC_REG_BASE;
|
||||
else
|
||||
reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE;
|
||||
reg_addr += (reg >> 1);
|
||||
|
||||
GSR = GSR_CDONE | GSR_SDONE;
|
||||
gsr_bits = 0;
|
||||
*reg_addr = val;
|
||||
if (wait_event_timeout(gsr_wq, (GSR | gsr_bits) & GSR_CDONE, 1) <= 0 &&
|
||||
!((GSR | gsr_bits) & GSR_CDONE))
|
||||
printk(KERN_ERR "%s: write error (ac97_reg=%d GSR=%#lx)\n",
|
||||
__func__, reg, GSR | gsr_bits);
|
||||
|
||||
mutex_unlock(&car_mutex);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pxa2xx_ac97_write);
|
||||
|
||||
#ifdef CONFIG_PXA25x
|
||||
static inline void pxa_ac97_warm_pxa25x(void)
|
||||
{
|
||||
gsr_bits = 0;
|
||||
|
||||
GCR |= GCR_WARM_RST;
|
||||
}
|
||||
|
||||
static inline void pxa_ac97_cold_pxa25x(void)
|
||||
{
|
||||
GCR &= GCR_COLD_RST; /* clear everything but nCRST */
|
||||
GCR &= ~GCR_COLD_RST; /* then assert nCRST */
|
||||
|
||||
gsr_bits = 0;
|
||||
|
||||
GCR = GCR_COLD_RST;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PXA27x
|
||||
static inline void pxa_ac97_warm_pxa27x(void)
|
||||
{
|
||||
gsr_bits = 0;
|
||||
|
||||
/* warm reset broken on Bulverde, so manually keep AC97 reset high */
|
||||
pxa27x_configure_ac97reset(reset_gpio, true);
|
||||
udelay(10);
|
||||
GCR |= GCR_WARM_RST;
|
||||
pxa27x_configure_ac97reset(reset_gpio, false);
|
||||
udelay(500);
|
||||
}
|
||||
|
||||
static inline void pxa_ac97_cold_pxa27x(void)
|
||||
{
|
||||
GCR &= GCR_COLD_RST; /* clear everything but nCRST */
|
||||
GCR &= ~GCR_COLD_RST; /* then assert nCRST */
|
||||
|
||||
gsr_bits = 0;
|
||||
|
||||
/* PXA27x Developers Manual section 13.5.2.2.1 */
|
||||
clk_prepare_enable(ac97conf_clk);
|
||||
udelay(5);
|
||||
clk_disable_unprepare(ac97conf_clk);
|
||||
GCR = GCR_COLD_RST | GCR_WARM_RST;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PXA3xx
|
||||
static inline void pxa_ac97_warm_pxa3xx(void)
|
||||
{
|
||||
gsr_bits = 0;
|
||||
|
||||
/* Can't use interrupts */
|
||||
GCR |= GCR_WARM_RST;
|
||||
}
|
||||
|
||||
static inline void pxa_ac97_cold_pxa3xx(void)
|
||||
{
|
||||
/* Hold CLKBPB for 100us */
|
||||
GCR = 0;
|
||||
GCR = GCR_CLKBPB;
|
||||
udelay(100);
|
||||
GCR = 0;
|
||||
|
||||
GCR &= GCR_COLD_RST; /* clear everything but nCRST */
|
||||
GCR &= ~GCR_COLD_RST; /* then assert nCRST */
|
||||
|
||||
gsr_bits = 0;
|
||||
|
||||
/* Can't use interrupts on PXA3xx */
|
||||
GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
|
||||
|
||||
GCR = GCR_WARM_RST | GCR_COLD_RST;
|
||||
}
|
||||
#endif
|
||||
|
||||
bool pxa2xx_ac97_try_warm_reset(struct snd_ac97 *ac97)
|
||||
{
|
||||
unsigned long gsr;
|
||||
unsigned int timeout = 100;
|
||||
|
||||
#ifdef CONFIG_PXA25x
|
||||
if (cpu_is_pxa25x())
|
||||
pxa_ac97_warm_pxa25x();
|
||||
else
|
||||
#endif
|
||||
#ifdef CONFIG_PXA27x
|
||||
if (cpu_is_pxa27x())
|
||||
pxa_ac97_warm_pxa27x();
|
||||
else
|
||||
#endif
|
||||
#ifdef CONFIG_PXA3xx
|
||||
if (cpu_is_pxa3xx())
|
||||
pxa_ac97_warm_pxa3xx();
|
||||
else
|
||||
#endif
|
||||
snd_BUG();
|
||||
|
||||
while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--)
|
||||
mdelay(1);
|
||||
|
||||
gsr = GSR | gsr_bits;
|
||||
if (!(gsr & (GSR_PCR | GSR_SCR))) {
|
||||
printk(KERN_INFO "%s: warm reset timeout (GSR=%#lx)\n",
|
||||
__func__, gsr);
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pxa2xx_ac97_try_warm_reset);
|
||||
|
||||
bool pxa2xx_ac97_try_cold_reset(struct snd_ac97 *ac97)
|
||||
{
|
||||
unsigned long gsr;
|
||||
unsigned int timeout = 1000;
|
||||
|
||||
#ifdef CONFIG_PXA25x
|
||||
if (cpu_is_pxa25x())
|
||||
pxa_ac97_cold_pxa25x();
|
||||
else
|
||||
#endif
|
||||
#ifdef CONFIG_PXA27x
|
||||
if (cpu_is_pxa27x())
|
||||
pxa_ac97_cold_pxa27x();
|
||||
else
|
||||
#endif
|
||||
#ifdef CONFIG_PXA3xx
|
||||
if (cpu_is_pxa3xx())
|
||||
pxa_ac97_cold_pxa3xx();
|
||||
else
|
||||
#endif
|
||||
snd_BUG();
|
||||
|
||||
while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--)
|
||||
mdelay(1);
|
||||
|
||||
gsr = GSR | gsr_bits;
|
||||
if (!(gsr & (GSR_PCR | GSR_SCR))) {
|
||||
printk(KERN_INFO "%s: cold reset timeout (GSR=%#lx)\n",
|
||||
__func__, gsr);
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pxa2xx_ac97_try_cold_reset);
|
||||
|
||||
|
||||
void pxa2xx_ac97_finish_reset(struct snd_ac97 *ac97)
|
||||
{
|
||||
GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
|
||||
GCR |= GCR_SDONE_IE|GCR_CDONE_IE;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pxa2xx_ac97_finish_reset);
|
||||
|
||||
static irqreturn_t pxa2xx_ac97_irq(int irq, void *dev_id)
|
||||
{
|
||||
long status;
|
||||
|
||||
status = GSR;
|
||||
if (status) {
|
||||
GSR = status;
|
||||
gsr_bits |= status;
|
||||
wake_up(&gsr_wq);
|
||||
|
||||
/* Although we don't use those we still need to clear them
|
||||
since they tend to spuriously trigger when MMC is used
|
||||
(hardware bug? go figure)... */
|
||||
if (cpu_is_pxa27x()) {
|
||||
MISR = MISR_EOC;
|
||||
PISR = PISR_EOC;
|
||||
MCSR = MCSR_EOC;
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
int pxa2xx_ac97_hw_suspend(void)
|
||||
{
|
||||
GCR |= GCR_ACLINK_OFF;
|
||||
clk_disable_unprepare(ac97_clk);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_suspend);
|
||||
|
||||
int pxa2xx_ac97_hw_resume(void)
|
||||
{
|
||||
clk_prepare_enable(ac97_clk);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_resume);
|
||||
#endif
|
||||
|
||||
int pxa2xx_ac97_hw_probe(struct platform_device *dev)
|
||||
{
|
||||
int ret;
|
||||
pxa2xx_audio_ops_t *pdata = dev->dev.platform_data;
|
||||
|
||||
if (pdata) {
|
||||
switch (pdata->reset_gpio) {
|
||||
case 95:
|
||||
case 113:
|
||||
reset_gpio = pdata->reset_gpio;
|
||||
break;
|
||||
case 0:
|
||||
reset_gpio = 113;
|
||||
break;
|
||||
case -1:
|
||||
break;
|
||||
default:
|
||||
dev_err(&dev->dev, "Invalid reset GPIO %d\n",
|
||||
pdata->reset_gpio);
|
||||
}
|
||||
} else {
|
||||
if (cpu_is_pxa27x())
|
||||
reset_gpio = 113;
|
||||
}
|
||||
|
||||
if (cpu_is_pxa27x()) {
|
||||
/*
|
||||
* This gpio is needed for a work-around to a bug in the ac97
|
||||
* controller during warm reset. The direction and level is set
|
||||
* here so that it is an output driven high when switching from
|
||||
* AC97_nRESET alt function to generic gpio.
|
||||
*/
|
||||
ret = gpio_request_one(reset_gpio, GPIOF_OUT_INIT_HIGH,
|
||||
"pxa27x ac97 reset");
|
||||
if (ret < 0) {
|
||||
pr_err("%s: gpio_request_one() failed: %d\n",
|
||||
__func__, ret);
|
||||
goto err_conf;
|
||||
}
|
||||
pxa27x_configure_ac97reset(reset_gpio, false);
|
||||
|
||||
ac97conf_clk = clk_get(&dev->dev, "AC97CONFCLK");
|
||||
if (IS_ERR(ac97conf_clk)) {
|
||||
ret = PTR_ERR(ac97conf_clk);
|
||||
ac97conf_clk = NULL;
|
||||
goto err_conf;
|
||||
}
|
||||
}
|
||||
|
||||
ac97_clk = clk_get(&dev->dev, "AC97CLK");
|
||||
if (IS_ERR(ac97_clk)) {
|
||||
ret = PTR_ERR(ac97_clk);
|
||||
ac97_clk = NULL;
|
||||
goto err_clk;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(ac97_clk);
|
||||
if (ret)
|
||||
goto err_clk2;
|
||||
|
||||
ret = request_irq(IRQ_AC97, pxa2xx_ac97_irq, 0, "AC97", NULL);
|
||||
if (ret < 0)
|
||||
goto err_irq;
|
||||
|
||||
return 0;
|
||||
|
||||
err_irq:
|
||||
GCR |= GCR_ACLINK_OFF;
|
||||
err_clk2:
|
||||
clk_put(ac97_clk);
|
||||
ac97_clk = NULL;
|
||||
err_clk:
|
||||
if (ac97conf_clk) {
|
||||
clk_put(ac97conf_clk);
|
||||
ac97conf_clk = NULL;
|
||||
}
|
||||
err_conf:
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_probe);
|
||||
|
||||
void pxa2xx_ac97_hw_remove(struct platform_device *dev)
|
||||
{
|
||||
if (cpu_is_pxa27x())
|
||||
gpio_free(reset_gpio);
|
||||
GCR |= GCR_ACLINK_OFF;
|
||||
free_irq(IRQ_AC97, NULL);
|
||||
if (ac97conf_clk) {
|
||||
clk_put(ac97conf_clk);
|
||||
ac97conf_clk = NULL;
|
||||
}
|
||||
clk_disable_unprepare(ac97_clk);
|
||||
clk_put(ac97_clk);
|
||||
ac97_clk = NULL;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(pxa2xx_ac97_hw_remove);
|
||||
|
||||
MODULE_AUTHOR("Nicolas Pitre");
|
||||
MODULE_DESCRIPTION("Intel/Marvell PXA sound library");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
256
sound/arm/pxa2xx-ac97.c
Normal file
256
sound/arm/pxa2xx-ac97.c
Normal file
|
|
@ -0,0 +1,256 @@
|
|||
/*
|
||||
* linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
|
||||
*
|
||||
* Author: Nicolas Pitre
|
||||
* Created: Dec 02, 2004
|
||||
* Copyright: MontaVista Software Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/dmaengine.h>
|
||||
|
||||
#include <sound/core.h>
|
||||
#include <sound/pcm.h>
|
||||
#include <sound/ac97_codec.h>
|
||||
#include <sound/initval.h>
|
||||
#include <sound/pxa2xx-lib.h>
|
||||
#include <sound/dmaengine_pcm.h>
|
||||
|
||||
#include <mach/regs-ac97.h>
|
||||
#include <mach/audio.h>
|
||||
|
||||
#include "pxa2xx-pcm.h"
|
||||
|
||||
static void pxa2xx_ac97_reset(struct snd_ac97 *ac97)
|
||||
{
|
||||
if (!pxa2xx_ac97_try_cold_reset(ac97)) {
|
||||
pxa2xx_ac97_try_warm_reset(ac97);
|
||||
}
|
||||
|
||||
pxa2xx_ac97_finish_reset(ac97);
|
||||
}
|
||||
|
||||
static struct snd_ac97_bus_ops pxa2xx_ac97_ops = {
|
||||
.read = pxa2xx_ac97_read,
|
||||
.write = pxa2xx_ac97_write,
|
||||
.reset = pxa2xx_ac97_reset,
|
||||
};
|
||||
|
||||
static unsigned long pxa2xx_ac97_pcm_out_req = 12;
|
||||
static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_out = {
|
||||
.addr = __PREG(PCDR),
|
||||
.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
|
||||
.maxburst = 32,
|
||||
.filter_data = &pxa2xx_ac97_pcm_out_req,
|
||||
};
|
||||
|
||||
static unsigned long pxa2xx_ac97_pcm_in_req = 11;
|
||||
static struct snd_dmaengine_dai_dma_data pxa2xx_ac97_pcm_in = {
|
||||
.addr = __PREG(PCDR),
|
||||
.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,
|
||||
.maxburst = 32,
|
||||
.filter_data = &pxa2xx_ac97_pcm_in_req,
|
||||
};
|
||||
|
||||
static struct snd_pcm *pxa2xx_ac97_pcm;
|
||||
static struct snd_ac97 *pxa2xx_ac97_ac97;
|
||||
|
||||
static int pxa2xx_ac97_pcm_startup(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
pxa2xx_audio_ops_t *platform_ops;
|
||||
int r;
|
||||
|
||||
runtime->hw.channels_min = 2;
|
||||
runtime->hw.channels_max = 2;
|
||||
|
||||
r = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
|
||||
AC97_RATES_FRONT_DAC : AC97_RATES_ADC;
|
||||
runtime->hw.rates = pxa2xx_ac97_ac97->rates[r];
|
||||
snd_pcm_limit_hw_rates(runtime);
|
||||
|
||||
platform_ops = substream->pcm->card->dev->platform_data;
|
||||
if (platform_ops && platform_ops->startup)
|
||||
return platform_ops->startup(substream, platform_ops->priv);
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pxa2xx_ac97_pcm_shutdown(struct snd_pcm_substream *substream)
|
||||
{
|
||||
pxa2xx_audio_ops_t *platform_ops;
|
||||
|
||||
platform_ops = substream->pcm->card->dev->platform_data;
|
||||
if (platform_ops && platform_ops->shutdown)
|
||||
platform_ops->shutdown(substream, platform_ops->priv);
|
||||
}
|
||||
|
||||
static int pxa2xx_ac97_pcm_prepare(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
int reg = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
|
||||
AC97_PCM_FRONT_DAC_RATE : AC97_PCM_LR_ADC_RATE;
|
||||
return snd_ac97_set_rate(pxa2xx_ac97_ac97, reg, runtime->rate);
|
||||
}
|
||||
|
||||
static struct pxa2xx_pcm_client pxa2xx_ac97_pcm_client = {
|
||||
.playback_params = &pxa2xx_ac97_pcm_out,
|
||||
.capture_params = &pxa2xx_ac97_pcm_in,
|
||||
.startup = pxa2xx_ac97_pcm_startup,
|
||||
.shutdown = pxa2xx_ac97_pcm_shutdown,
|
||||
.prepare = pxa2xx_ac97_pcm_prepare,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
|
||||
static int pxa2xx_ac97_do_suspend(struct snd_card *card)
|
||||
{
|
||||
pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
|
||||
|
||||
snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
|
||||
snd_pcm_suspend_all(pxa2xx_ac97_pcm);
|
||||
snd_ac97_suspend(pxa2xx_ac97_ac97);
|
||||
if (platform_ops && platform_ops->suspend)
|
||||
platform_ops->suspend(platform_ops->priv);
|
||||
|
||||
return pxa2xx_ac97_hw_suspend();
|
||||
}
|
||||
|
||||
static int pxa2xx_ac97_do_resume(struct snd_card *card)
|
||||
{
|
||||
pxa2xx_audio_ops_t *platform_ops = card->dev->platform_data;
|
||||
int rc;
|
||||
|
||||
rc = pxa2xx_ac97_hw_resume();
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
if (platform_ops && platform_ops->resume)
|
||||
platform_ops->resume(platform_ops->priv);
|
||||
snd_ac97_resume(pxa2xx_ac97_ac97);
|
||||
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int pxa2xx_ac97_suspend(struct device *dev)
|
||||
{
|
||||
struct snd_card *card = dev_get_drvdata(dev);
|
||||
int ret = 0;
|
||||
|
||||
if (card)
|
||||
ret = pxa2xx_ac97_do_suspend(card);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int pxa2xx_ac97_resume(struct device *dev)
|
||||
{
|
||||
struct snd_card *card = dev_get_drvdata(dev);
|
||||
int ret = 0;
|
||||
|
||||
if (card)
|
||||
ret = pxa2xx_ac97_do_resume(card);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static SIMPLE_DEV_PM_OPS(pxa2xx_ac97_pm_ops, pxa2xx_ac97_suspend, pxa2xx_ac97_resume);
|
||||
#endif
|
||||
|
||||
static int pxa2xx_ac97_probe(struct platform_device *dev)
|
||||
{
|
||||
struct snd_card *card;
|
||||
struct snd_ac97_bus *ac97_bus;
|
||||
struct snd_ac97_template ac97_template;
|
||||
int ret;
|
||||
pxa2xx_audio_ops_t *pdata = dev->dev.platform_data;
|
||||
|
||||
if (dev->id >= 0) {
|
||||
dev_err(&dev->dev, "PXA2xx has only one AC97 port.\n");
|
||||
ret = -ENXIO;
|
||||
goto err_dev;
|
||||
}
|
||||
|
||||
ret = snd_card_new(&dev->dev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
|
||||
THIS_MODULE, 0, &card);
|
||||
if (ret < 0)
|
||||
goto err;
|
||||
|
||||
strlcpy(card->driver, dev->dev.driver->name, sizeof(card->driver));
|
||||
|
||||
ret = pxa2xx_pcm_new(card, &pxa2xx_ac97_pcm_client, &pxa2xx_ac97_pcm);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
ret = pxa2xx_ac97_hw_probe(dev);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
ret = snd_ac97_bus(card, 0, &pxa2xx_ac97_ops, NULL, &ac97_bus);
|
||||
if (ret)
|
||||
goto err_remove;
|
||||
memset(&ac97_template, 0, sizeof(ac97_template));
|
||||
ret = snd_ac97_mixer(ac97_bus, &ac97_template, &pxa2xx_ac97_ac97);
|
||||
if (ret)
|
||||
goto err_remove;
|
||||
|
||||
snprintf(card->shortname, sizeof(card->shortname),
|
||||
"%s", snd_ac97_get_short_name(pxa2xx_ac97_ac97));
|
||||
snprintf(card->longname, sizeof(card->longname),
|
||||
"%s (%s)", dev->dev.driver->name, card->mixername);
|
||||
|
||||
if (pdata && pdata->codec_pdata[0])
|
||||
snd_ac97_dev_add_pdata(ac97_bus->codec[0], pdata->codec_pdata[0]);
|
||||
ret = snd_card_register(card);
|
||||
if (ret == 0) {
|
||||
platform_set_drvdata(dev, card);
|
||||
return 0;
|
||||
}
|
||||
|
||||
err_remove:
|
||||
pxa2xx_ac97_hw_remove(dev);
|
||||
err:
|
||||
if (card)
|
||||
snd_card_free(card);
|
||||
err_dev:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int pxa2xx_ac97_remove(struct platform_device *dev)
|
||||
{
|
||||
struct snd_card *card = platform_get_drvdata(dev);
|
||||
|
||||
if (card) {
|
||||
snd_card_free(card);
|
||||
pxa2xx_ac97_hw_remove(dev);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver pxa2xx_ac97_driver = {
|
||||
.probe = pxa2xx_ac97_probe,
|
||||
.remove = pxa2xx_ac97_remove,
|
||||
.driver = {
|
||||
.name = "pxa2xx-ac97",
|
||||
.owner = THIS_MODULE,
|
||||
#ifdef CONFIG_PM_SLEEP
|
||||
.pm = &pxa2xx_ac97_pm_ops,
|
||||
#endif
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(pxa2xx_ac97_driver);
|
||||
|
||||
MODULE_AUTHOR("Nicolas Pitre");
|
||||
MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("platform:pxa2xx-ac97");
|
||||
321
sound/arm/pxa2xx-pcm-lib.c
Normal file
321
sound/arm/pxa2xx-pcm-lib.c
Normal file
|
|
@ -0,0 +1,321 @@
|
|||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/slab.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/dmaengine.h>
|
||||
|
||||
#include <sound/core.h>
|
||||
#include <sound/pcm.h>
|
||||
#include <sound/pcm_params.h>
|
||||
#include <sound/pxa2xx-lib.h>
|
||||
#include <sound/dmaengine_pcm.h>
|
||||
|
||||
#include <mach/dma.h>
|
||||
|
||||
#include "pxa2xx-pcm.h"
|
||||
|
||||
static const struct snd_pcm_hardware pxa2xx_pcm_hardware = {
|
||||
.info = SNDRV_PCM_INFO_MMAP |
|
||||
SNDRV_PCM_INFO_MMAP_VALID |
|
||||
SNDRV_PCM_INFO_INTERLEAVED |
|
||||
SNDRV_PCM_INFO_PAUSE |
|
||||
SNDRV_PCM_INFO_RESUME,
|
||||
.formats = SNDRV_PCM_FMTBIT_S16_LE |
|
||||
SNDRV_PCM_FMTBIT_S24_LE |
|
||||
SNDRV_PCM_FMTBIT_S32_LE,
|
||||
.period_bytes_min = 32,
|
||||
.period_bytes_max = 8192 - 32,
|
||||
.periods_min = 1,
|
||||
.periods_max = PAGE_SIZE/sizeof(pxa_dma_desc),
|
||||
.buffer_bytes_max = 128 * 1024,
|
||||
.fifo_size = 32,
|
||||
};
|
||||
|
||||
int __pxa2xx_pcm_hw_params(struct snd_pcm_substream *substream,
|
||||
struct snd_pcm_hw_params *params)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
struct pxa2xx_runtime_data *rtd = runtime->private_data;
|
||||
size_t totsize = params_buffer_bytes(params);
|
||||
size_t period = params_period_bytes(params);
|
||||
pxa_dma_desc *dma_desc;
|
||||
dma_addr_t dma_buff_phys, next_desc_phys;
|
||||
u32 dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG;
|
||||
|
||||
/* temporary transition hack */
|
||||
switch (rtd->params->addr_width) {
|
||||
case DMA_SLAVE_BUSWIDTH_1_BYTE:
|
||||
dcmd |= DCMD_WIDTH1;
|
||||
break;
|
||||
case DMA_SLAVE_BUSWIDTH_2_BYTES:
|
||||
dcmd |= DCMD_WIDTH2;
|
||||
break;
|
||||
case DMA_SLAVE_BUSWIDTH_4_BYTES:
|
||||
dcmd |= DCMD_WIDTH4;
|
||||
break;
|
||||
default:
|
||||
/* can't happen */
|
||||
break;
|
||||
}
|
||||
|
||||
switch (rtd->params->maxburst) {
|
||||
case 8:
|
||||
dcmd |= DCMD_BURST8;
|
||||
break;
|
||||
case 16:
|
||||
dcmd |= DCMD_BURST16;
|
||||
break;
|
||||
case 32:
|
||||
dcmd |= DCMD_BURST32;
|
||||
break;
|
||||
}
|
||||
|
||||
snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
|
||||
runtime->dma_bytes = totsize;
|
||||
|
||||
dma_desc = rtd->dma_desc_array;
|
||||
next_desc_phys = rtd->dma_desc_array_phys;
|
||||
dma_buff_phys = runtime->dma_addr;
|
||||
do {
|
||||
next_desc_phys += sizeof(pxa_dma_desc);
|
||||
dma_desc->ddadr = next_desc_phys;
|
||||
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
|
||||
dma_desc->dsadr = dma_buff_phys;
|
||||
dma_desc->dtadr = rtd->params->addr;
|
||||
} else {
|
||||
dma_desc->dsadr = rtd->params->addr;
|
||||
dma_desc->dtadr = dma_buff_phys;
|
||||
}
|
||||
if (period > totsize)
|
||||
period = totsize;
|
||||
dma_desc->dcmd = dcmd | period | DCMD_ENDIRQEN;
|
||||
dma_desc++;
|
||||
dma_buff_phys += period;
|
||||
} while (totsize -= period);
|
||||
dma_desc[-1].ddadr = rtd->dma_desc_array_phys;
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(__pxa2xx_pcm_hw_params);
|
||||
|
||||
int __pxa2xx_pcm_hw_free(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct pxa2xx_runtime_data *rtd = substream->runtime->private_data;
|
||||
|
||||
if (rtd && rtd->params && rtd->params->filter_data) {
|
||||
unsigned long req = *(unsigned long *) rtd->params->filter_data;
|
||||
DRCMR(req) = 0;
|
||||
}
|
||||
|
||||
snd_pcm_set_runtime_buffer(substream, NULL);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(__pxa2xx_pcm_hw_free);
|
||||
|
||||
int pxa2xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
|
||||
{
|
||||
struct pxa2xx_runtime_data *prtd = substream->runtime->private_data;
|
||||
int ret = 0;
|
||||
|
||||
switch (cmd) {
|
||||
case SNDRV_PCM_TRIGGER_START:
|
||||
DDADR(prtd->dma_ch) = prtd->dma_desc_array_phys;
|
||||
DCSR(prtd->dma_ch) = DCSR_RUN;
|
||||
break;
|
||||
|
||||
case SNDRV_PCM_TRIGGER_STOP:
|
||||
case SNDRV_PCM_TRIGGER_SUSPEND:
|
||||
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
||||
DCSR(prtd->dma_ch) &= ~DCSR_RUN;
|
||||
break;
|
||||
|
||||
case SNDRV_PCM_TRIGGER_RESUME:
|
||||
DCSR(prtd->dma_ch) |= DCSR_RUN;
|
||||
break;
|
||||
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
|
||||
DDADR(prtd->dma_ch) = prtd->dma_desc_array_phys;
|
||||
DCSR(prtd->dma_ch) |= DCSR_RUN;
|
||||
break;
|
||||
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(pxa2xx_pcm_trigger);
|
||||
|
||||
snd_pcm_uframes_t
|
||||
pxa2xx_pcm_pointer(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
struct pxa2xx_runtime_data *prtd = runtime->private_data;
|
||||
|
||||
dma_addr_t ptr = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
|
||||
DSADR(prtd->dma_ch) : DTADR(prtd->dma_ch);
|
||||
snd_pcm_uframes_t x = bytes_to_frames(runtime, ptr - runtime->dma_addr);
|
||||
|
||||
if (x == runtime->buffer_size)
|
||||
x = 0;
|
||||
return x;
|
||||
}
|
||||
EXPORT_SYMBOL(pxa2xx_pcm_pointer);
|
||||
|
||||
int __pxa2xx_pcm_prepare(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct pxa2xx_runtime_data *prtd = substream->runtime->private_data;
|
||||
unsigned long req;
|
||||
|
||||
if (!prtd || !prtd->params)
|
||||
return 0;
|
||||
|
||||
if (prtd->dma_ch == -1)
|
||||
return -EINVAL;
|
||||
|
||||
DCSR(prtd->dma_ch) &= ~DCSR_RUN;
|
||||
DCSR(prtd->dma_ch) = 0;
|
||||
DCMD(prtd->dma_ch) = 0;
|
||||
req = *(unsigned long *) prtd->params->filter_data;
|
||||
DRCMR(req) = prtd->dma_ch | DRCMR_MAPVLD;
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(__pxa2xx_pcm_prepare);
|
||||
|
||||
void pxa2xx_pcm_dma_irq(int dma_ch, void *dev_id)
|
||||
{
|
||||
struct snd_pcm_substream *substream = dev_id;
|
||||
int dcsr;
|
||||
|
||||
dcsr = DCSR(dma_ch);
|
||||
DCSR(dma_ch) = dcsr & ~DCSR_STOPIRQEN;
|
||||
|
||||
if (dcsr & DCSR_ENDINTR) {
|
||||
snd_pcm_period_elapsed(substream);
|
||||
} else {
|
||||
printk(KERN_ERR "DMA error on channel %d (DCSR=%#x)\n",
|
||||
dma_ch, dcsr);
|
||||
snd_pcm_stream_lock(substream);
|
||||
snd_pcm_stop(substream, SNDRV_PCM_STATE_XRUN);
|
||||
snd_pcm_stream_unlock(substream);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(pxa2xx_pcm_dma_irq);
|
||||
|
||||
int __pxa2xx_pcm_open(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
struct pxa2xx_runtime_data *rtd;
|
||||
int ret;
|
||||
|
||||
runtime->hw = pxa2xx_pcm_hardware;
|
||||
|
||||
/*
|
||||
* For mysterious reasons (and despite what the manual says)
|
||||
* playback samples are lost if the DMA count is not a multiple
|
||||
* of the DMA burst size. Let's add a rule to enforce that.
|
||||
*/
|
||||
ret = snd_pcm_hw_constraint_step(runtime, 0,
|
||||
SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
ret = snd_pcm_hw_constraint_step(runtime, 0,
|
||||
SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
ret = snd_pcm_hw_constraint_integer(runtime,
|
||||
SNDRV_PCM_HW_PARAM_PERIODS);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
ret = -ENOMEM;
|
||||
rtd = kzalloc(sizeof(*rtd), GFP_KERNEL);
|
||||
if (!rtd)
|
||||
goto out;
|
||||
rtd->dma_desc_array =
|
||||
dma_alloc_writecombine(substream->pcm->card->dev, PAGE_SIZE,
|
||||
&rtd->dma_desc_array_phys, GFP_KERNEL);
|
||||
if (!rtd->dma_desc_array)
|
||||
goto err1;
|
||||
|
||||
rtd->dma_ch = -1;
|
||||
runtime->private_data = rtd;
|
||||
return 0;
|
||||
|
||||
err1:
|
||||
kfree(rtd);
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(__pxa2xx_pcm_open);
|
||||
|
||||
int __pxa2xx_pcm_close(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
struct pxa2xx_runtime_data *rtd = runtime->private_data;
|
||||
|
||||
dma_free_writecombine(substream->pcm->card->dev, PAGE_SIZE,
|
||||
rtd->dma_desc_array, rtd->dma_desc_array_phys);
|
||||
kfree(rtd);
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(__pxa2xx_pcm_close);
|
||||
|
||||
int pxa2xx_pcm_mmap(struct snd_pcm_substream *substream,
|
||||
struct vm_area_struct *vma)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
return dma_mmap_writecombine(substream->pcm->card->dev, vma,
|
||||
runtime->dma_area,
|
||||
runtime->dma_addr,
|
||||
runtime->dma_bytes);
|
||||
}
|
||||
EXPORT_SYMBOL(pxa2xx_pcm_mmap);
|
||||
|
||||
int pxa2xx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
|
||||
{
|
||||
struct snd_pcm_substream *substream = pcm->streams[stream].substream;
|
||||
struct snd_dma_buffer *buf = &substream->dma_buffer;
|
||||
size_t size = pxa2xx_pcm_hardware.buffer_bytes_max;
|
||||
buf->dev.type = SNDRV_DMA_TYPE_DEV;
|
||||
buf->dev.dev = pcm->card->dev;
|
||||
buf->private_data = NULL;
|
||||
buf->area = dma_alloc_writecombine(pcm->card->dev, size,
|
||||
&buf->addr, GFP_KERNEL);
|
||||
if (!buf->area)
|
||||
return -ENOMEM;
|
||||
buf->bytes = size;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(pxa2xx_pcm_preallocate_dma_buffer);
|
||||
|
||||
void pxa2xx_pcm_free_dma_buffers(struct snd_pcm *pcm)
|
||||
{
|
||||
struct snd_pcm_substream *substream;
|
||||
struct snd_dma_buffer *buf;
|
||||
int stream;
|
||||
|
||||
for (stream = 0; stream < 2; stream++) {
|
||||
substream = pcm->streams[stream].substream;
|
||||
if (!substream)
|
||||
continue;
|
||||
buf = &substream->dma_buffer;
|
||||
if (!buf->area)
|
||||
continue;
|
||||
dma_free_writecombine(pcm->card->dev, buf->bytes,
|
||||
buf->area, buf->addr);
|
||||
buf->area = NULL;
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(pxa2xx_pcm_free_dma_buffers);
|
||||
|
||||
MODULE_AUTHOR("Nicolas Pitre");
|
||||
MODULE_DESCRIPTION("Intel PXA2xx sound library");
|
||||
MODULE_LICENSE("GPL");
|
||||
135
sound/arm/pxa2xx-pcm.c
Normal file
135
sound/arm/pxa2xx-pcm.c
Normal file
|
|
@ -0,0 +1,135 @@
|
|||
/*
|
||||
* linux/sound/arm/pxa2xx-pcm.c -- ALSA PCM interface for the Intel PXA2xx chip
|
||||
*
|
||||
* Author: Nicolas Pitre
|
||||
* Created: Nov 30, 2004
|
||||
* Copyright: (C) 2004 MontaVista Software, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/dmaengine.h>
|
||||
|
||||
#include <mach/dma.h>
|
||||
|
||||
#include <sound/core.h>
|
||||
#include <sound/pxa2xx-lib.h>
|
||||
#include <sound/dmaengine_pcm.h>
|
||||
|
||||
#include "pxa2xx-pcm.h"
|
||||
|
||||
static int pxa2xx_pcm_prepare(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct pxa2xx_pcm_client *client = substream->private_data;
|
||||
|
||||
__pxa2xx_pcm_prepare(substream);
|
||||
|
||||
return client->prepare(substream);
|
||||
}
|
||||
|
||||
static int pxa2xx_pcm_open(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct pxa2xx_pcm_client *client = substream->private_data;
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
struct pxa2xx_runtime_data *rtd;
|
||||
int ret;
|
||||
|
||||
ret = __pxa2xx_pcm_open(substream);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
rtd = runtime->private_data;
|
||||
|
||||
rtd->params = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
|
||||
client->playback_params : client->capture_params;
|
||||
ret = pxa_request_dma("dma", DMA_PRIO_LOW,
|
||||
pxa2xx_pcm_dma_irq, substream);
|
||||
if (ret < 0)
|
||||
goto err2;
|
||||
rtd->dma_ch = ret;
|
||||
|
||||
ret = client->startup(substream);
|
||||
if (!ret)
|
||||
goto out;
|
||||
|
||||
pxa_free_dma(rtd->dma_ch);
|
||||
err2:
|
||||
__pxa2xx_pcm_close(substream);
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int pxa2xx_pcm_close(struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct pxa2xx_pcm_client *client = substream->private_data;
|
||||
struct pxa2xx_runtime_data *rtd = substream->runtime->private_data;
|
||||
|
||||
pxa_free_dma(rtd->dma_ch);
|
||||
client->shutdown(substream);
|
||||
|
||||
return __pxa2xx_pcm_close(substream);
|
||||
}
|
||||
|
||||
static struct snd_pcm_ops pxa2xx_pcm_ops = {
|
||||
.open = pxa2xx_pcm_open,
|
||||
.close = pxa2xx_pcm_close,
|
||||
.ioctl = snd_pcm_lib_ioctl,
|
||||
.hw_params = __pxa2xx_pcm_hw_params,
|
||||
.hw_free = __pxa2xx_pcm_hw_free,
|
||||
.prepare = pxa2xx_pcm_prepare,
|
||||
.trigger = pxa2xx_pcm_trigger,
|
||||
.pointer = pxa2xx_pcm_pointer,
|
||||
.mmap = pxa2xx_pcm_mmap,
|
||||
};
|
||||
|
||||
int pxa2xx_pcm_new(struct snd_card *card, struct pxa2xx_pcm_client *client,
|
||||
struct snd_pcm **rpcm)
|
||||
{
|
||||
struct snd_pcm *pcm;
|
||||
int play = client->playback_params ? 1 : 0;
|
||||
int capt = client->capture_params ? 1 : 0;
|
||||
int ret;
|
||||
|
||||
ret = snd_pcm_new(card, "PXA2xx-PCM", 0, play, capt, &pcm);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
pcm->private_data = client;
|
||||
pcm->private_free = pxa2xx_pcm_free_dma_buffers;
|
||||
|
||||
ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
if (play) {
|
||||
int stream = SNDRV_PCM_STREAM_PLAYBACK;
|
||||
snd_pcm_set_ops(pcm, stream, &pxa2xx_pcm_ops);
|
||||
ret = pxa2xx_pcm_preallocate_dma_buffer(pcm, stream);
|
||||
if (ret)
|
||||
goto out;
|
||||
}
|
||||
if (capt) {
|
||||
int stream = SNDRV_PCM_STREAM_CAPTURE;
|
||||
snd_pcm_set_ops(pcm, stream, &pxa2xx_pcm_ops);
|
||||
ret = pxa2xx_pcm_preallocate_dma_buffer(pcm, stream);
|
||||
if (ret)
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (rpcm)
|
||||
*rpcm = pcm;
|
||||
ret = 0;
|
||||
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(pxa2xx_pcm_new);
|
||||
|
||||
MODULE_AUTHOR("Nicolas Pitre");
|
||||
MODULE_DESCRIPTION("Intel PXA2xx PCM DMA module");
|
||||
MODULE_LICENSE("GPL");
|
||||
29
sound/arm/pxa2xx-pcm.h
Normal file
29
sound/arm/pxa2xx-pcm.h
Normal file
|
|
@ -0,0 +1,29 @@
|
|||
/*
|
||||
* linux/sound/arm/pxa2xx-pcm.h -- ALSA PCM interface for the Intel PXA2xx chip
|
||||
*
|
||||
* Author: Nicolas Pitre
|
||||
* Created: Nov 30, 2004
|
||||
* Copyright: MontaVista Software, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
struct pxa2xx_runtime_data {
|
||||
int dma_ch;
|
||||
struct snd_dmaengine_dai_dma_data *params;
|
||||
struct pxa_dma_desc *dma_desc_array;
|
||||
dma_addr_t dma_desc_array_phys;
|
||||
};
|
||||
|
||||
struct pxa2xx_pcm_client {
|
||||
struct snd_dmaengine_dai_dma_data *playback_params;
|
||||
struct snd_dmaengine_dai_dma_data *capture_params;
|
||||
int (*startup)(struct snd_pcm_substream *);
|
||||
void (*shutdown)(struct snd_pcm_substream *);
|
||||
int (*prepare)(struct snd_pcm_substream *);
|
||||
};
|
||||
|
||||
extern int pxa2xx_pcm_new(struct snd_card *, struct pxa2xx_pcm_client *, struct snd_pcm **);
|
||||
|
||||
Loading…
Add table
Add a link
Reference in a new issue