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https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-30 07:38:52 +01:00
Fixed MTP to work with TWRP
This commit is contained in:
awab228
commit
f6dfaef42e
50820 changed files with 20846062 additions and 0 deletions
246
tools/perf/util/parse-events.l
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246
tools/perf/util/parse-events.l
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%option reentrant
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%option bison-bridge
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%option prefix="parse_events_"
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%option stack
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%{
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#include <errno.h>
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#include "../perf.h"
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#include "parse-events-bison.h"
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#include "parse-events.h"
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char *parse_events_get_text(yyscan_t yyscanner);
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YYSTYPE *parse_events_get_lval(yyscan_t yyscanner);
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static int __value(YYSTYPE *yylval, char *str, int base, int token)
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{
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u64 num;
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errno = 0;
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num = strtoull(str, NULL, base);
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if (errno)
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return PE_ERROR;
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yylval->num = num;
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return token;
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}
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static int value(yyscan_t scanner, int base)
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{
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YYSTYPE *yylval = parse_events_get_lval(scanner);
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char *text = parse_events_get_text(scanner);
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return __value(yylval, text, base, PE_VALUE);
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}
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static int raw(yyscan_t scanner)
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{
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YYSTYPE *yylval = parse_events_get_lval(scanner);
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char *text = parse_events_get_text(scanner);
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return __value(yylval, text + 1, 16, PE_RAW);
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}
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static int str(yyscan_t scanner, int token)
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{
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YYSTYPE *yylval = parse_events_get_lval(scanner);
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char *text = parse_events_get_text(scanner);
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yylval->str = strdup(text);
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return token;
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}
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static int pmu_str_check(yyscan_t scanner)
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{
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YYSTYPE *yylval = parse_events_get_lval(scanner);
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char *text = parse_events_get_text(scanner);
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yylval->str = strdup(text);
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switch (perf_pmu__parse_check(text)) {
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case PMU_EVENT_SYMBOL_PREFIX:
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return PE_PMU_EVENT_PRE;
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case PMU_EVENT_SYMBOL_SUFFIX:
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return PE_PMU_EVENT_SUF;
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case PMU_EVENT_SYMBOL:
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return PE_KERNEL_PMU_EVENT;
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default:
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return PE_NAME;
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}
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}
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static int sym(yyscan_t scanner, int type, int config)
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{
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YYSTYPE *yylval = parse_events_get_lval(scanner);
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yylval->num = (type << 16) + config;
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return type == PERF_TYPE_HARDWARE ? PE_VALUE_SYM_HW : PE_VALUE_SYM_SW;
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}
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static int term(yyscan_t scanner, int type)
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{
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YYSTYPE *yylval = parse_events_get_lval(scanner);
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yylval->num = type;
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return PE_TERM;
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}
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%}
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%x mem
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%s config
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%x event
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group [^,{}/]*[{][^}]*[}][^,{}/]*
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event_pmu [^,{}/]+[/][^/]*[/][^,{}/]*
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event [^,{}/]+
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num_dec [0-9]+
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num_hex 0x[a-fA-F0-9]+
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num_raw_hex [a-fA-F0-9]+
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name [a-zA-Z_*?][a-zA-Z0-9_*?]*
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name_minus [a-zA-Z_*?][a-zA-Z0-9\-_*?]*
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/* If you add a modifier you need to update check_modifier() */
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modifier_event [ukhpGHSD]+
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modifier_bp [rwx]{1,3}
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%%
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%{
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{
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int start_token;
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start_token = parse_events_get_extra(yyscanner);
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if (start_token == PE_START_TERMS)
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BEGIN(config);
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else if (start_token == PE_START_EVENTS)
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BEGIN(event);
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if (start_token) {
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parse_events_set_extra(NULL, yyscanner);
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return start_token;
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}
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}
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%}
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<event>{
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{group} {
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BEGIN(INITIAL); yyless(0);
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}
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{event_pmu} |
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{event} {
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str(yyscanner, PE_EVENT_NAME);
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BEGIN(INITIAL); yyless(0);
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return PE_EVENT_NAME;
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}
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. |
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<<EOF>> {
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BEGIN(INITIAL); yyless(0);
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}
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}
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<config>{
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config { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_CONFIG); }
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config1 { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_CONFIG1); }
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config2 { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_CONFIG2); }
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name { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_NAME); }
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period { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_SAMPLE_PERIOD); }
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branch_type { return term(yyscanner, PARSE_EVENTS__TERM_TYPE_BRANCH_SAMPLE_TYPE); }
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, { return ','; }
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"/" { BEGIN(INITIAL); return '/'; }
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{name_minus} { return str(yyscanner, PE_NAME); }
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}
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<mem>{
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{modifier_bp} { return str(yyscanner, PE_MODIFIER_BP); }
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: { return ':'; }
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{num_dec} { return value(yyscanner, 10); }
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{num_hex} { return value(yyscanner, 16); }
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/*
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* We need to separate 'mem:' scanner part, in order to get specific
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* modifier bits parsed out. Otherwise we would need to handle PE_NAME
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* and we'd need to parse it manually. During the escape from <mem>
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* state we need to put the escaping char back, so we dont miss it.
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*/
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. { unput(*yytext); BEGIN(INITIAL); }
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/*
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* We destroy the scanner after reaching EOF,
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* but anyway just to be sure get back to INIT state.
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*/
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<<EOF>> { BEGIN(INITIAL); }
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}
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cpu-cycles|cycles { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_CPU_CYCLES); }
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stalled-cycles-frontend|idle-cycles-frontend { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_STALLED_CYCLES_FRONTEND); }
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stalled-cycles-backend|idle-cycles-backend { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_STALLED_CYCLES_BACKEND); }
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instructions { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_INSTRUCTIONS); }
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cache-references { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_CACHE_REFERENCES); }
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cache-misses { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_CACHE_MISSES); }
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branch-instructions|branches { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_BRANCH_INSTRUCTIONS); }
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branch-misses { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_BRANCH_MISSES); }
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bus-cycles { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_BUS_CYCLES); }
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ref-cycles { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_REF_CPU_CYCLES); }
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cpu-clock { return sym(yyscanner, PERF_TYPE_SOFTWARE, PERF_COUNT_SW_CPU_CLOCK); }
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task-clock { return sym(yyscanner, PERF_TYPE_SOFTWARE, PERF_COUNT_SW_TASK_CLOCK); }
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page-faults|faults { return sym(yyscanner, PERF_TYPE_SOFTWARE, PERF_COUNT_SW_PAGE_FAULTS); }
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minor-faults { return sym(yyscanner, PERF_TYPE_SOFTWARE, PERF_COUNT_SW_PAGE_FAULTS_MIN); }
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major-faults { return sym(yyscanner, PERF_TYPE_SOFTWARE, PERF_COUNT_SW_PAGE_FAULTS_MAJ); }
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context-switches|cs { return sym(yyscanner, PERF_TYPE_SOFTWARE, PERF_COUNT_SW_CONTEXT_SWITCHES); }
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cpu-migrations|migrations { return sym(yyscanner, PERF_TYPE_SOFTWARE, PERF_COUNT_SW_CPU_MIGRATIONS); }
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alignment-faults { return sym(yyscanner, PERF_TYPE_SOFTWARE, PERF_COUNT_SW_ALIGNMENT_FAULTS); }
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emulation-faults { return sym(yyscanner, PERF_TYPE_SOFTWARE, PERF_COUNT_SW_EMULATION_FAULTS); }
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dummy { return sym(yyscanner, PERF_TYPE_SOFTWARE, PERF_COUNT_SW_DUMMY); }
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/*
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* We have to handle the kernel PMU event cycles-ct/cycles-t/mem-loads/mem-stores separately.
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* Because the prefix cycles is mixed up with cpu-cycles.
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* loads and stores are mixed up with cache event
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*/
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cycles-ct { return str(yyscanner, PE_KERNEL_PMU_EVENT); }
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cycles-t { return str(yyscanner, PE_KERNEL_PMU_EVENT); }
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mem-loads { return str(yyscanner, PE_KERNEL_PMU_EVENT); }
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mem-stores { return str(yyscanner, PE_KERNEL_PMU_EVENT); }
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L1-dcache|l1-d|l1d|L1-data |
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L1-icache|l1-i|l1i|L1-instruction |
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LLC|L2 |
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dTLB|d-tlb|Data-TLB |
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iTLB|i-tlb|Instruction-TLB |
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branch|branches|bpu|btb|bpc |
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node { return str(yyscanner, PE_NAME_CACHE_TYPE); }
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load|loads|read |
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store|stores|write |
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prefetch|prefetches |
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speculative-read|speculative-load |
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refs|Reference|ops|access |
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misses|miss { return str(yyscanner, PE_NAME_CACHE_OP_RESULT); }
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mem: { BEGIN(mem); return PE_PREFIX_MEM; }
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r{num_raw_hex} { return raw(yyscanner); }
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{num_dec} { return value(yyscanner, 10); }
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{num_hex} { return value(yyscanner, 16); }
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{modifier_event} { return str(yyscanner, PE_MODIFIER_EVENT); }
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{name} { return pmu_str_check(yyscanner); }
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"/" { BEGIN(config); return '/'; }
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- { return '-'; }
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, { BEGIN(event); return ','; }
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: { return ':'; }
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"{" { BEGIN(event); return '{'; }
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"}" { return '}'; }
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= { return '='; }
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\n { }
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. { }
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%%
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int parse_events_wrap(void *scanner __maybe_unused)
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{
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return 1;
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}
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