#ifndef __EXYNOS7570_VCLK_H__
#define __EXYNOS7570_VCLK_H__

enum {
	gate_mif_pdma = 0x0A000000,
	gate_mif_adcif,
	gate_mif_speedy,
	gate_apm_apm,
	gate_cpucl0_bcm,
	gate_cpucl0_bts,
	gate_dispaud_common_disp,
	gate_dispaud_common_dsim0,
	gate_dispaud_common_aud,
	gate_dispaud_sysmmu,
	gate_dispaud_bcm,
	gate_dispaud_bts,
	gate_dispaud_decon,
	gate_dispaud_dsim0,
	gate_dispaud_mixer,
	gate_dispaud_mi2s_aud,
	gate_dispaud_mi2s_amp,

	gate_peri_peris0,
	gate_peri_peric1,
	gate_peri_peric0,
	gate_peri_pwm_motor,
	gate_peri_sclk_pwm_motor,
	gate_peri_mct,
	gate_peri_i2c_sensor2,
	gate_peri_i2c_sensor1,
	gate_peri_i2c_tsp,
	gate_peri_i2c_fuelgauge,
	gate_peri_i2c_nfc,
	gate_peri_i2c_muic,
	gate_peri_hsi2c_frontcam,
	gate_peri_hsi2c_maincam,
	gate_peri_hsi2c_frontsensor,
	gate_peri_hsi2c_rearaf,
	gate_peri_hsi2c_rearsensor,
	gate_peri_gpio_touch,
	gate_peri_gpio_top,
	gate_peri_gpio_nfc,
	gate_peri_gpio_ese,
	gate_peri_wdt_cpucl0,
	gate_peri_uart_debug,
	gate_peri_uart_sensor,
	gate_peri_tmu_cpucl0,
	gate_peri_spi_ese,
	gate_peri_spi_rearfrom,
	gate_peri_gpio_alive,
	gate_peri_chipid,
	gate_peri_otp_con_top,
	gate_peri_rtc_alive,
	gate_peri_rtc_top,
	gate_peri_usi0,
	gate_peri_usi1,

	gate_fsys_common,
	gate_fsys_common_busp2,
	gate_fsys_common_busp3,
	gate_fsys_sysmmu,
	gate_fsys_bcm,
	gate_fsys_bts,
	gate_fsys_usb20drd,
	gate_fsys_mmc0,
	gate_fsys_sclk_mmc0,
	gate_fsys_mmc2,
	gate_fsys_sclk_mmc2,
	gate_fsys_sss,
	gate_fsys_rtic,
	gate_g3d_common,
	gate_g3d_sysmmu,
	gate_g3d_bcm,
	gate_g3d_bts,
	gate_g3d_g3d,
	gate_isp_sysmmu,
	gate_isp_bcm,
	gate_isp_bts,
	gate_isp_cam,
	gate_isp_vra,
	gate_mfcmscl_sysmmu,
	gate_mfcmscl_bcm,
	gate_mfcmscl_bts,
	gate_mfcmscl_mscl,
	gate_mfcmscl_jpeg,
	gate_mfcmscl_mfc,
	vclk_group_grpgate_end,
	num_of_grpgate = vclk_group_grpgate_end - 0x0A000000,

	sclk_decon_vclk = 0x0A010000,
	sclk_mmc0,
	sclk_mmc2,
	sclk_usb20drd_refclk,
	sclk_uart_debug,
	sclk_uart_sensor,
	sclk_spi_rearfrom,
	sclk_spi_ese,
	sclk_usi0,
	sclk_usi1,
	sclk_apm,
	sclk_isp_sensor0,
	vclk_group_m1d1g1_end,
	num_of_m1d1g1 = vclk_group_m1d1g1_end - 0x0A010000,

	p1_aud_pll = 0x0A020000,
	p1_wpll_usb_pll,
	vclk_group_p1_end,
	num_of_p1 = vclk_group_p1_end - 0x0A020000,

	m1_dummy = 0x0A030000,
	vclk_group_m1_end,
	num_of_m1 = vclk_group_m1_end - 0x0A030000,

	sclk_decon_vclk_local = 0x0A040000,
	d1_dispaud_mi2s,
	d1_dispaud_mixer,
	d1_dispaud_oscclk_fm_52m,
	vclk_group_d1_end,
	num_of_d1 = vclk_group_d1_end - 0x0A040000,

	pxmxdx_top = 0x0A050000,
	pxmxdx_dispaud,
	pxmxdx_mfcmscl,
	pxmxdx_isp_vra,
	pxmxdx_isp_cam,
	pxmxdx_oscclk_aud,
	vclk_group_pxmxdx_end,
	num_of_pxmxdx = vclk_group_pxmxdx_end - 0x0A050000,

	umux_dispaud_clkphy_dispaud_mipiphy_txbyteclkhs_user = 0x0A060000,
	umux_dispaud_clkphy_dispaud_mipiphy_rxclkesc0_user,
	umux_fsys_clkphy_fsys_usb20drd_phyclock_user,
	umux_isp_clkphy_isp_s_rxbyteclkhs0_s4_user,
	vclk_group_umux_end,
	num_of_umux = vclk_group_umux_end - 0x0A060000,

	dvfs_cpucl0 = 0x0A070000,
	dvfs_g3d,
	dvfs_mif,
	dvfs_int,
	dvfs_disp,
	dvfs_cam,
	vclk_group_dfs_end,
	num_of_dfs = vclk_group_dfs_end - 0x0A070000,
};

#endif