mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-08 17:18:05 -04:00
312 lines
10 KiB
C
Executable file
312 lines
10 KiB
C
Executable file
/****************************************************************************
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*
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* Copyright (c) 2014 - 2016 Samsung Electronics Co., Ltd. All rights reserved
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*
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****************************************************************************/
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#ifndef __HIP4_H__
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#define __HIP4_H__
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/**
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* This header file is the public HIP4 interface, which will be accessible by
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* Wi-Fi service driver components.
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*
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* All struct and internal HIP functions shall be moved to a private header
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* file.
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*/
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#include <linux/interrupt.h>
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/skbuff.h>
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#include <scsc/scsc_mifram.h>
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#include <scsc/scsc_mx.h>
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#ifndef SLSI_TEST_DEV
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#include <linux/wakelock.h>
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#endif
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#include "mbulk.h"
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#define MIF_HIP_COMPAT_FLAG_NEED_MLME_RESET (1 << 0)
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#define MIF_HIP_COMPAT_FLAG_MIB_DAT_BY_FAPI (1 << 1)
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#define HIP4_DAT_SLOTS 218
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#define HIP4_CTL_SLOTS 32
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#define MIF_HIP_CFG_Q_NUM 6
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/* Current versions supported by this HIP */
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#define HIP4_SUPPORTED_V1 3
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#define HIP4_SUPPORTED_V2 4
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enum hip4_hip_q_conf {
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HIP4_MIF_Q_FH_CTRL,
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HIP4_MIF_Q_FH_DAT,
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HIP4_MIF_Q_FH_RFB,
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HIP4_MIF_Q_TH_CTRL,
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HIP4_MIF_Q_TH_DAT,
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HIP4_MIF_Q_TH_RFB
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};
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struct hip4_hip_config_version_4 {
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/* Host owned */
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u32 magic_number; /* 0xcaba0401 */
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u16 hip_config_ver; /* Version of this configuration structure = 2*/
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u16 config_len; /* Size of this configuration structure */
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/* FW owned */
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u32 compat_flag; /* flag of the expected driver's behaviours */
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u16 sap_mlme_ver; /* Fapi SAP_MLME version*/
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u16 sap_ma_ver; /* Fapi SAP_MA version */
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u16 sap_debug_ver; /* Fapi SAP_DEBUG version */
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u16 sap_test_ver; /* Fapi SAP_TEST version */
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u32 fw_build_id; /* Firmware Build Id */
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u32 fw_patch_id; /* Firmware Patch Id */
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u8 unidat_req_headroom; /* Headroom the host shall reserve in mbulk for MA-UNITDATA.REQ signal */
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u8 unidat_req_tailroom; /* Tailroom the host shall reserve in mbulk for MA-UNITDATA.REQ signal */
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u8 bulk_buffer_align; /* 4 */
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/* Host owned */
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u8 host_cache_line; /* 64 */
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u32 host_buf_loc; /* location of the host buffer in MIF_ADDR */
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u32 host_buf_sz; /* in byte, size of the host buffer */
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u32 fw_buf_loc; /* location of the firmware buffer in MIF_ADDR */
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u32 fw_buf_sz; /* in byte, size of the firmware buffer */
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u32 mib_loc; /* MIB location in MIF_ADDR */
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u32 mib_sz; /* MIB size */
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u32 log_config_loc; /* Logging Configuration Location in MIF_ADDR */
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u32 log_config_sz; /* Logging Configuration Size in MIF_ADDR */
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u8 mif_fh_int_n; /* MIF from-host interrupt bit position */
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u8 mif_th_int_n; /* MIF to-host interrpt bit position */
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u8 reserved[2];
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u32 scbrd_loc; /* Scoreboard locatin in MIF_ADDR */
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u16 q_num; /* 6 */
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u16 q_len; /* 256 */
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u16 q_idx_sz; /* 1 */
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u8 reserved2[2];
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u32 q_loc[MIF_HIP_CFG_Q_NUM];
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u8 reserved3[16];
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} __packed;
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struct hip4_hip_config_version_3 {
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/* Host owned */
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u32 magic_number; /* 0xcaba0401 */
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u16 hip_config_ver; /* Version of this configuration structure = 2*/
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u16 config_len; /* Size of this configuration structure */
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/* FW owned */
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u32 compat_flag; /* flag of the expected driver's behaviours */
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u16 sap_mlme_ver; /* Fapi SAP_MLME version*/
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u16 sap_ma_ver; /* Fapi SAP_MA version */
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u16 sap_debug_ver; /* Fapi SAP_DEBUG version */
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u16 sap_test_ver; /* Fapi SAP_TEST version */
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u32 fw_build_id; /* Firmware Build Id */
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u32 fw_patch_id; /* Firmware Patch Id */
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u8 unidat_req_headroom; /* Headroom the host shall reserve in mbulk for MA-UNITDATA.REQ signal */
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u8 unidat_req_tailroom; /* Tailroom the host shall reserve in mbulk for MA-UNITDATA.REQ signal */
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u8 bulk_buffer_align; /* 4 */
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/* Host owned */
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u8 host_cache_line; /* 64 */
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u32 host_buf_loc; /* location of the host buffer in MIF_ADDR */
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u32 host_buf_sz; /* in byte, size of the host buffer */
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u32 fw_buf_loc; /* location of the firmware buffer in MIF_ADDR */
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u32 fw_buf_sz; /* in byte, size of the firmware buffer */
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u32 mib_loc; /* MIB location in MIF_ADDR */
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u32 mib_sz; /* MIB size */
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u32 log_config_loc; /* Logging Configuration Location in MIF_ADDR */
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u32 log_config_sz; /* Logging Configuration Size in MIF_ADDR */
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u8 mif_fh_int_n; /* MIF from-host interrupt bit position */
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u8 mif_th_int_n; /* MIF to-host interrpt bit position */
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u8 reserved[2];
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u32 scbrd_loc; /* Scoreboard locatin in MIF_ADDR */
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u16 q_num; /* 6 */
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u16 q_len; /* 256 */
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u16 q_idx_sz; /* 1 */
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u8 reserved2[2];
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u32 q_loc[MIF_HIP_CFG_Q_NUM];
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u8 reserved3[16];
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} __packed;
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struct hip4_hip_init {
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/* Host owned */
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u32 magic_number; /* 0xcaaa0400 */
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/* FW owned */
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u32 conf_hip4_ver;
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/* Host owned */
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u32 version_a_ref; /* Location of Config structure A (old) */
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u32 version_b_ref; /* Location of Config structure B (new) */
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} __packed;
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#define MAX_NUM 256
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struct hip4_hip_q {
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u32 array[MAX_NUM];
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u8 idx_read; /* To keep track */
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u8 idx_write; /* To keep track */
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u8 total;
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} __aligned(64);
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struct hip4_hip_control {
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struct hip4_hip_init init;
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struct hip4_hip_config_version_3 config_v3 __aligned(32);
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struct hip4_hip_config_version_4 config_v4 __aligned(32);
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u32 scoreboard[256] __aligned(64);
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struct hip4_hip_q q[MIF_HIP_CFG_Q_NUM] __aligned(64);
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} __aligned(4096);
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/* TODO : instrument hip4 with statistics */
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#ifdef CONFIG_SCSC_DEBUG_CODE_COMMENTED_OUT
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struct hip4_hip_stats {
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struct hip4_hip_fh_stats tx_stats[HIP4_HIP_FH_BUF_MAX];
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u8 tx_buf_i;
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u32 tx_sched;
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u32 rx_empty;
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u32 rx_intr;
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u32 rx_sigs;
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u32 rx_sig_bytes;
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u32 rx_data;
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u32 rx_data_bytes;
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u32 rx_rcb_reads;
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/* TODO_HARDMAC_HIP3 */
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u32 tx_q_pause[HIP4_PS_MAX_TID_PRI];
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u32 tx_q_resume[HIP4_PS_MAX_TID_PRI];
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u32 rx_run_from_hydra_thread;
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u32 rx_run_from_mmc_thread;
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};
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#endif
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struct hip_q_index {
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u8 read;
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u8 write;
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} __packed;
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struct hip_q_indice {
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struct hip_q_index q[6];
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} __packed;
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struct slsi_hip4;
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/* #define TASKLET 1 */
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/* This struct is private to the HIP implementation */
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struct hip4_priv {
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volatile struct hip_q_indice *q_indice;
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#ifdef TASKLET
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struct tasklet_struct intr_tq;
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#else
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struct work_struct intr_wq;
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#endif
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/* Interrupts cache */
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/* TOHOST */
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u32 rx_intr_tohost;
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/* FROMHOST */
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u32 rx_intr_fromhost;
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/* For workqueue */
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struct slsi_hip4 *hip;
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/* Pool for data frames*/
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u8 host_pool_id_dat;
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/* Pool for ctl frames*/
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u8 host_pool_id_ctl;
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#ifndef TASKLET
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/* rx cycle lock */
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spinlock_t rx_lock;
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#endif
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/* tx cycle lock */
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spinlock_t tx_lock;
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/* Scoreboard update spinlock */
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rwlock_t rw_scoreboard;
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/* Watchdog timer */
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struct timer_list watchdog;
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/* wd spinlock */
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spinlock_t watchdog_lock;
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/* wd timer control */
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atomic_t watchdog_timer_active;
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#ifndef SLSI_TEST_DEV
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/* Wakelock for modem_ctl */
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struct wake_lock hip4_wake_lock;
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#endif
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/* Control the hip4 init */
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atomic_t rx_ready;
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/* Control the hip4 deinit */
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atomic_t closing;
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atomic_t in_tx;
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atomic_t in_rx;
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struct {
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atomic_t irqs;
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atomic_t spurious_irqs;
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} stats;
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#ifdef CONFIG_SCSC_WLAN_DEBUG
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/*minor*/
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u32 minor;
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#endif
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u8 unidat_req_headroom; /* Headroom the host shall reserve in mbulk for MA-UNITDATA.REQ signal */
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u8 unidat_req_tailroom; /* Tailroom the host shall reserve in mbulk for MA-UNITDATA.REQ signal */
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u32 version; /* Version of the running FW */
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void *scbrd_base; /* Scbrd_base pointer */
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/* Global domain Q control*/
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atomic_t gactive;
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atomic_t gmod;
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atomic_t gcod;
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};
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struct scsc_service;
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struct slsi_hip4 {
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struct hip4_priv *hip_priv;
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struct hip4_hip_control *hip_control;
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scsc_mifram_ref hip_ref;
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};
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/* Public functions */
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int hip4_init(struct slsi_hip4 *hip);
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int hip4_setup(struct slsi_hip4 *hip);
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void hip4_freeze(struct slsi_hip4 *hip);
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void hip4_deinit(struct slsi_hip4 *hip);
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int scsc_wifi_transmit_frame(struct slsi_hip4 *hip, bool ctrl_packet, struct sk_buff *skb);
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/* Macros for accessing information stored in the hip_config struct */
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#define scsc_wifi_get_hip_config_version_4_u8(buff_ptr, member) le16_to_cpu((((struct hip4_hip_config_version_4 *)(buff_ptr))->member))
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#define scsc_wifi_get_hip_config_version_4_u16(buff_ptr, member) le16_to_cpu((((struct hip4_hip_config_version_4 *)(buff_ptr))->member))
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#define scsc_wifi_get_hip_config_version_4_u32(buff_ptr, member) le32_to_cpu((((struct hip4_hip_config_version_4 *)(buff_ptr))->member))
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#define scsc_wifi_get_hip_config_version_3_u8(buff_ptr, member) le16_to_cpu((((struct hip4_hip_config_version_4 *)(buff_ptr))->member))
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#define scsc_wifi_get_hip_config_version_3_u16(buff_ptr, member) le16_to_cpu((((struct hip4_hip_config_version_4 *)(buff_ptr))->member))
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#define scsc_wifi_get_hip_config_version_3_u32(buff_ptr, member) le32_to_cpu((((struct hip4_hip_config_version_4 *)(buff_ptr))->member))
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#define scsc_wifi_get_hip_config_u8(buff_ptr, member, ver) le16_to_cpu((((struct hip4_hip_config_version_##ver *)(buff_ptr->config_v##ver))->member))
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#define scsc_wifi_get_hip_config_u16(buff_ptr, member, ver) le16_to_cpu((((struct hip4_hip_config_version_##ver *)(buff_ptr->config_v##ver))->member))
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#define scsc_wifi_get_hip_config_u32(buff_ptr, member, ver) le32_to_cpu((((struct hip4_hip_config_version_##ver *)(buff_ptr->config_v##ver))->member))
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#define scsc_wifi_get_hip_config_version(buff_ptr) le32_to_cpu((((struct hip4_hip_init *)(buff_ptr))->conf_hip4_ver))
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#define QR(hip_q, qname) ((hip_q)->q_indice->q[qname].read)
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#define QW(hip_q, qname) ((hip_q)->q_indice->q[qname].write)
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#endif
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