mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-07 08:48:05 -04:00
188 lines
5.1 KiB
C
188 lines
5.1 KiB
C
/*
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* drivers/battery/s2mu005_charger.h
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*
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* Header of S2MU005 Charger Driver
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*
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* Copyright (C) 2015 Samsung Electronics
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* Develope by Nguyen Tien Dat <tiendat.nt@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef S2MU005_CHARGER_H
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#define S2MU005_CHARGER_H
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#include <linux/mfd/samsung/s2mu005.h>
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#include <linux/mfd/samsung/s2mu005-private.h>
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#define MASK(width, shift) (((0x1 << (width)) - 1) << shift)
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#define S2MU005_CHG_STATUS0 0x08
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#define S2MU005_CHG_STATUS1 0x09
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#define S2MU005_CHG_STATUS2 0x0A
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#define S2MU005_CHG_STATUS3 0x0B
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#define S2MU005_CHG_STATUS4 0x0C
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#define S2MU005_CHG_STATUS5 0x0D
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#define S2MU005_CHG_CTRL0 0x0E
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#define S2MU005_CHG_CTRL1 0x0F
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#define S2MU005_CHG_CTRL2 0x10
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#define S2MU005_CHG_CTRL3 0x11
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#define S2MU005_CHG_CTRL4 0x12
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#define S2MU005_CHG_CTRL5 0x13
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#define S2MU005_CHG_CTRL6 0x14
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#define S2MU005_CHG_CTRL7 0x15
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#define S2MU005_CHG_CTRL8 0x16
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#define S2MU005_CHG_CTRL9 0x17
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#define S2MU005_CHG_CTRL10 0x18
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#define S2MU005_CHG_CTRL11 0x19
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#define S2MU005_CHG_CTRL12 0x1A
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#define S2MU005_CHG_CTRL13 0x1B
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#define S2MU005_CHG_CTRL14 0x1C
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#define S2MU005_CHG_CTRL15 0x1D
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#define S2MU005_CHG_CTRL16 0x1E
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#define S2MU005_CHG_CTRL17 0x1F
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#define S2MU005_CHG_CTRL18 0x20
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/* S2MU005_SC_INT_MASK */
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#define VMID_M_SHIFT 5
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#define VMID_M_MASK BIT(VMID_M_SHIFT)
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/* S2MU005_CHG_STATUS0 */
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#define VBUS_OK_SHIFT 7
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#define VBUS_OK_MASK BIT(VBUS_OK_SHIFT)
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#define WCIN_OK_SHIFT 6
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#define S2MU005_WCIN_OK_MASK BIT(WCIN_OK_SHIFT)
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#define VMID_OK_SHIFT 5
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#define VMID_OK_MASK BIT(VMID_OK_SHIFT)
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#define CHG_OK_SHIFT 4
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#define CHG_OK_MASK BIT(CHG_OK_SHIFT)
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#define CHG_STATUS_SHIFT 0
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#define CHG_STATUS_WIDTH 4
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#define CHG_STATUS_MASK MASK(CHG_STATUS_WIDTH, CHG_STATUS_SHIFT)
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#define CHG_STATUS_PRE_CHARGE 2
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#define CHG_STATUS_COOL_CHARGE 3
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#define CHG_STATUS_CC 4
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#define CHG_STATUS_CV 5
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#define CHG_STATUS_DONE_FLAG 6
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#define CHG_STATUS_TOP_OFF 7
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#define CHG_STATUS_DONE 8
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/* S2MU005_CHG_STATUS1 */
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#define DET_BAT_STATUS_SHIFT 7
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#define DET_BAT_STATUS_MASK BIT(DET_BAT_STATUS_SHIFT)
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/* S2MU005_CHG_STATUS2 */
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#define BAT_STATUS_SHIFT 4
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#define BAT_STATUS_WIDTH 3
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#define BAT_STATUS_MASK MASK(BAT_STATUS_WIDTH, BAT_STATUS_SHIFT)
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#define BAT_OVP_DET 0
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#define BAT_SELF_DISCHARGING 1
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#define LOW_BATTERY_DETECTION_IN_CHARGING 2
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#define COOL_CHARGE_DET 5
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#define FAST_CHARGE_DET 6
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#define BAT_VOL_DET 7
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/* S2MU005_CHG_STATUS3 */
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#define CHG_EVENT_STATUS_SHIFT 0
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#define CHG_EVENT_STATUS_WIDTH 4
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#define CHG_EVENT_STATUS_MASK MASK(CHG_EVENT_STATUS_WIDTH, CHG_EVENT_STATUS_SHIFT)
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#define THREMAL_SHUT_DOWN 1
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#define THERMAL_FOLDBACK 2
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#define VSYS_OVER_VOVP 3
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#define VSYS_OVER_VUVLO 4
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#define WATCHDOG_SUSPENSION 5
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#define WATCHDOG_AP_RESET 6
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/* S2MU005_CHG_CTRL0 */
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#define EN_CHG_SHIFT 4
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#define EN_CHG_MASK BIT(EN_CHG_SHIFT)
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#define REG_MODE_SHIFT 0
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#define REG_MODE_WIDTH 3
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#define REG_MODE_MASK MASK(REG_MODE_WIDTH, REG_MODE_SHIFT)
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/* S2MU005_CHG_CTRL1 */
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#define SET_VIN_DROP_SHIFT 4
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#define SET_VIN_DROP_WIDTH 3
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#define SET_VIN_DROP_MASK MASK(SET_VIN_DROP_WIDTH, SET_VIN_DROP_SHIFT)
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/* S2MU005_CHG_CTRL2 */
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#define INPUT_CURRENT_LIMIT_SHIFT 0
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#define INPUT_CURRENT_LIMIT_WIDTH 6
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#define INPUT_CURRENT_LIMIT_MASK MASK(INPUT_CURRENT_LIMIT_WIDTH,\
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INPUT_CURRENT_LIMIT_SHIFT)
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/* S2MU005_CHG_CTRL4 */
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#define OTG_OCP_SW_ON_SHIFT 5
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#define OTG_OCP_SW_ON_MASK BIT(OTG_OCP_SW_ON_SHIFT)
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#define OTG_OCP_SW_OFF_SHIFT 4
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#define OTG_OCP_SW_OFF_MASK BIT(OTG_OCP_SW_OFF_SHIFT)
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#define SET_OTG_OCP_SHIFT 2
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#define SET_OTG_OCP_WIDTH 2
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#define SET_OTG_OCP_MASK MASK(SET_OTG_OCP_WIDTH, SET_OTG_OCP_SHIFT)
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/* S2MU005_CHG_CTRL5 */
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#define SET_VF_VMID_BST_SHIFT 0
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#define SET_VF_VMID_BST_WIDTH 5
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#define SET_VF_VMID_BST_MASK MASK(SET_VF_VMID_BST_WIDTH, SET_VF_VMID_BST_SHIFT)
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/* S2MU005_CHG_CTRL7 */
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#define FAST_CHARGING_CURRENT_SHIFT 0
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#define FAST_CHARGING_CURRENT_WIDTH 6
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#define FAST_CHARGING_CURRENT_MASK MASK(FAST_CHARGING_CURRENT_WIDTH,\
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FAST_CHARGING_CURRENT_SHIFT)
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/* S2MU005_CHG_CTRL8 */
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#define SET_VF_VBAT_SHIFT 1
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#define SET_VF_VBAT_WIDTH 6
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#define SET_VF_VBAT_MASK MASK(SET_VF_VBAT_WIDTH, SET_VF_VBAT_SHIFT)
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/* S2MU005_CHG_CTRL10 */
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#define SECOND_TOPOFF_CURRENT_SHIFT 4
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#define SECOND_TOPOFF_CURRENT_WIDTH 4
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#define SECOND_TOPOFF_CURRENT_MASK MASK(SECOND_TOPOFF_CURRENT_WIDTH,\
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SECOND_TOPOFF_CURRENT_SHIFT)
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#define FIRST_TOPOFF_CURRENT_SHIFT 0
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#define FIRST_TOPOFF_CURRENT_WIDTH 4
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#define FIRST_TOPOFF_CURRENT_MASK MASK(FIRST_TOPOFF_CURRENT_WIDTH,\
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FIRST_TOPOFF_CURRENT_SHIFT)
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/* S2MU005_CHG_CTRL11 */
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#define SET_OSC_BST_SHIFT 5
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#define SET_OSC_BST_WIDTH 2
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#define SET_OSC_BST_MASK MASK(SET_OSC_BST_WIDTH, SET_OSC_BST_SHIFT)
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#define SET_OSC_BUCK_SHIFT 3
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#define SET_OSC_BUCK_WIDTH 2
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#define SET_OSC_BUCK_MASK MASK(SET_OSC_BUCK_WIDTH, SET_OSC_BUCK_SHIFT)
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/* S2MU005_CHG_CTRL15 */
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#define T_EN_OTG_SHIFT 2
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#define T_EN_OTG_WIDTH 2
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#define T_EN_OTG_MASK MASK(T_EN_OTG_WIDTH, T_EN_OTG_SHIFT)
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#define FAKE_BAT_LEVEL 50
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enum {
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CHG_REG = 0,
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CHG_DATA,
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CHG_REGS,
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};
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struct charger_info {
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int dummy;
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};
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#endif /*S2MU005_CHARGER_H*/
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