mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-10-31 08:08:51 +01:00
152 lines
4.1 KiB
C
152 lines
4.1 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2009-2014 Realtek Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called LICENSE.
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*
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* Contact Information:
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* wlanfae <wlanfae@realtek.com>
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* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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* Hsinchu 300, Taiwan.
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*
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* Larry Finger <Larry.Finger@lwfinger.net>
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*
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*****************************************************************************/
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#include "../wifi.h"
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#include "reg.h"
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#include "def.h"
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#include "phy.h"
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#include "rf.h"
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#include "dm.h"
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static bool _rtl92ee_phy_rf6052_config_parafile(struct ieee80211_hw *hw);
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void rtl92ee_phy_rf6052_set_bandwidth(struct ieee80211_hw *hw, u8 bandwidth)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_phy *rtlphy = &rtlpriv->phy;
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switch (bandwidth) {
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case HT_CHANNEL_WIDTH_20:
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rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &
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0xfffff3ff) | BIT(10) | BIT(11));
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rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
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rtlphy->rfreg_chnlval[0]);
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rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, RFREG_OFFSET_MASK,
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rtlphy->rfreg_chnlval[0]);
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break;
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case HT_CHANNEL_WIDTH_20_40:
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rtlphy->rfreg_chnlval[0] = ((rtlphy->rfreg_chnlval[0] &
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0xfffff3ff) | BIT(10));
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rtl_set_rfreg(hw, RF90_PATH_A, RF_CHNLBW, RFREG_OFFSET_MASK,
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rtlphy->rfreg_chnlval[0]);
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rtl_set_rfreg(hw, RF90_PATH_B, RF_CHNLBW, RFREG_OFFSET_MASK,
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rtlphy->rfreg_chnlval[0]);
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break;
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default:
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RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
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"unknown bandwidth: %#X\n", bandwidth);
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break;
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}
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}
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bool rtl92ee_phy_rf6052_config(struct ieee80211_hw *hw)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_phy *rtlphy = &rtlpriv->phy;
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if (rtlphy->rf_type == RF_1T1R)
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rtlphy->num_total_rfpath = 1;
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else
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rtlphy->num_total_rfpath = 2;
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return _rtl92ee_phy_rf6052_config_parafile(hw);
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}
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static bool _rtl92ee_phy_rf6052_config_parafile(struct ieee80211_hw *hw)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_phy *rtlphy = &rtlpriv->phy;
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u32 u4_regvalue = 0;
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u8 rfpath;
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bool rtstatus = true;
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struct bb_reg_def *pphyreg;
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for (rfpath = 0; rfpath < rtlphy->num_total_rfpath; rfpath++) {
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pphyreg = &rtlphy->phyreg_def[rfpath];
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switch (rfpath) {
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case RF90_PATH_A:
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case RF90_PATH_C:
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u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
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BRFSI_RFENV);
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break;
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case RF90_PATH_B:
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case RF90_PATH_D:
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u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
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BRFSI_RFENV << 16);
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break;
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}
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rtl_set_bbreg(hw, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1);
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udelay(1);
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rtl_set_bbreg(hw, pphyreg->rfintfo, BRFSI_RFENV, 0x1);
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udelay(1);
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rtl_set_bbreg(hw, pphyreg->rfhssi_para2,
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B3WIREADDREAALENGTH, 0x0);
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udelay(1);
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rtl_set_bbreg(hw, pphyreg->rfhssi_para2, B3WIREDATALENGTH, 0x0);
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udelay(1);
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switch (rfpath) {
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case RF90_PATH_A:
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rtstatus = rtl92ee_phy_config_rf_with_headerfile(hw,
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(enum radio_path)rfpath);
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break;
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case RF90_PATH_B:
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rtstatus = rtl92ee_phy_config_rf_with_headerfile(hw,
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(enum radio_path)rfpath);
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break;
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case RF90_PATH_C:
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break;
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case RF90_PATH_D:
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break;
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}
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switch (rfpath) {
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case RF90_PATH_A:
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case RF90_PATH_C:
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rtl_set_bbreg(hw, pphyreg->rfintfs,
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BRFSI_RFENV, u4_regvalue);
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break;
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case RF90_PATH_B:
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case RF90_PATH_D:
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rtl_set_bbreg(hw, pphyreg->rfintfs,
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BRFSI_RFENV << 16, u4_regvalue);
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break;
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}
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if (!rtstatus) {
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RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
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"Radio[%d] Fail!!", rfpath);
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return false;
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}
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}
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RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "\n");
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return rtstatus;
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}
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