mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
synced 2025-09-08 17:18:05 -04:00
182 lines
5.4 KiB
C
182 lines
5.4 KiB
C
/*
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* max77804_charger.h
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* Samsung max77804 Charger Header
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*
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* Copyright (C) 2012 Samsung Electronics, Inc.
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*
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __MAX77804_CHARGER_H
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#define __MAX77804_CHARGER_H __FILE__
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#include <linux/mfd/core.h>
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#include <linux/mfd/max77804.h>
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#include <linux/mfd/max77804-private.h>
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#include <linux/regulator/machine.h>
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#if defined(CONFIG_V1A) || defined(CONFIG_N1A)
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#define max77888_charger
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#else
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#undef max77888_charger
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#endif
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#define ENABLE 1
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#define DISABLE 0
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/* macro */
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#define MAX(x, y) ((x) > (y) ? (x) : (y))
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#define MIN(x, y) ((x) < (y) ? (x) : (y))
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#define ABS(x) ((x) < 0 ? (-1 * (x)) : (x))
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/*
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* Use for battery
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*/
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#define OFF_CURR 0 /* charger off current */
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#define KEEP_CURR -1 /* keep previous current */
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/* MAX77803 CHG_CNFG_04 register */
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#define CHG_CNFG_04_CHG_CV_PRM_SHIFT 0
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#define CHG_CNFG_04_CHG_CV_PRM_MASK (0x1f << CHG_CNFG_04_CHG_CV_PRM_SHIFT)
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/* MAX77803 CHG_CNFG_12 register */
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#define CHG_CNFG_12_CHGINSEL_SHIFT 5
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#define CHG_CNFG_12_CHGINSEL_MASK (0x1 << CHG_CNFG_12_CHGINSEL_SHIFT)
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/* MAX77804_CHG_REG_CHG_INT */
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#define MAX77804_BYP_I (1 << 0)
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#define MAX77804_BATP_I (1 << 2)
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#define MAX77804_BAT_I (1 << 3)
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#define MAX77804_CHG_I (1 << 4)
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#define MAX77804_WCIN_I (1 << 5)
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#define MAX77804_CHGIN_I (1 << 6)
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/* MAX77804_CHG_REG_CHG_INT_MASK */
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#define MAX77804_BYP_IM (1 << 0)
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#define MAX77804_THM_IM (1 << 2)
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#define MAX77804_BAT_IM (1 << 3)
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#define MAX77804_CHG_IM (1 << 4)
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#define MAX77804_WCIN_IM (1 << 5)
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#define MAX77804_CHGIN_IM (1 << 6)
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/* MAX77804_CHG_REG_CHG_INT_OK */
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#define MAX77804_BYP_OK 0x01
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#define MAX77804_BYP_OK_SHIFT 0
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#define MAX77804_BATP_OK 0x04
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#define MAX77804_BATP_OK_SHIFT 2
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#define MAX77804_BAT_OK 0x08
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#define MAX77804_BAT_OK_SHIFT 3
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#define MAX77804_CHG_OK 0x10
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#define MAX77804_CHG_OK_SHIFT 4
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#define MAX77804_WCIN_OK 0x20
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#define MAX77804_WCIN_OK_SHIFT 5
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#define MAX77804_CHGIN_OK 0x40
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#define MAX77804_CHGIN_OK_SHIFT 6
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#define MAX77804_DETBAT 0x04
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#define MAX77804_DETBAT_SHIFT 2
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/* MAX77804_CHG_REG_CHG_DTLS_00 */
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#define MAX77804_BATP_DTLS 0x01
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#define MAX77804_BATP_DTLS_SHIFT 0
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#define MAX77804_WCIN_DTLS 0x18
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#define MAX77804_WCIN_DTLS_SHIFT 3
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#define MAX77804_CHGIN_DTLS 0x60
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#define MAX77804_CHGIN_DTLS_SHIFT 5
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/* MAX77804_CHG_REG_CHG_DTLS_01 */
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#define MAX77804_CHG_DTLS 0x0F
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#define MAX77804_CHG_DTLS_SHIFT 0
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#define MAX77804_BAT_DTLS 0x70
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#define MAX77804_BAT_DTLS_SHIFT 4
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/* MAX77804_CHG_REG_CHG_DTLS_02 */
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#define MAX77804_BYP_DTLS 0x0F
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#define MAX77804_BYP_DTLS_SHIFT 0
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#define MAX77804_BYP_DTLS0 0x1
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#define MAX77804_BYP_DTLS1 0x2
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#define MAX77804_BYP_DTLS2 0x4
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#define MAX77804_BYP_DTLS3 0x8
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/* MAX77804_CHG_REG_CHG_CNFG_00 */
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#define MAX77804_MODE_DEFAULT 0x04
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#define MAX77804_MODE_CHGR 0x01
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#define MAX77804_MODE_OTG 0x02
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#define MAX77804_MODE_BUCK 0x04
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#define MAX77804_MODE_BOOST 0x08
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/* MAX77804_CHG_REG_CHG_CNFG_02 */
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#define MAX77804_CHG_CC 0x3F
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/* MAX77804_CHG_REG_CHG_CNFG_03 */
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#define MAX77804_CHG_TO_ITH 0x07
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/* MAX77804_CHG_REG_CHG_CNFG_04 */
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#define MAX77804_CHG_MINVSYS_MASK 0xE0
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#define MAX77804_CHG_MINVSYS_SHIFT 5
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#define MAX77804_CHG_PRM_MASK 0x1F
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#define MAX77804_CHG_PRM_SHIFT 0
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/* MAX77804_CHG_REG_CHG_CNFG_09 */
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#define MAX77804_CHG_CHGIN_LIM 0x7F
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/* MAX77804_CHG_REG_CHG_CNFG_12 */
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#define MAX77804_CHG_WCINSEL 0x40
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/* MAX77804_MUIC_REG_CDETCTRL1 */
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#define MAX77804_CHGTYPMAN 0x02
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#define MAX77804_CHGTYPMAN_SHIFT 1
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/* MAX77804_MUIC_REG_STATUS2 */
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#define MAX77804_VBVOLT 0x40
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#define MAX77804_VBVOLT_SHIFT 6
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#define MAX77804_CHGDETRUN 0x08
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#define MAX77804_CHGDETRUN_SHIFT 3
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#define MAX77804_CHGTYPE 0x07
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#define MAX77804_CHGTYPE_SHIFT 0
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/* irq */
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#define IRQ_DEBOUNCE_TIME 20 /* msec */
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/* charger type detection */
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#define DET_ERR_RETRY 5
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#define DET_ERR_DELAY 200
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/* soft charging */
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#define SOFT_CHG_START_CURR 100 /* mA */
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#define SOFT_CHG_START_DUR 100 /* ms */
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#define SOFT_CHG_CURR_STEP 100 /* mA */
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#define SOFT_CHG_STEP_DUR 20 /* ms */
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#define DEFAULT_AC_CURRENT 1600 /* mA */
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#define DEFAULT_USB_CURRENT 500 /* mA */
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enum {
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POWER_SUPPLY_VBUS_UNKNOWN = 0,
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POWER_SUPPLY_VBUS_UVLO,
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POWER_SUPPLY_VBUS_WEAK,
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POWER_SUPPLY_VBUS_OVLO,
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POWER_SUPPLY_VBUS_GOOD,
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};
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extern sec_battery_platform_data_t sec_battery_pdata;
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#if defined(CONFIG_TARGET_LOCALE_KOR)
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#define SEC_CHG_ATTR(_name) \
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{ \
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.attr = {.name = #_name, .mode = 0664}, \
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.show = sec_chg_show_attrs, \
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.store = sec_chg_store_attrs, \
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}
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enum {
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CHG_SIOP_INPUT_LIMIT = 0,
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};
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#endif
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#endif
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