mirror of
https://github.com/AetherDroid/android_kernel_samsung_on5xelte.git
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138 lines
3.9 KiB
C
138 lines
3.9 KiB
C
/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARC_SMP_H
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#define __ASM_ARC_SMP_H
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#ifdef CONFIG_SMP
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/threads.h>
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#define raw_smp_processor_id() (current_thread_info()->cpu)
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/* including cpumask.h leads to cyclic deps hence this Forward declaration */
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struct cpumask;
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/*
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* APIs provided by arch SMP code to generic code
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*/
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extern void arch_send_call_function_single_ipi(int cpu);
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extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
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/*
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* APIs provided by arch SMP code to rest of arch code
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*/
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extern void __init smp_init_cpus(void);
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extern void first_lines_of_secondary(void);
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extern const char *arc_platform_smp_cpuinfo(void);
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/*
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* API expected BY platform smp code (FROM arch smp code)
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*
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* smp_ipi_irq_setup:
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* Takes @cpu and @irq to which the arch-common ISR is hooked up
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*/
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extern int smp_ipi_irq_setup(int cpu, int irq);
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/*
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* struct plat_smp_ops - SMP callbacks provided by platform to ARC SMP
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*
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* @info: SoC SMP specific info for /proc/cpuinfo etc
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* @cpu_kick: For Master to kickstart a cpu (optionally at a PC)
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* @ipi_send: To send IPI to a @cpu
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* @ips_clear: To clear IPI received at @irq
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*/
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struct plat_smp_ops {
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const char *info;
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void (*cpu_kick)(int cpu, unsigned long pc);
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void (*ipi_send)(int cpu);
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void (*ipi_clear)(int irq);
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};
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/* TBD: stop exporting it for direct population by platform */
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extern struct plat_smp_ops plat_smp_ops;
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#else /* CONFIG_SMP */
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static inline void smp_init_cpus(void) {}
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static inline const char *arc_platform_smp_cpuinfo(void)
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{
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return "";
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}
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#endif /* !CONFIG_SMP */
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/*
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* ARC700 doesn't support atomic Read-Modify-Write ops.
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* Originally Interrupts had to be disabled around code to gaurantee atomicity.
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* The LLOCK/SCOND insns allow writing interrupt-hassle-free based atomic ops
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* based on retry-if-irq-in-atomic (with hardware assist).
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* However despite these, we provide the IRQ disabling variant
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*
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* (1) These insn were introduced only in 4.10 release. So for older released
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* support needed.
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*
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* (2) In a SMP setup, the LLOCK/SCOND atomiticity across CPUs needs to be
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* gaurantted by the platform (not something which core handles).
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* Assuming a platform won't, SMP Linux needs to use spinlocks + local IRQ
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* disabling for atomicity.
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*
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* However exported spinlock API is not usable due to cyclic hdr deps
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* (even after system.h disintegration upstream)
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* asm/bitops.h -> linux/spinlock.h -> linux/preempt.h
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* -> linux/thread_info.h -> linux/bitops.h -> asm/bitops.h
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*
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* So the workaround is to use the lowest level arch spinlock API.
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* The exported spinlock API is smart enough to be NOP for !CONFIG_SMP,
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* but same is not true for ARCH backend, hence the need for 2 variants
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*/
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#ifndef CONFIG_ARC_HAS_LLSC
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#include <linux/irqflags.h>
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#ifdef CONFIG_SMP
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#include <asm/spinlock.h>
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extern arch_spinlock_t smp_atomic_ops_lock;
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extern arch_spinlock_t smp_bitops_lock;
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#define atomic_ops_lock(flags) do { \
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local_irq_save(flags); \
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arch_spin_lock(&smp_atomic_ops_lock); \
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} while (0)
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#define atomic_ops_unlock(flags) do { \
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arch_spin_unlock(&smp_atomic_ops_lock); \
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local_irq_restore(flags); \
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} while (0)
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#define bitops_lock(flags) do { \
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local_irq_save(flags); \
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arch_spin_lock(&smp_bitops_lock); \
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} while (0)
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#define bitops_unlock(flags) do { \
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arch_spin_unlock(&smp_bitops_lock); \
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local_irq_restore(flags); \
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} while (0)
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#else /* !CONFIG_SMP */
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#define atomic_ops_lock(flags) local_irq_save(flags)
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#define atomic_ops_unlock(flags) local_irq_restore(flags)
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#define bitops_lock(flags) local_irq_save(flags)
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#define bitops_unlock(flags) local_irq_restore(flags)
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#endif /* !CONFIG_SMP */
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#endif /* !CONFIG_ARC_HAS_LLSC */
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#endif
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