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https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
mcd, preparations for msu support
This commit is contained in:
kub
parent
178a9b683c
commit
02ff025479
15 changed files with 153 additions and 170 deletions
113
pico/cd/memory.c
113
pico/cd/memory.c
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@ -23,6 +23,9 @@ MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)
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MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)
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#endif
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u32 pcd_base_address;
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#define BASE pcd_base_address
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// -----------------------------------------------------------------
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// provided by ASM code:
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@ -113,7 +116,7 @@ static u32 m68k_reg_read16(u32 a)
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d = Pico_mcd->s68k_regs[4]<<8;
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goto end;
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case 6:
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d = *(u16 *)(Pico_mcd->bios + 0x72);
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d = *(u16 *)(Pico.rom + 0x72);
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goto end;
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case 8:
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d = cdc_host_r();
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@ -169,8 +172,8 @@ void m68k_reg_write8(u32 a, u32 d)
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case 1:
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d &= 3;
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dold = Pico_mcd->m.busreq;
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if (!(d & 1))
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d |= 2; // verified: can't release bus on reset
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// if (!(d & 1))
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// d |= 2; // verified: can't release bus on reset
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if (dold == d)
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return;
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@ -185,7 +188,7 @@ void m68k_reg_write8(u32 a, u32 d)
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elprintf(EL_CDREGS, "m68k: resetting s68k");
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SekResetS68k();
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}
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if ((dold ^ d) & 2) {
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if (((dold & 3) == 1) != ((d & 3) == 1)) {
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elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);
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remap_prg_window(d, Pico_mcd->s68k_regs[3]);
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}
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@ -218,12 +221,12 @@ void m68k_reg_write8(u32 a, u32 d)
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remap_word_ram(d);
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goto write_comm;
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case 6:
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Pico_mcd->bios[MEM_BE2(0x72)] = d; // simple hint vector changer
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Pico.rom[MEM_BE2(0x72)] = d; // simple hint vector changer
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return;
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case 7:
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Pico_mcd->bios[MEM_BE2(0x73)] = d;
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Pico.rom[MEM_BE2(0x73)] = d;
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elprintf(EL_CDREGS, "hint vector set to %04x%04x",
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((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);
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((u16 *)Pico.rom)[0x70/2], ((u16 *)Pico.rom)[0x72/2]);
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return;
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case 8:
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(void) cdc_host_r(); // acts same as reading
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@ -659,7 +662,7 @@ static void PicoWriteM68k16_cell1(u32 a, u32 d)
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}
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#endif
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// RAM cart (40000 - 7fffff, optional)
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// RAM cart (400000 - 7fffff, optional)
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static u32 PicoReadM68k8_ramc(u32 a)
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{
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u32 d = 0;
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@ -685,6 +688,8 @@ static u32 PicoReadM68k8_ramc(u32 a)
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static u32 PicoReadM68k16_ramc(u32 a)
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{
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elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);
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if ((a & 0xfffffc) == BASE+0x100) // CD detection by MSU
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return (~a & 2) ? 0x5345 : 0x4741; // "SEGA"
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return PicoReadM68k8_ramc(a + 1);
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}
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@ -1093,13 +1098,12 @@ static const void *s68k_dec_write16[2][4] = {
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static void remap_prg_window(u32 r1, u32 r3)
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{
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// PRG RAM
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if (r1 & 2) {
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// PRG RAM, mapped to main CPU if sub is not running
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if ((r1 & 3) != 1) {
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void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3];
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cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);
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}
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else {
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m68k_map_unmap(0x020000, 0x03ffff);
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cpu68k_map_all_ram(BASE+0x020000, BASE+0x03ffff, bank, 0);
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} else {
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m68k_map_unmap(BASE+0x020000, BASE+0x03ffff);
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}
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}
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@ -1145,14 +1149,14 @@ static void remap_word_ram(u32 r3)
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// 2M mode.
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bank = Pico_mcd->word_ram2M;
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if (r3 & 1) {
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cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);
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cpu68k_map_all_ram(BASE+0x200000, BASE+0x23ffff, bank, 0);
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cpu68k_map_all_funcs(0x80000, 0xbffff,
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s68k_wordram_main_read8, s68k_wordram_main_read16,
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s68k_wordram_main_write8, s68k_wordram_main_write16, 1);
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} else {
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SLEEP;
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cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
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m68k_map_unmap(0x200000, 0x23ffff);
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m68k_map_unmap(BASE+0x200000, BASE+0x23ffff);
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}
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// TODO: handle 0x0c0000
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}
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@ -1161,11 +1165,11 @@ static void remap_word_ram(u32 r3)
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int m = (r3 & 0x18) >> 3;
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SLEEP;
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bank = Pico_mcd->word_ram1M[b0];
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cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);
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cpu68k_map_all_ram(BASE+0x200000, BASE+0x21ffff, bank, 0);
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bank = Pico_mcd->word_ram1M[b0 ^ 1];
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cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);
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// "cell arrange" on m68k
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cpu68k_map_all_funcs(0x220000, 0x23ffff,
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cpu68k_map_all_funcs(BASE+0x220000, BASE+0x23ffff,
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m68k_cell_read8[b0], m68k_cell_read16[b0],
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m68k_cell_write8[b0], m68k_cell_write16[b0], 0);
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// "decode format" on s68k
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@ -1187,7 +1191,7 @@ void pcd_state_loaded_mem(void)
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Pico_mcd->m.dmna_ret_2m &= 3;
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// restore hint vector
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*(u16 *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;
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*(u16 *)(Pico.rom + 0x72) = Pico_mcd->m.hint_vector;
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}
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#ifdef EMU_M68K
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@ -1196,6 +1200,10 @@ static void m68k_mem_setup_cd(void);
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PICO_INTERNAL void PicoMemSetupCD(void)
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{
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if (!Pico_mcd)
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Pico_mcd = plat_mmap(0x05000000, sizeof(mcd_state), 0, 0);
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pcd_base_address = (Pico.romsize > 0x20000 ? 0x400000 : 0x000000);
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// setup default main68k map
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PicoMemSetup();
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@ -1215,30 +1223,30 @@ PICO_INTERNAL void PicoMemSetupCD(void)
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cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_mcd_io, 1);
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// sub68k map
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cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);
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cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);
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cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);
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cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);
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cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 3);
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cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 3);
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cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 3);
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cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 3);
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// PRG RAM
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cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
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cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
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cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
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cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
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cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 1);
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cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 1);
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cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 2);
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cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 2);
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cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 2);
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cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 2);
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cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 3);
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cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 3);
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// BRAM
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cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);
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cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);
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cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);
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cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);
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cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 3);
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cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 3);
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cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 3);
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cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 3);
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// PCM, regs
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cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);
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cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);
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cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);
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cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);
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cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 3);
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cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 3);
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cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 3);
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cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 3);
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// RAMs
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remap_prg_window(2,1);
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@ -1265,37 +1273,6 @@ PICO_INTERNAL void PicoMemSetupCD(void)
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PicoCpuFS68k.write_byte = (void *)s68k_write8;
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PicoCpuFS68k.write_word = (void *)s68k_write16;
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PicoCpuFS68k.write_long = (void *)s68k_write32;
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// setup FAME fetchmap
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{
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#if defined __clang__ || defined HW_WUP
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volatile // prevent strange relocs from clang
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#endif
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uptr ptr_ram = (uptr)PicoMem.ram;
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int i;
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// M68k
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// by default, point everything to fitst 64k of ROM (BIOS)
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for (i = 0; i < M68K_FETCHBANK1; i++)
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PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
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// now real ROM (BIOS)
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for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
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PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom;
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// .. and RAM
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for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
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PicoCpuFM68k.Fetch[i] = ptr_ram - (i<<(24-FAMEC_FETCHBITS));
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// S68k
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// PRG RAM is default
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for (i = 0; i < M68K_FETCHBANK1; i++)
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PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
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// real PRG RAM
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for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
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PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->prg_ram;
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// WORD RAM 2M area
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for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
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PicoCpuFS68k.Fetch[i] = (uptr)Pico_mcd->word_ram2M - 0x80000;
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// remap_word_ram() will setup word ram for both
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}
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#endif
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#ifdef EMU_M68K
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m68k_mem_setup_cd();
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