mirror of
https://github.com/RaySollium99/picodrive.git
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sh2 memory access improvements, revive ARM asm memory functions
This commit is contained in:
kub
parent
adf39a13f9
commit
0495df5d0c
4 changed files with 140 additions and 100 deletions
1
Makefile
1
Makefile
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@ -48,6 +48,7 @@ asm_misc ?= 1
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asm_cdmemory ?= 1
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asm_mix ?= 1
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asm_32xdraw ?= 1
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asm_32xmemory ?= 1
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else # if not arm
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use_fame ?= 1
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use_cz80 ?= 1
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@ -1313,11 +1313,6 @@ out:
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return (s8)d;
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}
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static u32 REGPARM(2) sh2_read8_da(u32 a, SH2 *sh2)
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{
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return (s8)sh2->data_array[(a & 0xfff) ^ 1];
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}
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// for ssf2
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static u32 REGPARM(2) sh2_read8_rom(u32 a, SH2 *sh2)
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{
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@ -1374,11 +1369,6 @@ out_noprint:
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return (s16)d;
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}
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static u32 REGPARM(2) sh2_read16_da(u32 a, SH2 *sh2)
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{
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return ((s16 *)sh2->data_array)[(a & 0xffe) / 2];
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}
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static u32 REGPARM(2) sh2_read16_rom(u32 a, SH2 *sh2)
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{
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u32 bank = carthw_ssf2_banks[(a >> 19) & 7] << 19;
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@ -1399,12 +1389,6 @@ static u32 REGPARM(2) sh2_read32_cs0(u32 a, SH2 *sh2)
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return d1 | (d2 >> 16);
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}
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static u32 REGPARM(2) sh2_read32_da(u32 a, SH2 *sh2)
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{
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u32 d = *((u32 *)sh2->data_array + (a & 0xffc)/4);
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return (d << 16) | (d >> 16);
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}
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static u32 REGPARM(2) sh2_read32_rom(u32 a, SH2 *sh2)
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{
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u32 bank = carthw_ssf2_banks[(a >> 19) & 7] << 19;
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@ -1429,12 +1413,14 @@ void NOINLINE sh2_sdram_checks(u32 a, int t, SH2 *sh2)
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}
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}
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void inline sh2_da_checks(u32 a, int t, SH2 *sh2)
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#ifndef _ASM_32X_MEMORY_C
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static void sh2_da_checks(u32 a, int t, SH2 *sh2)
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{
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if (t)
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sh2_drc_wcheck_da(a, t, sh2);
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}
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#endif
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#endif
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static void REGPARM(3) sh2_write_ignore(u32 a, u32 d, SH2 *sh2)
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{
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@ -1477,6 +1463,11 @@ out:
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DRC_RESTORE_SR(sh2);
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}
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#ifdef _ASM_32X_MEMORY_C
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extern void REGPARM(3) sh2_write8_dram(u32 a, u32 d, SH2 *sh2);
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extern void REGPARM(3) sh2_write8_sdram(u32 a, u32 d, SH2 *sh2);
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extern void REGPARM(3) sh2_write8_da(u32 a, u32 d, SH2 *sh2);
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#else
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static void REGPARM(3) sh2_write8_dram(u32 a, u32 d, SH2 *sh2)
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{
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sh2_write8_dramN(sh2->p_dram, a, d);
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@ -1505,6 +1496,7 @@ static void REGPARM(3) sh2_write8_da(u32 a, u32 d, SH2 *sh2)
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sh2_da_checks(a, t, sh2);
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#endif
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}
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#endif
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// write16
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static void REGPARM(3) sh2_write16_unmapped(u32 a, u32 d, SH2 *sh2)
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@ -1544,6 +1536,11 @@ out:
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DRC_RESTORE_SR(sh2);
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}
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#ifdef _ASM_32X_MEMORY_C
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extern void REGPARM(3) sh2_write16_dram(u32 a, u32 d, SH2 *sh2);
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extern void REGPARM(3) sh2_write16_sdram(u32 a, u32 d, SH2 *sh2);
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extern void REGPARM(3) sh2_write16_da(u32 a, u32 d, SH2 *sh2);
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#else
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static void REGPARM(3) sh2_write16_dram(u32 a, u32 d, SH2 *sh2)
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{
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sh2_write16_dramN(sh2->p_dram, a, d);
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@ -1572,6 +1569,7 @@ static void REGPARM(3) sh2_write16_da(u32 a, u32 d, SH2 *sh2)
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sh2_da_checks(a, t, sh2);
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#endif
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}
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#endif
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static void REGPARM(3) sh2_write16_rom(u32 a, u32 d, SH2 *sh2)
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{
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@ -1613,6 +1611,11 @@ static void REGPARM(3) sh2_write32_cs0(u32 a, u32 d, SH2 *sh2)
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*pd = d | (v&m); \
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}
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#ifdef _ASM_32X_MEMORY_C
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extern void REGPARM(3) sh2_write32_dram(u32 a, u32 d, SH2 *sh2);
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extern void REGPARM(3) sh2_write32_sdram(u32 a, u32 d, SH2 *sh2);
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extern void REGPARM(3) sh2_write32_da(u32 a, u32 d, SH2 *sh2);
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#else
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static void REGPARM(3) sh2_write32_dram(u32 a, u32 d, SH2 *sh2)
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{
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sh2_write32_dramN(sh2->p_dram, a, d);
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@ -1647,6 +1650,7 @@ static void REGPARM(3) sh2_write32_da(u32 a, u32 d, SH2 *sh2)
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sh2_da_checks(a+2, u, sh2);
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#endif
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}
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#endif
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static void REGPARM(3) sh2_write32_rom(u32 a, u32 d, SH2 *sh2)
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{
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@ -1670,10 +1674,10 @@ u32 REGPARM(2) p32x_sh2_read8(u32 a, SH2 *sh2)
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sh2_map += SH2MAP_ADDR2OFFS_R(a);
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p = sh2_map->addr;
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if (map_flag_set(p))
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return ((sh2_read_handler *)(p << 1))(a, sh2);
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else
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if (!map_flag_set(p))
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return *(s8 *)((p << 1) + ((a & sh2_map->mask) ^ 1));
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else
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return ((sh2_read_handler *)(p << 1))(a, sh2);
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}
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u32 REGPARM(2) p32x_sh2_read16(u32 a, SH2 *sh2)
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@ -1683,10 +1687,10 @@ u32 REGPARM(2) p32x_sh2_read16(u32 a, SH2 *sh2)
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sh2_map += SH2MAP_ADDR2OFFS_R(a);
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p = sh2_map->addr;
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if (map_flag_set(p))
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return ((sh2_read_handler *)(p << 1))(a, sh2);
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else
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if (!map_flag_set(p))
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return *(s16 *)((p << 1) + (a & sh2_map->mask));
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else
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return ((sh2_read_handler *)(p << 1))(a, sh2);
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}
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u32 REGPARM(2) p32x_sh2_read32(u32 a, SH2 *sh2)
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@ -1961,9 +1965,11 @@ static void get_bios(void)
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#define MAP_MEMORY(m) ((uptr)(m) >> 1)
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#define MAP_HANDLER(h) ( ((uptr)(h) >> 1) | ((uptr)1 << (sizeof(uptr) * 8 - 1)) )
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static sh2_memmap sh2_read8_map[0x80], sh2_read16_map[0x80], sh2_read32_map[0x80];
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static sh2_memmap msh2_read8_map[0x80], msh2_read16_map[0x80], msh2_read32_map[0x80];
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static sh2_memmap ssh2_read8_map[0x80], ssh2_read16_map[0x80], ssh2_read32_map[0x80];
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// for writes we are using handlers only
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static sh2_write_handler *sh2_write8_map[0x80], *sh2_write16_map[0x80], *sh2_write32_map[0x80];
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static sh2_write_handler *msh2_write8_map[0x80], *msh2_write16_map[0x80], *msh2_write32_map[0x80];
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static sh2_write_handler *ssh2_write8_map[0x80], *ssh2_write16_map[0x80], *ssh2_write32_map[0x80];
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void Pico32xSwapDRAM(int b)
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{
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@ -1977,25 +1983,35 @@ void Pico32xSwapDRAM(int b)
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b ? m68k_write16_dram1_ow : m68k_write16_dram0_ow, 1);
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// SH2
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sh2_read8_map[0x04/2].addr = sh2_read8_map[0x24/2].addr =
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sh2_read16_map[0x04/2].addr = sh2_read16_map[0x24/2].addr =
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sh2_read32_map[0x04/2].addr = sh2_read32_map[0x24/2].addr = MAP_MEMORY(Pico32xMem->dram[b]);
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msh2_read8_map[0x04/2].addr = msh2_read8_map[0x24/2].addr =
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msh2_read16_map[0x04/2].addr = msh2_read16_map[0x24/2].addr =
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msh2_read32_map[0x04/2].addr = msh2_read32_map[0x24/2].addr = MAP_MEMORY(Pico32xMem->dram[b]);
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ssh2_read8_map[0x04/2].addr = ssh2_read8_map[0x24/2].addr =
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ssh2_read16_map[0x04/2].addr = ssh2_read16_map[0x24/2].addr =
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ssh2_read32_map[0x04/2].addr = ssh2_read32_map[0x24/2].addr = MAP_MEMORY(Pico32xMem->dram[b]);
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msh2.p_dram = ssh2.p_dram = Pico32xMem->dram[b]; // DRC conveniance ptr
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msh2.p_rom = ssh2.p_rom = Pico.rom;
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}
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static void bank_switch_rom_sh2(void)
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{
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if (!carthw_ssf2_active) {
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// easy
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sh2_read8_map[0x02/2].addr = sh2_read8_map[0x22/2].addr =
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sh2_read16_map[0x02/2].addr = sh2_read16_map[0x22/2].addr =
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sh2_read32_map[0x02/2].addr = sh2_read32_map[0x22/2].addr = MAP_MEMORY(Pico.rom);
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msh2_read8_map[0x02/2].addr = msh2_read8_map[0x22/2].addr =
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msh2_read16_map[0x02/2].addr = msh2_read16_map[0x22/2].addr =
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msh2_read32_map[0x02/2].addr = msh2_read32_map[0x22/2].addr = MAP_MEMORY(Pico.rom);
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ssh2_read8_map[0x02/2].addr = ssh2_read8_map[0x22/2].addr =
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ssh2_read16_map[0x02/2].addr = ssh2_read16_map[0x22/2].addr =
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ssh2_read32_map[0x02/2].addr = ssh2_read32_map[0x22/2].addr = MAP_MEMORY(Pico.rom);
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}
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else {
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sh2_read8_map[0x02/2].addr = sh2_read8_map[0x22/2].addr = MAP_HANDLER(sh2_read8_rom);
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sh2_read16_map[0x02/2].addr = sh2_read16_map[0x22/2].addr = MAP_HANDLER(sh2_read16_rom);
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sh2_read32_map[0x02/2].addr = sh2_read32_map[0x22/2].addr = MAP_HANDLER(sh2_read32_rom);
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msh2_read8_map[0x02/2].addr = msh2_read8_map[0x22/2].addr = MAP_HANDLER(sh2_read8_rom);
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msh2_read16_map[0x02/2].addr = msh2_read16_map[0x22/2].addr = MAP_HANDLER(sh2_read16_rom);
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msh2_read32_map[0x02/2].addr = msh2_read32_map[0x22/2].addr = MAP_HANDLER(sh2_read32_rom);
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ssh2_read8_map[0x02/2].addr = ssh2_read8_map[0x22/2].addr = MAP_HANDLER(sh2_read8_rom);
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ssh2_read16_map[0x02/2].addr = ssh2_read16_map[0x22/2].addr = MAP_HANDLER(sh2_read16_rom);
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ssh2_read32_map[0x02/2].addr = ssh2_read32_map[0x22/2].addr = MAP_HANDLER(sh2_read32_rom);
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}
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}
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@ -2062,81 +2078,98 @@ void PicoMemSetup32x(void)
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// SH2 maps: A31,A30,A29,CS1,CS0
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// all unmapped by default
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for (i = 0; i < ARRAY_SIZE(sh2_read8_map); i++) {
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sh2_read8_map[i].addr = MAP_HANDLER(sh2_read8_unmapped);
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sh2_read16_map[i].addr = MAP_HANDLER(sh2_read16_unmapped);
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sh2_read32_map[i].addr = MAP_HANDLER(sh2_read32_unmapped);
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for (i = 0; i < ARRAY_SIZE(msh2_read8_map); i++) {
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msh2_read8_map[i].addr = MAP_HANDLER(sh2_read8_unmapped);
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msh2_read16_map[i].addr = MAP_HANDLER(sh2_read16_unmapped);
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msh2_read32_map[i].addr = MAP_HANDLER(sh2_read32_unmapped);
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}
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for (i = 0; i < ARRAY_SIZE(sh2_write8_map); i++) {
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sh2_write8_map[i] = sh2_write8_unmapped;
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sh2_write16_map[i] = sh2_write16_unmapped;
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sh2_write32_map[i] = sh2_write32_unmapped;
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for (i = 0; i < ARRAY_SIZE(msh2_write8_map); i++) {
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msh2_write8_map[i] = sh2_write8_unmapped;
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msh2_write16_map[i] = sh2_write16_unmapped;
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msh2_write32_map[i] = sh2_write32_unmapped;
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}
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// "purge area"
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for (i = 0x40; i <= 0x5f; i++) {
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sh2_write8_map[i >> 1] =
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sh2_write16_map[i >> 1] =
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sh2_write32_map[i >> 1] = sh2_write_ignore;
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msh2_write8_map[i >> 1] =
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msh2_write16_map[i >> 1] =
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msh2_write32_map[i >> 1] = sh2_write_ignore;
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}
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// CS0
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sh2_read8_map[0x00/2].addr = sh2_read8_map[0x20/2].addr = MAP_HANDLER(sh2_read8_cs0);
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sh2_read16_map[0x00/2].addr = sh2_read16_map[0x20/2].addr = MAP_HANDLER(sh2_read16_cs0);
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sh2_read32_map[0x00/2].addr = sh2_read32_map[0x20/2].addr = MAP_HANDLER(sh2_read32_cs0);
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sh2_write8_map[0x00/2] = sh2_write8_map[0x20/2] = sh2_write8_cs0;
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sh2_write16_map[0x00/2] = sh2_write16_map[0x20/2] = sh2_write16_cs0;
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sh2_write32_map[0x00/2] = sh2_write32_map[0x20/2] = sh2_write32_cs0;
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msh2_read8_map[0x00/2].addr = msh2_read8_map[0x20/2].addr = MAP_HANDLER(sh2_read8_cs0);
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msh2_read16_map[0x00/2].addr = msh2_read16_map[0x20/2].addr = MAP_HANDLER(sh2_read16_cs0);
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msh2_read32_map[0x00/2].addr = msh2_read32_map[0x20/2].addr = MAP_HANDLER(sh2_read32_cs0);
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msh2_write8_map[0x00/2] = msh2_write8_map[0x20/2] = sh2_write8_cs0;
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msh2_write16_map[0x00/2] = msh2_write16_map[0x20/2] = sh2_write16_cs0;
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msh2_write32_map[0x00/2] = msh2_write32_map[0x20/2] = sh2_write32_cs0;
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// CS1 - ROM
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bank_switch_rom_sh2();
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sh2_read8_map[0x02/2].mask = sh2_read8_map[0x22/2].mask = 0x3fffff; // FIXME
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sh2_read16_map[0x02/2].mask = sh2_read16_map[0x22/2].mask = 0x3ffffe; // FIXME
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sh2_read32_map[0x02/2].mask = sh2_read32_map[0x22/2].mask = 0x3ffffc; // FIXME
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sh2_write16_map[0x02/2] = sh2_write16_map[0x22/2] = sh2_write16_rom;
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sh2_write32_map[0x02/2] = sh2_write32_map[0x22/2] = sh2_write32_rom;
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msh2_read8_map[0x02/2].mask = msh2_read8_map[0x22/2].mask = 0x3fffff; // FIXME
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msh2_read16_map[0x02/2].mask = msh2_read16_map[0x22/2].mask = 0x3ffffe; // FIXME
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msh2_read32_map[0x02/2].mask = msh2_read32_map[0x22/2].mask = 0x3ffffc; // FIXME
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msh2_write16_map[0x02/2] = msh2_write16_map[0x22/2] = sh2_write16_rom;
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msh2_write32_map[0x02/2] = msh2_write32_map[0x22/2] = sh2_write32_rom;
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// CS2 - DRAM
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sh2_read8_map[0x04/2].mask = sh2_read8_map[0x24/2].mask = 0x01ffff;
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sh2_read16_map[0x04/2].mask = sh2_read16_map[0x24/2].mask = 0x01fffe;
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sh2_read32_map[0x04/2].mask = sh2_read32_map[0x24/2].mask = 0x01fffc;
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sh2_write8_map[0x04/2] = sh2_write8_map[0x24/2] = sh2_write8_dram;
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sh2_write16_map[0x04/2] = sh2_write16_map[0x24/2] = sh2_write16_dram;
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sh2_write32_map[0x04/2] = sh2_write32_map[0x24/2] = sh2_write32_dram;
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msh2_read8_map[0x04/2].mask = msh2_read8_map[0x24/2].mask = 0x01ffff;
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msh2_read16_map[0x04/2].mask = msh2_read16_map[0x24/2].mask = 0x01fffe;
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msh2_read32_map[0x04/2].mask = msh2_read32_map[0x24/2].mask = 0x01fffc;
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msh2_write8_map[0x04/2] = msh2_write8_map[0x24/2] = sh2_write8_dram;
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msh2_write16_map[0x04/2] = msh2_write16_map[0x24/2] = sh2_write16_dram;
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msh2_write32_map[0x04/2] = msh2_write32_map[0x24/2] = sh2_write32_dram;
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// CS3 - SDRAM
|
||||
sh2_read8_map[0x06/2].addr = sh2_read8_map[0x26/2].addr =
|
||||
sh2_read16_map[0x06/2].addr = sh2_read16_map[0x26/2].addr =
|
||||
sh2_read32_map[0x06/2].addr = sh2_read32_map[0x26/2].addr = MAP_MEMORY(Pico32xMem->sdram);
|
||||
sh2_write8_map[0x06/2] = sh2_write8_map[0x26/2] = sh2_write8_sdram;
|
||||
sh2_write16_map[0x06/2] = sh2_write16_map[0x26/2] = sh2_write16_sdram;
|
||||
sh2_write32_map[0x06/2] = sh2_write32_map[0x26/2] = sh2_write32_sdram;
|
||||
sh2_read8_map[0x06/2].mask = sh2_read8_map[0x26/2].mask = 0x03ffff;
|
||||
sh2_read16_map[0x06/2].mask = sh2_read16_map[0x26/2].mask = 0x03fffe;
|
||||
sh2_read32_map[0x06/2].mask = sh2_read32_map[0x26/2].mask = 0x03fffc;
|
||||
msh2_read8_map[0x06/2].addr = msh2_read8_map[0x26/2].addr =
|
||||
msh2_read16_map[0x06/2].addr = msh2_read16_map[0x26/2].addr =
|
||||
msh2_read32_map[0x06/2].addr = msh2_read32_map[0x26/2].addr = MAP_MEMORY(Pico32xMem->sdram);
|
||||
msh2_write8_map[0x06/2] = msh2_write8_map[0x26/2] = sh2_write8_sdram;
|
||||
msh2_write16_map[0x06/2] = msh2_write16_map[0x26/2] = sh2_write16_sdram;
|
||||
msh2_write32_map[0x06/2] = msh2_write32_map[0x26/2] = sh2_write32_sdram;
|
||||
msh2_read8_map[0x06/2].mask = msh2_read8_map[0x26/2].mask = 0x03ffff;
|
||||
msh2_read16_map[0x06/2].mask = msh2_read16_map[0x26/2].mask = 0x03fffe;
|
||||
msh2_read32_map[0x06/2].mask = msh2_read32_map[0x26/2].mask = 0x03fffc;
|
||||
// SH2 data array
|
||||
sh2_read8_map[0xc0/2].addr = MAP_HANDLER(sh2_read8_da);
|
||||
sh2_read16_map[0xc0/2].addr = MAP_HANDLER(sh2_read16_da);
|
||||
sh2_read32_map[0xc0/2].addr = MAP_HANDLER(sh2_read32_da);
|
||||
sh2_write8_map[0xc0/2] = sh2_write8_da;
|
||||
sh2_write16_map[0xc0/2] = sh2_write16_da;
|
||||
sh2_write32_map[0xc0/2] = sh2_write32_da;
|
||||
msh2_read8_map[0xc0/2].mask = 0x0fff;
|
||||
msh2_read16_map[0xc0/2].mask = 0x0ffe;
|
||||
msh2_read32_map[0xc0/2].mask = 0x0ffc;
|
||||
msh2_write8_map[0xc0/2] = sh2_write8_da;
|
||||
msh2_write16_map[0xc0/2] = sh2_write16_da;
|
||||
msh2_write32_map[0xc0/2] = sh2_write32_da;
|
||||
// SH2 IO
|
||||
sh2_read8_map[0xff/2].addr = MAP_HANDLER(sh2_peripheral_read8);
|
||||
sh2_read16_map[0xff/2].addr = MAP_HANDLER(sh2_peripheral_read16);
|
||||
sh2_read32_map[0xff/2].addr = MAP_HANDLER(sh2_peripheral_read32);
|
||||
sh2_write8_map[0xff/2] = sh2_peripheral_write8;
|
||||
sh2_write16_map[0xff/2] = sh2_peripheral_write16;
|
||||
sh2_write32_map[0xff/2] = sh2_peripheral_write32;
|
||||
msh2_read8_map[0xff/2].addr = MAP_HANDLER(sh2_peripheral_read8);
|
||||
msh2_read16_map[0xff/2].addr = MAP_HANDLER(sh2_peripheral_read16);
|
||||
msh2_read32_map[0xff/2].addr = MAP_HANDLER(sh2_peripheral_read32);
|
||||
msh2_write8_map[0xff/2] = sh2_peripheral_write8;
|
||||
msh2_write16_map[0xff/2] = sh2_peripheral_write16;
|
||||
msh2_write32_map[0xff/2] = sh2_peripheral_write32;
|
||||
|
||||
memcpy(ssh2_read8_map, msh2_read8_map, sizeof(msh2_read8_map));
|
||||
memcpy(ssh2_read16_map, msh2_read16_map, sizeof(msh2_read16_map));
|
||||
memcpy(ssh2_read32_map, msh2_read32_map, sizeof(msh2_read32_map));
|
||||
memcpy(ssh2_write8_map, msh2_write8_map, sizeof(msh2_write8_map));
|
||||
memcpy(ssh2_write16_map, msh2_write16_map, sizeof(msh2_write16_map));
|
||||
memcpy(ssh2_write32_map, msh2_write32_map, sizeof(msh2_write32_map));
|
||||
|
||||
msh2_read8_map[0xc0/2].addr =
|
||||
msh2_read16_map[0xc0/2].addr =
|
||||
msh2_read32_map[0xc0/2].addr = MAP_MEMORY(msh2.data_array);
|
||||
ssh2_read8_map[0xc0/2].addr =
|
||||
ssh2_read16_map[0xc0/2].addr =
|
||||
ssh2_read32_map[0xc0/2].addr = MAP_MEMORY(ssh2.data_array);
|
||||
|
||||
// map DRAM area, both 68k and SH2
|
||||
Pico32xSwapDRAM(1);
|
||||
|
||||
msh2.read8_map = ssh2.read8_map = sh2_read8_map;
|
||||
msh2.read16_map = ssh2.read16_map = sh2_read16_map;
|
||||
msh2.read32_map = ssh2.read32_map = sh2_read32_map;
|
||||
msh2.write8_tab = ssh2.write8_tab = (const void **)(void *)sh2_write8_map;
|
||||
msh2.write16_tab = ssh2.write16_tab = (const void **)(void *)sh2_write16_map;
|
||||
msh2.write32_tab = ssh2.write32_tab = (const void **)(void *)sh2_write32_map;
|
||||
msh2.read8_map = msh2_read8_map; ssh2.read8_map = ssh2_read8_map;
|
||||
msh2.read16_map = msh2_read16_map; ssh2.read16_map = ssh2_read16_map;
|
||||
msh2.read32_map = msh2_read32_map; ssh2.read32_map = ssh2_read32_map;
|
||||
msh2.write8_tab = (const void **)(void *)msh2_write8_map;
|
||||
msh2.write16_tab = (const void **)(void *)msh2_write16_map;
|
||||
msh2.write32_tab = (const void **)(void *)msh2_write32_map;
|
||||
ssh2.write8_tab = (const void **)(void *)ssh2_write8_map;
|
||||
ssh2.write16_tab = (const void **)(void *)ssh2_write16_map;
|
||||
ssh2.write32_tab = (const void **)(void *)ssh2_write32_map;
|
||||
|
||||
sh2_drc_mem_setup(&msh2);
|
||||
sh2_drc_mem_setup(&ssh2);
|
||||
|
|
|
|||
|
|
@ -43,6 +43,7 @@
|
|||
.global sh2_write32_da
|
||||
.global sh2_write32_dram
|
||||
|
||||
#if 0
|
||||
sh2_read8_rom:
|
||||
ldr ip, [r1, #OFS_SH2_p_rom]
|
||||
eor r0, r0, #1
|
||||
|
|
@ -126,9 +127,10 @@ sh2_read32_dram:
|
|||
ldr r0, [ip, r0, lsr #SH2_DRAM_SHIFT]
|
||||
mov r0, r0, ror #16
|
||||
bx lr
|
||||
#endif
|
||||
|
||||
sh2_write8_sdram:
|
||||
@ preserve r0 and r2 for tail call
|
||||
@ preserve r0,r2 for tail call
|
||||
ldr ip, [r2, #OFS_SH2_p_sdram]
|
||||
eor r3, r0, #1
|
||||
mov r3, r3, lsl #SH2_RAM_SHIFT
|
||||
|
|
@ -139,7 +141,7 @@ sh2_write8_sdram:
|
|||
bic r0, r0, #1
|
||||
cmp r1, #0
|
||||
bxeq lr
|
||||
b sh2_drc_wcheck_ram
|
||||
b sh2_sdram_checks
|
||||
#else
|
||||
bx lr
|
||||
#endif
|
||||
|
|
@ -170,7 +172,7 @@ sh2_write8_dram:
|
|||
bx lr
|
||||
|
||||
sh2_write16_sdram:
|
||||
@ preserve r0 and r2 for tail call
|
||||
@ preserve r0,r2 for tail call
|
||||
ldr ip, [r2, #OFS_SH2_p_sdram]
|
||||
mov r3, r0, lsl #SH2_RAM_SHIFT
|
||||
mov r3, r3, lsr #SH2_RAM_SHIFT
|
||||
|
|
@ -180,7 +182,7 @@ sh2_write16_sdram:
|
|||
ldrb r1, [ip, r3, lsr #1]
|
||||
cmp r1, #0
|
||||
bxeq lr
|
||||
b sh2_drc_wcheck_ram
|
||||
b sh2_sdram_checks
|
||||
#else
|
||||
bx lr
|
||||
#endif
|
||||
|
|
@ -217,7 +219,7 @@ sh2_write16_dram:
|
|||
bx lr
|
||||
|
||||
sh2_write32_sdram:
|
||||
@ preserve r0 and r2 for tail call
|
||||
@ preserve r0,r2 for tail call
|
||||
ldr ip, [r2, #OFS_SH2_p_sdram]
|
||||
mov r1, r1, ror #16
|
||||
mov r3, r0, lsl #SH2_RAM_SHIFT
|
||||
|
|
@ -228,13 +230,13 @@ sh2_write32_sdram:
|
|||
cmp r1, #0
|
||||
beq 1f
|
||||
stmfd sp!, {r0, r2, ip, lr}
|
||||
bl sh2_drc_wcheck_ram
|
||||
b sh2_sdram_checks
|
||||
ldmfd sp!, {r0, r2, ip, lr}
|
||||
1: ldrb r1, [ip, #1]
|
||||
add r0, r0, #2
|
||||
cmp r1, #0
|
||||
bxeq lr
|
||||
add r0, r0, #2
|
||||
b sh2_drc_wcheck_ram
|
||||
b sh2_sdram_checks
|
||||
#else
|
||||
bx lr
|
||||
#endif
|
||||
|
|
@ -254,9 +256,9 @@ sh2_write32_da:
|
|||
bl sh2_drc_wcheck_da
|
||||
ldmfd sp!, {r0, r2, ip, lr}
|
||||
1: ldrb r1, [ip, #1]
|
||||
add r0, r0, #2
|
||||
cmp r1, #0
|
||||
bxeq lr
|
||||
add r0, r0, #2
|
||||
b sh2_drc_wcheck_da
|
||||
#else
|
||||
bx lr
|
||||
|
|
@ -266,11 +268,10 @@ sh2_write32_dram:
|
|||
ldr ip, [r2, #OFS_SH2_p_dram]
|
||||
tst r0, #SH2_DRAM_OW
|
||||
mov r3, r0, lsl #SH2_DRAM_SHIFT
|
||||
moveq r1, r1, ror #16
|
||||
mov r1, r1, ror #16
|
||||
streq r1, [ip, r3, lsr #SH2_DRAM_SHIFT]
|
||||
bxeq lr
|
||||
ldr r0, [ip, r3, lsr #SH2_DRAM_SHIFT]
|
||||
mov r1, r1, ror #16
|
||||
mov r2, #0
|
||||
tst r1, #0x00ff0000
|
||||
orrne r2, r2, #0x00ff0000
|
||||
|
|
|
|||
|
|
@ -10,6 +10,7 @@ asm_ym2612 = 0
|
|||
asm_misc = 0
|
||||
asm_cdmemory = 0
|
||||
asm_32xdraw = 0
|
||||
asm_32xmemory = 0
|
||||
asm_mix = 0
|
||||
endif
|
||||
|
||||
|
|
@ -73,6 +74,10 @@ ifeq "$(asm_32xdraw)" "1"
|
|||
DEFINES += _ASM_32X_DRAW
|
||||
SRCS_COMMON += $(R)pico/32x/draw_arm.S
|
||||
endif
|
||||
ifeq "$(asm_32xmemory)" "1"
|
||||
DEFINES += _ASM_32X_MEMORY_C
|
||||
SRCS_COMMON += $(R)pico/32x/memory_arm.s
|
||||
endif
|
||||
ifeq "$(asm_mix)" "1"
|
||||
SRCS_COMMON += $(R)pico/sound/mix_arm.S
|
||||
endif
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue