sh2 drc, wrap generated function ptrs if called from host

cpu/drc/emit_arm.c

@@ -1217,7 +1217,7 @@ static inline void emith_pool_adjust(int tcache_offs, int move_offs)
         EOP_C_BX(A_COND_AL, r); \
 } while (0)
 
-#define emith_call_ctx(offs) do { \
+#define emith_abicall_ctx(offs) do { \
 	emith_move_r_r(LR, PC); \
 	emith_jump_ctx(offs); \
 } while (0)
@@ -1261,6 +1261,9 @@ static inline void emith_pool_adjust(int tcache_offs, int move_offs)
 #define host_instructions_updated(base, end, force) \
 	do { if (force) emith_update_add(base, end); } while (0)
 
+#define host_call(addr, args) \
+	addr
+
 #define host_arg2reg(rd, arg) \
 	rd = arg
 

cpu/drc/emit_arm64.c

@@ -1061,6 +1061,9 @@ static void emith_ldst_offs(int sz, int rd, int rn, int o9, int ld, int mode)
 		} \
 } while (0)
 
+#define host_call(addr, args) \
+	addr
+
 #define host_arg2reg(rd, arg) \
 	rd = arg
 
@@ -1136,7 +1139,7 @@ static void emith_ldst_offs(int sz, int rd, int rn, int o9, int ld, int mode)
 #define emith_call_reg(r) \
 	EMIT(A64_BLR(r))
 
-#define emith_call_ctx(offs) do { \
+#define emith_abicall_ctx(offs) do { \
 	int _t = rcache_get_tmp(); \
 	emith_ctx_read_ptr(_t, offs); \
 	emith_call_reg(_t); \

cpu/drc/emit_mips.c

@@ -1393,6 +1393,9 @@ static void emith_lohi_nops(void)
 	if (_s) emith_add_r_r_ptr_imm(SP, SP, _s); \
 } while (0)
 
+#define host_call(addr, args) \
+	addr
+
 #define host_arg2reg(rd, arg) \
 	rd = (arg+4)
 
@@ -1602,7 +1605,7 @@ static int emith_cond_check(int cond, int *r)
 
 #define emith_call_reg(r) \
 	emith_branch(MIPS_JALR(LR, r))
-#define emith_call_ctx(offs) do { \
+#define emith_abicall_ctx(offs) do { \
 	emith_ctx_read_ptr(CR, offs); \
 	emith_call_reg(CR); \
 } while (0)

cpu/drc/emit_ppc.c

@@ -1307,6 +1307,17 @@ static void emith_add_imm(int rt, int ra, u32 imm)
 	if (_s) emith_add_r_r_ptr_imm(SP, SP, _s); \
 } while (0)
 
+#if defined __PS3__
+// on PS3 a C function pointer points to an array of 2 ptrs containing the start
+// address and the TOC pointer for this function. TOC isn't used by the DRC though.
+static void *fptr[2];
+#define host_call(addr, args)	(fptr[0] = addr, (void (*) args)fptr)
+#else
+// with ELF we have the PLT which wraps functions needing any ABI register setup,
+// hence a function ptr is simply the entry address of the function to execute.
+#define host_call(addr, args)	addr
+#endif
+
 #define host_arg2reg(rt, arg) \
 	rt = (arg+3)
 
@@ -1500,7 +1511,7 @@ static int emith_cond_check(int cond)
 	EMIT(PPC_BLCTRCOND(BXX)); \
 } while(0)
 
-#define emith_call_ctx(offs) do { \
+#define emith_abicall_ctx(offs) do { \
 	emith_ctx_read_ptr(CR, offs); \
 	emith_call_reg(CR); \
 } while (0)

cpu/drc/emit_riscv.c

@@ -1186,6 +1186,9 @@ static void emith_st_offs(int sz, int rt, int rs, int o12)
 	if (_s) emith_add_r_r_ptr_imm(SP, SP, _s); \
 } while (0)
 
+#define host_call(addr, args) \
+	addr
+
 #define host_arg2reg(rd, arg) \
 	rd = (arg+10)
 
@@ -1386,7 +1389,7 @@ static int emith_cond_check(int cond, int *r, int *s)
 #define emith_call_reg(r) \
 	EMIT(R5_JALR(LR, r, 0))
 
-#define emith_call_ctx(offs) do { \
+#define emith_abicall_ctx(offs) do { \
 	emith_ctx_read_ptr(AT, offs); \
 	emith_call_reg(AT); \
 } while (0)

cpu/drc/emit_x86.c

@@ -937,7 +937,7 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI,	// x86-64,i386 common
 	EMIT_OP_MODRM(0xff, 3, 2, (r)&7); \
 } while (0)
 
-#define emith_call_ctx(offs) do { \
+#define emith_abicall_ctx(offs) do { \
 	EMIT_OP_MODRM(0xff, 2, 2, CONTEXT_REG); \
 	EMIT(offs, u32); \
 } while (0)
@@ -1043,6 +1043,9 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI,	// x86-64,i386 common
 
 #define emith_rw_offs_max()	0xffffffffU
 
+#define host_call(addr, args)
+	addr
+
 #ifdef __x86_64__
 
 #define HOST_REGS 16