mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
cd sync improvements, part2
This commit is contained in:
notaz
parent
bc3c13d329
commit
08769494e8
6 changed files with 159 additions and 161 deletions
178
pico/cd/memory.c
178
pico/cd/memory.c
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@ -65,32 +65,23 @@ void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);
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void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);
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#endif
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static void remap_prg_window(void);
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static void remap_prg_window(int r3);
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static void remap_word_ram(int r3);
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// poller detection
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#define POLL_LIMIT 16
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#define POLL_CYCLES 124
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unsigned int s68k_poll_adclk, s68k_poll_cnt;
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void m68k_comm_check(u32 a)
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u32 m68k_comm_check(u32 a, u32 d)
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{
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pcd_sync_s68k(SekCyclesDone());
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/*if (Pico_mcd->m.m68k_comm_dirty & (1 << a/2)) {
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Pico_mcd->m.m68k_comm_dirty &= ~(1 << a/2);
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Pico_mcd->m.m68k_poll_a = Pico_mcd->m.m68k_poll_cnt = 0;
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return;
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}
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pcd_sync_s68k(SekCyclesDone(), 0);
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if (a != Pico_mcd->m.m68k_poll_a) {
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Pico_mcd->m.m68k_poll_a = a;
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Pico_mcd->m.m68k_poll_cnt = 0;
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return;
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return d;
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}
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if (++Pico_mcd->m.m68k_poll_cnt > 5)
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SekCyclesBurnRun(122);
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elprintf(EL_CDPOLL, "m68k poll [%02x] %d %u", a,
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Pico_mcd->m.m68k_poll_cnt, SekCyclesDone());*/
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Pico_mcd->m.m68k_poll_cnt++;
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return d;
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}
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#ifndef _ASM_CD_MEMORY_C
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@ -104,10 +95,9 @@ static u32 m68k_reg_read16(u32 a)
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d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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goto end;
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case 2:
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m68k_comm_check(a);
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d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);
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goto end;
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goto end_comm;
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case 4:
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d = Pico_mcd->s68k_regs[4]<<8;
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goto end;
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@ -131,16 +121,17 @@ static u32 m68k_reg_read16(u32 a)
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if (a < 0x30) {
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// comm flag/cmd/status (0xE-0x2F)
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m68k_comm_check(a);
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d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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goto end;
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goto end_comm;
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}
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elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);
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end:
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return d;
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end_comm:
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return m68k_comm_check(a, d);
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}
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#endif
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@ -152,19 +143,24 @@ void m68k_reg_write8(u32 a, u32 d)
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u32 dold;
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a &= 0x3f;
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Pico_mcd->m.m68k_poll_a = 0;
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Pico_mcd->m.m68k_poll_a =
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Pico_mcd->m.m68k_poll_cnt = 0;
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switch (a) {
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case 0:
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d &= 1;
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if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }
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if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {
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elprintf(EL_INTS, "m68k: s68k irq 2");
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pcd_sync_s68k(SekCyclesDone(), 0);
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SekInterruptS68k(2);
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}
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return;
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case 1:
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d &= 3;
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elprintf(EL_CDREGS, "d m.busreq %u %u", d, Pico_mcd->m.busreq);
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if (d == Pico_mcd->m.busreq)
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return;
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pcd_sync_s68k(SekCyclesDone());
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pcd_sync_s68k(SekCyclesDone(), 0);
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if ((Pico_mcd->m.busreq ^ d) & 1) {
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elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
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@ -177,7 +173,7 @@ void m68k_reg_write8(u32 a, u32 d)
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}
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if ((Pico_mcd->m.busreq ^ d) & 2) {
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elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);
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remap_prg_window();
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remap_prg_window(Pico_mcd->s68k_regs[3]);
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}
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Pico_mcd->m.busreq = d;
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return;
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@ -194,24 +190,19 @@ void m68k_reg_write8(u32 a, u32 d)
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if (dold & 4) { // 1M mode
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d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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} else {
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if ((d ^ dold) & d & 2) { // DMNA is being set
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if ((d ^ dold) & d & 2) { // DMNA is being set
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dold &= ~1; // return word RAM to s68k
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/* Silpheed hack: bset(w3), r3, btst, bne, r3 */
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SekEndRun(20+16+10+12+16);
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}
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}
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Pico_mcd->s68k_regs[3] = (d & 0xc2) | (dold & 0x1f);
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d = (d & 0xc2) | (dold & 0x1f);
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if ((d ^ dold) & 0xc0) {
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elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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remap_prg_window();
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elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",
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(Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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remap_prg_window(d);
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}
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#ifdef USE_POLL_DETECT
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if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
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SekSetStopS68k(0); s68k_poll_adclk = 0;
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elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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}
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#endif
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return;
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goto write_comm;
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case 6:
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Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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return;
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@ -220,34 +211,30 @@ void m68k_reg_write8(u32 a, u32 d)
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elprintf(EL_CDREGS, "hint vector set to %04x%04x",
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((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);
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return;
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case 0xf:
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case 0x0f:
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d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
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case 0xe:
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if (d != Pico_mcd->s68k_regs[0xe]) {
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pcd_sync_s68k(SekCyclesDone());
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Pico_mcd->s68k_regs[0xe] = d;
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}
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#ifdef USE_POLL_DETECT
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if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
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SekSetStopS68k(0); s68k_poll_adclk = 0;
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elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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}
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#endif
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return;
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a = 0x0e;
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case 0x0e:
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goto write_comm;
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}
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if ((a&0xf0) == 0x10) {
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Pico_mcd->s68k_regs[a] = d;
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#ifdef USE_POLL_DETECT
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if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
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SekSetStopS68k(0); s68k_poll_adclk = 0;
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elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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}
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#endif
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return;
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}
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if ((a&0xf0) == 0x10)
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goto write_comm;
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elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);
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return;
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write_comm:
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if (d == Pico_mcd->s68k_regs[a])
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return;
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Pico_mcd->s68k_regs[a] = d;
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pcd_sync_s68k(SekCyclesDone(), 0);
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if (Pico_mcd->m.s68k_poll_a == a && Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {
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SekSetStopS68k(0);
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Pico_mcd->m.s68k_poll_a = 0;
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elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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}
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}
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#ifndef _ASM_CD_MEMORY_C
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@ -256,24 +243,26 @@ static
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u32 s68k_poll_detect(u32 a, u32 d)
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{
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#ifdef USE_POLL_DETECT
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// needed mostly for Cyclone, which doesn't always check it's cycle counter
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if (SekIsStoppedS68k()) return d;
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// polling detection
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if (a == (s68k_poll_adclk&0xff)) {
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unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
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u32 cycles, cnt = 0;
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if (SekIsStoppedS68k())
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return d;
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cycles = SekCyclesDoneS68k();
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if (a == Pico_mcd->m.s68k_poll_a) {
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u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;
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if (clkdiff <= POLL_CYCLES) {
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s68k_poll_cnt++;
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//printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
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if (s68k_poll_cnt > POLL_LIMIT) {
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cnt = Pico_mcd->m.s68k_poll_cnt + 1;
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//printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);
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if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {
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SekSetStopS68k(1);
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elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);
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elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x",
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SekPcS68k, a);
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}
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s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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return d;
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}
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}
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s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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s68k_poll_cnt = 0;
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Pico_mcd->m.s68k_poll_a = a;
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Pico_mcd->m.s68k_poll_clk = cycles;
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Pico_mcd->m.s68k_poll_cnt = cnt;
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#endif
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return d;
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}
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@ -384,7 +373,7 @@ void s68k_reg_write8(u32 a, u32 d)
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if (d & 1)
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d &= ~2; // DMNA clears
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}
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break;
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goto write_comm;
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}
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case 4:
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elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);
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@ -405,9 +394,12 @@ void s68k_reg_write8(u32 a, u32 d)
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// does this also reset internal 384 cycle counter?
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Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();
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return;
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case 0xe:
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case 0x0e:
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d &= 0xff;
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d = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
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break;
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a = 0x0f;
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case 0x0f:
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goto write_comm;
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case 0x31: // 384 cycle int3 timer
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d &= 0xff;
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elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);
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@ -444,16 +436,23 @@ void s68k_reg_write8(u32 a, u32 d)
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return;
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}
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if ((a&0x1f0) == 0x20)
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goto write_comm;
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if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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{
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elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);
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return;
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}
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if (a < 0x30)
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Pico_mcd->m.m68k_comm_dirty |= (1 << a/2);
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Pico_mcd->s68k_regs[a] = (u8) d;
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return;
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write_comm:
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Pico_mcd->s68k_regs[a] = (u8) d;
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if (Pico_mcd->m.m68k_poll_cnt)
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SekEndRunS68k(0);
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Pico_mcd->m.m68k_poll_cnt = 0;
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}
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// -----------------------------------------------------------------
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@ -611,20 +610,10 @@ static void PicoWriteM68k16_io(u32 a, u32 d)
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{
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if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
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elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
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/* TODO FIXME?
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if (a == 0xe) { // special case, 2 byte writes would be handled differently
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Pico_mcd->s68k_regs[0xe] = d >> 8;
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#ifdef USE_POLL_DETECT
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if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
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SekSetStopS68k(0); s68k_poll_adclk = 0;
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elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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}
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#endif
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return;
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}
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*/
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m68k_reg_write8(a, d >> 8);
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m68k_reg_write8(a + 1, d & 0xff);
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if ((a & 0x3e) != 0x0e) // special case
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m68k_reg_write8(a + 1, d & 0xff);
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return;
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}
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@ -965,11 +954,11 @@ static const void *s68k_dec_write16[2][4] = {
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// -----------------------------------------------------------------
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static void remap_prg_window(void)
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static void remap_prg_window(int r3)
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{
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// PRG RAM
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if (Pico_mcd->m.busreq & 2) {
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void *bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6];
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void *bank = Pico_mcd->prg_ram_b[r3 >> 6];
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cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);
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}
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else {
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@ -1034,7 +1023,7 @@ void pcd_state_loaded_mem(void)
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if (r3 & 4) // 1M mode?
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wram_2M_to_1M(Pico_mcd->word_ram2M);
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remap_word_ram(r3);
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remap_prg_window();
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remap_prg_window(r3);
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// restore hint vector
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*(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;
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@ -1144,9 +1133,6 @@ PICO_INTERNAL void PicoMemSetupCD(void)
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#ifdef EMU_M68K
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m68k_mem_setup_cd();
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#endif
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// m68k_poll_addr = m68k_poll_cnt = 0;
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s68k_poll_adclk = s68k_poll_cnt = 0;
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}
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