port to updated Cyclone, debug menu

git-svn-id: file:///home/notaz/opt/svn/PicoDrive@217 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz 2007-08-05 19:41:41 +00:00
parent 3335750a7d
commit 0af33fe0ef
14 changed files with 170 additions and 91 deletions

View file

@ -63,7 +63,7 @@ int PicoAreaPackCpu(unsigned char *cpu, int is_sub)
*(unsigned int *)(cpu+0x44)=CycloneGetSr(context);
*(unsigned int *)(cpu+0x48)=context->osp;
cpu[0x4c] = context->irq;
cpu[0x4d] = context->stopped;
cpu[0x4d] = context->state_flags & 1;
#endif
#ifdef EMU_M68K
@ -102,7 +102,9 @@ int PicoAreaUnpackCpu(unsigned char *cpu, int is_sub)
context->membase=0;
context->pc = context->checkpc(*(unsigned int *)(cpu+0x40)); // Base pc
context->irq = cpu[0x4c];
context->stopped = cpu[0x4d];
context->state_flags = 0;
if (cpu[0x4d])
context->state_flags |= 1;
#endif
#ifdef EMU_M68K

View file

@ -22,8 +22,8 @@ typedef unsigned int u32;
extern unsigned int lastSSRamWrite; // used by serial SRAM code
#ifdef _ASM_MEMORY_C
u8 PicoRead8(u32 a);
u16 PicoRead16(u32 a);
u32 PicoRead8(u32 a);
u32 PicoRead16(u32 a);
void PicoWriteRomHW_SSF2(u32 a,u32 d);
void PicoWriteRomHW_in1 (u32 a,u32 d);
#endif
@ -69,11 +69,13 @@ static u32 CPU_CALL PicoCheckPc(u32 pc)
u32 ret=0;
#if defined(EMU_C68K)
pc-=PicoCpu.membase; // Get real pc
pc&=0xfffffe;
if (pc == 0)
// pc&=0xfffffe;
pc&=~1;
if ((pc<<8) == 0)
return (int)Pico.rom + Pico.romsize; // common crash condition, can happen if acc timing is off
PicoCpu.membase=PicoMemBase(pc);
PicoCpu.membase=PicoMemBase(pc&0x00ffffff);
PicoCpu.membase-=pc&0xff000000;
ret = PicoCpu.membase+pc;
#elif defined(EMU_A68K)
@ -264,7 +266,7 @@ static void OtherWrite8End(u32 a,u32 d,int realsize)
// Read Rom and read Ram
#ifndef _ASM_MEMORY_C
u8 CPU_CALL PicoRead8(u32 a)
u32 CPU_CALL PicoRead8(u32 a)
{
u32 d=0;
@ -312,12 +314,12 @@ u8 CPU_CALL PicoRead8(u32 a)
lastread_d[lrp_cyc++&15] = (u8)d;
}
#endif
return (u8)d;
return d;
}
u16 CPU_CALL PicoRead16(u32 a)
u32 CPU_CALL PicoRead16(u32 a)
{
u16 d=0;
u32 d=0;
if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
@ -326,14 +328,14 @@ u16 CPU_CALL PicoRead16(u32 a)
#if !(defined(EMU_C68K) && defined(EMU_M68K))
// sram
if(a >= SRam.start && a <= SRam.end && (Pico.m.sram_reg & 1)) {
d = (u16) SRAMRead(a);
d = SRAMRead(a);
goto end;
}
#endif
if (a<Pico.romsize) { d = *(u16 *)(Pico.rom+a); goto end; } // Rom
d = (u16)OtherRead16(a, 16);
d = OtherRead16(a, 16);
end:
//if ((a&0xe0ffff)==0xe0AF0E+0x69c||(a&0xe0ffff)==0xe0A9A8+0x69c||(a&0xe0ffff)==0xe0A9AA+0x69c||(a&0xe0ffff)==0xe0A9AC+0x69c)

View file

@ -102,7 +102,6 @@ u32 OtherRead16(u32 a, int realsize)
#if 1
if (!d) {
// needed by buggy Terminator (Sega CD)
extern int z80stopCycle;
int stop_before = SekCyclesDone() - z80stopCycle;
dprintf("stop before: %i", stop_before);
if (stop_before > 0 && stop_before <= 32) // Gens uses 16 here

View file

@ -21,7 +21,7 @@ int emustatus = 0;
void (*PicoWriteSound)(int len) = 0; // called once per frame at the best time to send sound buffer (PsndOut) to hardware
struct PicoSRAM SRam;
int z80startCycle = 0, z80stopCycle = 0; // in 68k cycles
int z80startCycle, z80stopCycle; // in 68k cycles
//int z80ExtraCycles = 0;
int PicoPad[2]; // Joypads, format is SACB RLDU
int PicoMCD = 0; // mega CD status: scd_started, reset_pending
@ -463,13 +463,13 @@ static void PicoRunZ80Simple(int line_from, int line_to)
if(!(PicoOpt&4) || Pico.m.z80Run == 0) { line_from_r = line_to_r; line_to_r = 0; }
if(z80startCycle != 0) {
if(z80startCycle != 0x01000000) {
line_from_r = vcounts[z80startCycle>>8]+1;
z80startCycle = 0;
z80startCycle = 0x01000000;
}
if(z80stopCycle != 0) {
if(z80stopCycle != 0x01000000) {
line_to_r = vcounts[z80stopCycle>>8]+1;
z80stopCycle = 0;
z80stopCycle = 0x01000000;
}
if(PicoOpt&1) {
@ -656,33 +656,47 @@ int PicoFrame(void)
// callback to output message from emu
void (*PicoMessage)(const char *msg)=NULL;
#if defined(__DEBUG_PRINT) || defined(WIN32)
#if defined(__DEBUG_PRINT) || defined(__GP2X__)
// tmp debug: dump some stuff
#define bit(r, x) ((r>>x)&1)
void z80_debug(char *dstr);
char *debugString()
char *debugString(void)
{
#if 1
static char dstr[1024];
unsigned char *reg=Pico.video.reg, r;
struct PicoVideo *pv=&Pico.video;
unsigned char *reg=pv->reg, r;
char *dstrp;
// dump some info
sprintf(dstr, "mode set 1: %02x\n", (r=reg[0]));
sprintf(dstr, "%sdisplay_disable: %i, M3: %i, palette: %i, ?, hints: %i\n\n", dstr, bit(r,0), bit(r,1), bit(r,2), bit(r,4));
sprintf(dstr, "%smode set 2: %02x\n", dstr, (r=reg[1]));
sprintf(dstr, "%sSMS/genesis: %i, pal: %i, dma: %i, vints: %i, disp: %i, TMS9918: %i\n\n",dstr, bit(r,2), bit(r,3), bit(r,4), bit(r,5), bit(r,6), bit(r,7));
sprintf(dstr, "%smode set 3: %02x\n", dstr, (r=reg[0xB]));
sprintf(dstr, "%sLSCR: %i, HSCR: %i, 2cell vscroll: %i, IE2: %i\n\n", dstr, bit(r,0), bit(r,1), bit(r,2), bit(r,3));
sprintf(dstr, "%smode set 4: %02x\n", dstr, (r=reg[0xC]));
sprintf(dstr, "%sinterlace: %i%i; cells: %i; shadow: %i\n\n", dstr, bit(r,2), bit(r,1), (r&0x80) ? 40 : 32, bit(r,3));
sprintf(dstr, "%sscroll size: w: %i; h: %i\n\n", dstr, reg[0x10]&3, (reg[0x10]&0x30)>>4);
sprintf(dstr, "%sSRAM: det: %i; eeprom: %i\n", dstr, bit(Pico.m.sram_reg, 4), bit(Pico.m.sram_reg, 2));
sprintf(dstr, "%sCPU state: PC: %06x cycles: %i\n", dstr, SekPc, SekCyclesDoneT());
dstrp = dstr;
sprintf(dstrp, "mode set 1: %02x\n", (r=reg[0])); dstrp+=strlen(dstrp);
sprintf(dstrp, "display_disable: %i, M3: %i, palette: %i, ?, hints: %i\n", bit(r,0), bit(r,1), bit(r,2), bit(r,4));
dstrp+=strlen(dstrp);
sprintf(dstrp, "mode set 2: %02x\n", (r=reg[1])); dstrp+=strlen(dstrp);
sprintf(dstrp, "SMS/gen: %i, pal: %i, dma: %i, vints: %i, disp: %i, TMS: %i\n", bit(r,2), bit(r,3), bit(r,4),
bit(r,5), bit(r,6), bit(r,7)); dstrp+=strlen(dstrp);
sprintf(dstrp, "mode set 3: %02x\n", (r=reg[0xB])); dstrp+=strlen(dstrp);
sprintf(dstrp, "LSCR: %i, HSCR: %i, 2cell vscroll: %i, IE2: %i\n", bit(r,0), bit(r,1), bit(r,2), bit(r,3)); dstrp+=strlen(dstrp);
sprintf(dstrp, "mode set 4: %02x\n", (r=reg[0xC])); dstrp+=strlen(dstrp);
sprintf(dstrp, "interlace: %i%i, cells: %i, shadow: %i\n", bit(r,2), bit(r,1), (r&0x80) ? 40 : 32, bit(r,3));
dstrp+=strlen(dstrp);
sprintf(dstrp, "scroll size: w: %i, h: %i SRAM: %i; eeprom: %i\n", reg[0x10]&3, (reg[0x10]&0x30)>>4,
bit(Pico.m.sram_reg, 4), bit(Pico.m.sram_reg, 2)); dstrp+=strlen(dstrp);
sprintf(dstrp, "pend int: v:%i, h:%i, vdp status: %04x\n", bit(pv->pending_ints,5), bit(pv->pending_ints,4), pv->status);
dstrp+=strlen(dstrp);
#ifdef EMU_C68K
for(r=0; r < 8; r++)
sprintf(dstr, "%sd%i=%08x, a%i=%08x\n", dstr, r, PicoCpu.d[r], r, PicoCpu.a[r]);
sprintf(dstrp, "M68k: PC: %06x, st_flg: %x, cycles: %u\n", SekPc, PicoCpu.state_flags, SekCyclesDoneT());
dstrp+=strlen(dstrp);
sprintf(dstrp, "d0=%08x, a0=%08x, osp=%08x, irql=%i\n", PicoCpu.d[0], PicoCpu.a[0], PicoCpu.osp, PicoCpu.irq); dstrp+=strlen(dstrp);
sprintf(dstrp, "d1=%08x, a1=%08x, sr=%04x\n", PicoCpu.d[1], PicoCpu.a[1], CycloneGetSr(&PicoCpu)); dstrp+=strlen(dstrp);
for(r=2; r < 8; r++) {
sprintf(dstrp, "d%i=%08x, a%i=%08x\n", r, PicoCpu.d[r], r, PicoCpu.a[r]); dstrp+=strlen(dstrp);
}
#endif
z80_debug(dstr);
sprintf(dstrp, "z80Run: %i, pal: %i, frame#: %i\n", Pico.m.z80Run, Pico.m.pal, Pico.m.frame_count); dstrp+=strlen(dstrp);
z80_debug(dstrp); dstrp+=strlen(dstrp);
if (strlen(dstr) > sizeof(dstr))
printf("warning: debug buffer overflow (%i/%i)\n", strlen(dstr), sizeof(dstr));
#else
struct PicoVideo *pvid=&Pico.video;

View file

@ -38,8 +38,8 @@ extern struct Cyclone PicoCpu, PicoCpuS68k;
}
#define SekPc (PicoCpu.pc-PicoCpu.membase)
#define SekPcS68k (PicoCpuS68k.pc-PicoCpuS68k.membase)
#define SekSetStop(x) { PicoCpu.stopped=x; if (x) PicoCpu.cycles=0; }
#define SekSetStopS68k(x) { PicoCpuS68k.stopped=x; if (x) PicoCpuS68k.cycles=0; }
#define SekSetStop(x) { PicoCpu.state_flags&=~1; if (x) { PicoCpu.state_flags|=1; PicoCpu.cycles=0; } }
#define SekSetStopS68k(x) { PicoCpuS68k.state_flags&=~1; if (x) { PicoCpuS68k.state_flags|=1; PicoCpuS68k.cycles=0; } }
#endif
#ifdef EMU_A68K

View file

@ -43,12 +43,13 @@ static int (*ResetCallback)()=DoReset;
#ifdef EMU_C68K
// interrupt acknowledgment
static void SekIntAck(int level)
static int SekIntAck(int level)
{
// try to emulate VDP's reaction to 68000 int ack
if (level == 4) Pico.video.pending_ints = 0;
else if(level == 6) Pico.video.pending_ints &= ~0x20;
PicoCpu.irq = 0;
return CYCLONE_INT_ACK_AUTOVECTOR;
}
static void SekResetAck()
@ -69,7 +70,7 @@ static int SekUnrecognizedOpcode()
// see if we are not executing trash
if (pc < 0x200 || (pc > Pico.romsize+4 && (pc&0xe00000)!=0xe00000)) {
PicoCpu.cycles = 0;
PicoCpu.stopped = 1;
PicoCpu.state_flags |= 1;
return 1;
}
#ifdef EMU_M68K // debugging cyclone
@ -92,6 +93,11 @@ static int SekIntAckM68K(int level)
CPU_INT_LEVEL = 0;
return M68K_INT_ACK_AUTOVECTOR;
}
static int SekTasCallback(void)
{
return 0; // no writeback
}
#endif
@ -118,6 +124,7 @@ int SekInit()
m68k_set_cpu_type(M68K_CPU_TYPE_68000);
m68k_init();
m68k_set_int_ack_callback(SekIntAckM68K);
m68k_set_tas_instr_callback(SekTasCallback);
m68k_pulse_reset(); // Init cpu emulator
m68k_set_context(oldcontext);
}
@ -132,7 +139,7 @@ int SekReset()
if (Pico.rom==NULL) return 1;
#ifdef EMU_C68K
PicoCpu.stopped=0;
PicoCpu.state_flags=0;
PicoCpu.osp=0;
PicoCpu.srh =0x27; // Supervisor mode
PicoCpu.flags=4; // Z set
@ -161,6 +168,13 @@ int SekReset()
int SekInterrupt(int irq)
{
#if defined(EMU_C68K) && defined(EMU_M68K)
{
extern unsigned int dbg_irq_level;
dbg_irq_level=irq;
return 0;
}
#endif
#ifdef EMU_C68K
PicoCpu.irq=irq;
#endif

View file

@ -7,7 +7,7 @@ typedef unsigned char u8;
static unsigned int pppc, ops=0;
extern unsigned int lastread_a, lastread_d[16], lastwrite_cyc_d[16], lastwrite_mus_d[16];
extern int lrp_cyc, lrp_mus, lwp_cyc, lwp_mus;
unsigned int old_regs[16], old_sr, ppop, have_illegal = 0;
unsigned int old_regs[16], old_sr, ppop, have_illegal = 0, dbg_irq_level = 0;
#undef dprintf
#define dprintf(f,...) printf("%05i:%03i: " f "\n",Pico.m.frame_count,Pico.m.scanline,##__VA_ARGS__)
@ -59,15 +59,22 @@ int CM_compareRun(int cyc)
memcpy(old_regs, PicoCpu.d, 4*16);
old_sr = CycloneGetSr(&PicoCpu);
/*
dprintf("---");
#if 0
{
char buff[128];
dprintf("---");
m68k_disassemble(buff, pppc, M68K_CPU_TYPE_68000);
dprintf("PC: %06x: %04x: %s", pppc, ppop, buff);
//dprintf("A7: %08x", PicoCpu.a[7]);
}
#endif
if (dbg_irq_level)
{
PicoCpu.irq=dbg_irq_level;
m68k_set_irq(dbg_irq_level);
dbg_irq_level=0;
}
*/
PicoCpu.cycles=1;
CycloneRun(&PicoCpu);
@ -99,8 +106,8 @@ int CM_compareRun(int cyc)
// compare PC
m68ki_cpu.pc&=~1;
if( SekPc != (m68ki_cpu.pc&0xffffff) ) {
dprintf("PC: %06x vs %06x", SekPc, m68ki_cpu.pc&0xffffff);
if( SekPc != (m68ki_cpu.pc/*&0xffffff*/) ) {
dprintf("PC: %06x vs %06x", SekPc, m68ki_cpu.pc/*&0xffffff*/);
err=1;
}
@ -139,19 +146,25 @@ int CM_compareRun(int cyc)
}
// stopped
if((PicoCpu.stopped && !m68ki_cpu.stopped) || (!PicoCpu.stopped && m68ki_cpu.stopped)) {
dprintf("stopped: %i vs %i", PicoCpu.stopped, m68ki_cpu.stopped);
if(((PicoCpu.state_flags&1) && !m68ki_cpu.stopped) || (!(PicoCpu.state_flags&1) && m68ki_cpu.stopped)) {
dprintf("stopped: %i vs %i", PicoCpu.state_flags&1, m68ki_cpu.stopped);
err=1;
}
// tracing
if(((PicoCpu.state_flags&2) && !m68ki_tracing) || (!(PicoCpu.state_flags&2) && m68ki_tracing)) {
dprintf("tracing: %i vs %i", PicoCpu.state_flags&2, m68ki_tracing);
err=1;
}
if(err) dumpPCandExit();
/*
#if 0
if (PicoCpu.a[7] < 0x00ff0000 || PicoCpu.a[7] >= 0x01000000)
{
PicoCpu.a[7] = m68ki_cpu.dar[15] = 0xff8000;
}
*/
#endif
#if 0
m68k_set_reg(M68K_REG_SR, ((mu_sr-1)&~0x2000)|(mu_sr&0x2000)); // broken
CycloneSetSr(&PicoCpu, ((mu_sr-1)&~0x2000)|(mu_sr&0x2000));

View file

@ -417,9 +417,9 @@ static void OtherWrite8End(u32 a, u32 d, int realsize)
//u8 PicoReadM68k8_(u32 a);
#ifdef _ASM_CD_MEMORY_C
u8 PicoReadM68k8(u32 a);
u32 PicoReadM68k8(u32 a);
#else
static u8 PicoReadM68k8(u32 a)
static u32 PicoReadM68k8(u32 a)
{
u32 d=0;
@ -468,17 +468,17 @@ static u8 PicoReadM68k8(u32 a)
#ifdef __debug_io
dprintf("r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPc);
#endif
return (u8)d;
return d;
}
#endif
#ifdef _ASM_CD_MEMORY_C
u16 PicoReadM68k16(u32 a);
u32 PicoReadM68k16(u32 a);
#else
static u16 PicoReadM68k16(u32 a)
static u32 PicoReadM68k16(u32 a)
{
u16 d=0;
u32 d=0;
if ((a&0xe00000)==0xe00000) { d=*(u16 *)(Pico.ram+(a&0xfffe)); goto end; } // Ram
@ -515,7 +515,7 @@ static u16 PicoReadM68k16(u32 a)
if ((a&0xffffc0)==0xa12000)
rdprintf("m68k_regs r16: [%02x] @%06x", a&0x3f, SekPc);
d = (u16)OtherRead16(a, 16);
d = OtherRead16(a, 16);
if ((a&0xffffc0)==0xa12000)
rdprintf("ret = %04x", d);
@ -778,9 +778,9 @@ static void PicoWriteM68k32(u32 a,u32 d)
// -----------------------------------------------------------------
#ifdef _ASM_CD_MEMORY_C
u8 PicoReadS68k8(u32 a);
u32 PicoReadS68k8(u32 a);
#else
static u8 PicoReadS68k8(u32 a)
static u32 PicoReadS68k8(u32 a)
{
u32 d=0;
@ -868,16 +868,15 @@ static u8 PicoReadS68k8(u32 a)
#ifdef __debug_io2
dprintf("s68k r8 : %06x, %02x @%06x", a&0xffffff, (u8)d, SekPcS68k);
#endif
return (u8)d;
return d;
}
#endif
//u16 PicoReadS68k16_(u32 a);
#ifdef _ASM_CD_MEMORY_C
u16 PicoReadS68k16(u32 a);
u32 PicoReadS68k16(u32 a);
#else
static u16 PicoReadS68k16(u32 a)
static u32 PicoReadS68k16(u32 a)
{
u32 d=0;

View file

@ -36,8 +36,8 @@ SekRunPS:
ldr lr, =PicoCpuS68k
ldr r2, =CycloneEnd_M68k
ldr r3, =CycloneEnd_S68k
str r2, [r7,#0x54]
str r3, [lr,#0x54]
str r2, [r7,#0x98]
str r3, [lr,#0x98]
@ update aims
ldr r8, =SekCycleAim
@ -132,15 +132,14 @@ SekRunPS_end:
ldr r7, =PicoCpu
ldr lr, =PicoCpuS68k
mov r0, #0
str r0, [r7,#0x54] @ remove CycloneEnd handler
str r0, [lr,#0x54]
str r0, [r7,#0x98] @ remove CycloneEnd handler
str r0, [lr,#0x98]
@ return
add sp, sp, #2*4
ldmfd sp!, {r4-r11,pc}
CycloneRunLocal:
;@ r0-3 = Temporary registers
ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base
@ -159,20 +158,23 @@ CycloneRunLocal:
cmp r0,#6 ;@ irq>6 ?
andle r1,r1,#7 ;@ Get interrupt mask
cmple r0,r1 ;@ irq<=6: Is irq<=mask ?
ldrgt lr,[r7,#0x54] @ Interrupt will definitely use more cycles than our step,
bgt CycloneDoInterrupt @ so make this function return directly to CycloneEnd_*
bgt CycloneDoInterrupt
NoIntsLocal:
;@ Check if our processor is in stopped state and jump to opcode handler if not
ldr r0,[r7,#0x58]
;@ Check if our processor is in special state
;@ and jump to opcode handler if not
ldr r0,[r7,#0x58] ;@ state_flags
ldrh r8,[r4],#2 ;@ Fetch first opcode
tst r0,r0 ;@ stopped?
tst r0,#0x03 ;@ special state?
andeq r9,r9,#0xf0000000
ldreq pc,[r6,r8,asl #2] ;@ Jump to opcode handler
@ stopped
CycloneSpecial2:
tst r0,#2 ;@ tracing?
bne CycloneDoTrace
;@ stopped or halted
sub r4,r4,#2
ldr r1,[r7,#0x54]
ldr r1,[r7,#0x98]
mov r5,#0
bx r1

View file

@ -39,13 +39,14 @@ static int SekIntAckS68kM(int level)
#endif
#ifdef EMU_C68K
// interrupt acknowledgment
static void SekIntAckS68k(int level)
// interrupt acknowledgement
static int SekIntAckS68k(int level)
{
int level_new = new_irq_level(level);
dprintf("s68kACK %i -> %i", level, level_new);
PicoCpuS68k.irq = level_new;
return CYCLONE_INT_ACK_AUTOVECTOR;
}
static void SekResetAck()
@ -97,7 +98,7 @@ int SekResetS68k()
if (Pico.rom==NULL) return 1;
#ifdef EMU_C68K
PicoCpuS68k.stopped=0;
PicoCpuS68k.state_flags=0;
PicoCpuS68k.osp=0;
PicoCpuS68k.srh =0x27; // Supervisor mode
PicoCpuS68k.flags=4; // Z set

View file

@ -109,13 +109,14 @@ static void dac_recalculate()
void sound_reset()
{
extern int z80stopCycle;
void *ym2612_regs;
// also clear the internal registers+addr line
ym2612_regs = YM2612GetRegs();
memset(ym2612_regs, 0, 0x200+4);
z80stopCycle = 0;
// setting these to 0 might confuse timing code,
// so better set to something like this instead
z80startCycle = z80stopCycle = 0x01000000;
sound_rerate(0);
}
@ -462,11 +463,11 @@ void z80_exit()
#endif
}
#if defined(__DEBUG_PRINT) || defined(WIN32)
#if defined(__DEBUG_PRINT) || defined(__GP2X__)
void z80_debug(char *dstr)
{
#if defined(_USE_DRZ80)
sprintf(dstr, "%sZ80 state: PC: %04x SP: %04x\n", dstr, drZ80.Z80PC-drZ80.Z80PC_BASE, drZ80.Z80SP-drZ80.Z80SP_BASE);
sprintf(dstr, "Z80 state: PC: %04x SP: %04x\n", drZ80.Z80PC-drZ80.Z80PC_BASE, drZ80.Z80SP-drZ80.Z80SP_BASE);
#endif
}
#endif

View file

@ -6,7 +6,7 @@ CROSS = arm-linux-
# settings
#mz80 = 1
debug_cyclone = 0
#debug_cyclone = 1
asm_memory = 1
asm_render = 1
asm_ym2612 = 1
@ -180,7 +180,7 @@ testrefr.gpe : test.o gp2x.o asmutils.o
# build Cyclone
../../cpu/Cyclone/proj/Cyclone.s :
@echo building Cyclone...
@make -C ../../cpu/Cyclone/proj
@make -C ../../cpu/Cyclone/proj CONFIG_FILE=config_pico.h
../../cpu/musashi/m68kops.c :
@make -C ../../cpu/musashi

View file

@ -419,6 +419,36 @@ static char *romsel_loop(char *curr_path)
return ret;
}
// ------------ debug menu ------------
char *debugString(void);
static void draw_debug(void)
{
char *p, *str = debugString();
int len, line;
gp2x_pd_clone_buffer2();
p = str;
for (line = 0; line < 24; line++)
{
while (*p && *p != '\n') p++;
len = p - str;
if (len > 55) len = 55;
gp2x_smalltext8_lim(1, line*10, str, len);
if (*p == 0) break;
p++; str = p;
}
gp2x_video_flip2();
}
static void debug_menu_loop(void)
{
draw_debug();
wait_for_input(GP2X_B|GP2X_X);
}
// ------------ patch/gg menu ------------
static void draw_patchlist(int sel)
@ -444,7 +474,7 @@ static void draw_patchlist(int sel)
}
void patches_menu_loop(void)
static void patches_menu_loop(void)
{
int menu_sel = 0;
unsigned long inp = 0;
@ -1239,7 +1269,8 @@ static void draw_menu_root(int menu_sel)
static void menu_loop_root(void)
{
int ret, menu_sel = 4, menu_sel_max = 8, menu_sel_min = 4;
static int menu_sel = 4;
int ret, menu_sel_max = 8, menu_sel_min = 4;
unsigned long inp = 0;
char curr_path[PATH_MAX], *selfname;
FILE *tstf;
@ -1254,7 +1285,7 @@ static void menu_loop_root(void)
getcwd(curr_path, PATH_MAX);
}
if (rom_data) menu_sel = menu_sel_min = 0;
if (rom_data) menu_sel_min = 0;
if (PicoPatches) menu_sel_max = 9;
/* make sure action buttons are not pressed on entering menu */
@ -1264,9 +1295,10 @@ static void menu_loop_root(void)
for (;;)
{
draw_menu_root(menu_sel);
inp = wait_for_input(GP2X_UP|GP2X_DOWN|GP2X_B|GP2X_X|GP2X_SELECT);
inp = wait_for_input(GP2X_UP|GP2X_DOWN|GP2X_B|GP2X_X|GP2X_SELECT|GP2X_L|GP2X_R);
if(inp & GP2X_UP ) { menu_sel--; if (menu_sel < menu_sel_min) menu_sel = menu_sel_max; }
if(inp & GP2X_DOWN) { menu_sel++; if (menu_sel > menu_sel_max) menu_sel = menu_sel_min; }
if((inp & (GP2X_L|GP2X_R)) == (GP2X_L|GP2X_R)) debug_menu_loop();
if(inp &(GP2X_SELECT|GP2X_X)){
if (rom_data) {
while (gp2x_joystick_read(1) & (GP2X_SELECT|GP2X_X)) usleep(50*1000); // wait until select is released

View file

@ -1,2 +1,2 @@
#define VERSION "1.32"
#define VERSION "1.33"