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0.0088 release
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@215 be3aeb3a-fb24-0410-a615-afba39da0efa
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20 changed files with 2084 additions and 655 deletions
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// Cyclone 68000 Emulator - Header File
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// Most code (c) Copyright 2004 Dave, All rights reserved.
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// Some coding/bugfixing was done by notaz
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// (c) Copyright 2004 Dave, All rights reserved.
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// (c) 2005-2007 notaz
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// Cyclone 68000 is free for non-commercial use.
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// For commercial use, separate licencing terms must be obtained.
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#ifndef __CYCLONE_H__
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#define __CYCLONE_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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@ -17,46 +21,74 @@ struct Cyclone
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{
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unsigned int d[8]; // [r7,#0x00]
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unsigned int a[8]; // [r7,#0x20]
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unsigned int pc; // [r7,#0x40] Memory Base+PC
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unsigned int pc; // [r7,#0x40] Memory Base (.membase) + 68k PC
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unsigned char srh; // [r7,#0x44] Status Register high (T_S__III)
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unsigned char unused; // [r7,#0x45] Unused
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unsigned char flags; // [r7,#0x46] Flags (ARM order: ____NZCV) [68k order is XNZVC]
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unsigned char irq; // [r7,#0x47] IRQ level
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unsigned int osp; // [r7,#0x48] Other Stack Pointer (USP/SSP)
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unsigned int xc; // [r7,#0x4c] Extend flag (bit29: ??X? _)
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unsigned int prev_pc; // [r7,#0x50] set to start address of currently executed opcode + 2 (if enabled in config.h)
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unsigned int unused1; // [r7,#0x54] Unused
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int stopped; // [r7,#0x58] 1 == processor is in stopped state
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int cycles; // [r7,#0x5c]
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unsigned int prev_pc; // [r7,#0x50] Set to start address of currently executed opcode + 2 (if enabled in config.h)
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unsigned int reserved;// [r7,#0x54] Reserved for possible future use
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int state_flags; // [r7,#0x58] bit: 0: stopped state, 1: trace state, 2: activity bit, 3: addr error, 4: fatal halt
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int cycles; // [r7,#0x5c] Number of cycles to execute - 1. Updates to cycles left after CycloneRun()
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int membase; // [r7,#0x60] Memory Base (ARM address minus 68000 address)
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unsigned int (*checkpc)(unsigned int pc); // [r7,#0x64] - Called to recalc Memory Base+pc
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unsigned char (*read8 )(unsigned int a); // [r7,#0x68]
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unsigned short (*read16 )(unsigned int a); // [r7,#0x6c]
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unsigned int (*read32 )(unsigned int a); // [r7,#0x70]
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unsigned int (*checkpc)(unsigned int pc); // [r7,#0x64] called to recalc Memory Base+pc
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unsigned int (*read8 )(unsigned int a); // [r7,#0x68]
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unsigned int (*read16 )(unsigned int a); // [r7,#0x6c]
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unsigned int (*read32 )(unsigned int a); // [r7,#0x70]
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void (*write8 )(unsigned int a,unsigned char d); // [r7,#0x74]
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void (*write16)(unsigned int a,unsigned short d); // [r7,#0x78]
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void (*write32)(unsigned int a,unsigned int d); // [r7,#0x7c]
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unsigned char (*fetch8 )(unsigned int a); // [r7,#0x80]
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unsigned short (*fetch16)(unsigned int a); // [r7,#0x84]
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unsigned int (*fetch32)(unsigned int a); // [r7,#0x88]
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void (*IrqCallback)(int int_level); // [r7,#0x8c] - optional irq callback function, see config.h
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void (*ResetCallback)(void); // [r7,#0x90] - if enabled in config.h, calls this whenever RESET opcode is encountered.
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int (*UnrecognizedCallback)(void); // [r7,#0x94] - if enabled in config.h, calls this whenever unrecognized opcode is encountered.
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unsigned int (*fetch8 )(unsigned int a); // [r7,#0x80]
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unsigned int (*fetch16)(unsigned int a); // [r7,#0x84]
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unsigned int (*fetch32)(unsigned int a); // [r7,#0x88]
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int (*IrqCallback)(int int_level); // [r7,#0x8c] optional irq callback function, see config.h
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void (*ResetCallback)(void); // [r7,#0x90] if enabled in config.h, calls this whenever RESET opcode is encountered.
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int (*UnrecognizedCallback)(void); // [r7,#0x94] if enabled in config.h, calls this whenever unrecognized opcode is encountered.
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unsigned int internal[6]; // [r7,#0x98] reserved for internal use, do not change.
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};
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// used only if Cyclone was compiled with compressed jumptable, see config.h
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void CycloneInit();
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// Initialize. Used only if Cyclone was compiled with compressed jumptable, see config.h
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void CycloneInit(void);
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// run cyclone. Cycles should be specified in context (pcy->cycles)
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// Run cyclone. Cycles should be specified in context (pcy->cycles)
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void CycloneRun(struct Cyclone *pcy);
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// utility functions to get and set SR
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void CycloneSetSr(struct Cyclone *pcy, unsigned int sr); // auto-swaps a7<->osp if detects supervisor change
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unsigned int CycloneGetSr(struct Cyclone *pcy);
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// Utility functions to get and set SR
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void CycloneSetSr(struct Cyclone *pcy, unsigned int sr);
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unsigned int CycloneGetSr(const struct Cyclone *pcy);
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// Generates irq exception if needed (if pcy->irq > mask).
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// Returns cycles used for exception if it was generated, 0 otherwise.
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int CycloneFlushIrq(struct Cyclone *pcy);
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// Functions for saving and restoring state.
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// CycloneUnpack() uses checkpc(), so it must be initialized.
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// save_buffer must point to buffer of 128 (0x80) bytes of size.
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void CyclonePack(const struct Cyclone *pcy, void *save_buffer);
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void CycloneUnpack(struct Cyclone *pcy, const void *save_buffer);
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// genesis: if 1, switch to normal TAS handlers
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void CycloneSetRealTAS(int use_real);
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// These values are special return values for IrqCallback.
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// Causes an interrupt autovector (0x18 + interrupt level) to be taken.
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// This happens in a real 68K if VPA or AVEC is asserted during an interrupt
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// acknowledge cycle instead of DTACK (the most common situation).
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#define CYCLONE_INT_ACK_AUTOVECTOR -1
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// Causes the spurious interrupt vector (0x18) to be taken
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// This happens in a real 68K if BERR is asserted during the interrupt
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// acknowledge cycle (i.e. no devices responded to the acknowledge).
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#define CYCLONE_INT_ACK_SPURIOUS -2
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#ifdef __cplusplus
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} // End of extern "C"
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#endif
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#endif // __CYCLONE_H__
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