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https://github.com/RaySollium99/picodrive.git
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0.0088 release
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@215 be3aeb3a-fb24-0410-a615-afba39da0efa
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notaz
parent
ee5e024ce6
commit
0e11c502b0
20 changed files with 2084 additions and 655 deletions
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@ -21,7 +21,7 @@ void OpFlagsToReg(int high)
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// Convert SR/CRR register in r0 to our flags
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// trashes r0,r1
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void OpRegToFlags(int high)
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void OpRegToFlags(int high, int srh_reg)
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{
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ot(" eor r1,r0,r0,ror #1 ;@ Bit 0=C^V\n");
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ot(" mov r2,r0,lsl #25\n");
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@ -32,9 +32,10 @@ void OpRegToFlags(int high)
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if (high)
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{
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ot(" mov r0,r0,ror #8\n");
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ot(" and r0,r0,#0xa7 ;@ only take defined bits\n");
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ot(" strb r0,[r7,#0x44] ;@ Store SR high\n");
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int mask=EMULATE_TRACE?0xa7:0x27;
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ot(" mov r%i,r0,ror #8\n",srh_reg);
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ot(" and r%i,r%i,#0x%02x ;@ only take defined bits\n",srh_reg,srh_reg,mask);
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ot(" strb r%i,[r7,#0x44] ;@ Store SR high\n",srh_reg);
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}
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ot("\n");
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}
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@ -44,8 +45,15 @@ void SuperEnd(void)
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ot(";@ ----------\n");
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ot(";@ tried execute privileged instruction in user mode\n");
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ot("WrongPrivilegeMode%s\n",ms?"":":");
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#if EMULATE_ADDRESS_ERRORS_JUMP || EMULATE_ADDRESS_ERRORS_IO
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ot(" ldr r1,[r7,#0x58]\n");
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ot(" sub r4,r4,#2 ;@ last opcode wasn't executed - go back\n");
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ot(" mov r0,#0x20 ;@ privilege violation\n");
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ot(" orr r1,r1,#4 ;@ set activity bit: 'not processing instruction'\n");
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ot(" str r1,[r7,#0x58]\n");
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#else
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ot(" sub r4,r4,#2 ;@ last opcode wasn't executed - go back\n");
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#endif
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ot(" mov r0,#8 ;@ privilege violation\n");
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ot(" bl Exception\n");
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Cycles=34;
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OpEnd(0);
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@ -53,13 +61,15 @@ void SuperEnd(void)
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// does OSP and A7 swapping if needed
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// new or old SR (not the one already in [r7,#0x44]) should be passed in r11
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// trashes r0,r11
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void SuperChange(int op,int load_srh)
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// uses srh from srh_reg (loads if < 0), trashes r0,r11
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void SuperChange(int op,int srh_reg)
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{
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ot(";@ A7 <-> OSP?\n");
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if (load_srh)
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if (srh_reg < 0) {
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ot(" ldr r0,[r7,#0x44] ;@ Get other SR high\n");
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ot(" eor r0,r0,r11\n");
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srh_reg=0;
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}
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ot(" eor r0,r%i,r11\n",srh_reg);
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ot(" tst r0,#0x20\n");
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ot(" beq no_sp_swap%.4x\n",op);
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ot(" ;@ swap OSP and A7:\n");
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@ -122,6 +132,7 @@ int OpMove(int op)
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if (movea) size=2; // movea always expands to 32-bits
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eawrite_check_addrerr=1;
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#if SPLIT_MOVEL_PD
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if ((tea&0x38)==0x20 && size==2) { // -(An)
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EaCalc (10,0x0e00,tea,size,0,0);
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@ -167,6 +178,7 @@ int OpLea(int op)
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OpStart(op,sea,tea);
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eawrite_check_addrerr=1;
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EaCalc (1,0x003f,sea,0); // Lea
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EaCalc (0,0x0e00,tea,2);
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EaWrite(0, 1,tea,2,0x0e00);
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@ -214,6 +226,7 @@ int OpMoveSr(int op)
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if (type==0 || type==1)
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{
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eawrite_check_addrerr=1;
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OpFlagsToReg(type==0);
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EaCalc (0,0x003f,ea,size,0,0);
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EaWrite(0, 1,ea,size,0x003f,0,0);
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@ -222,13 +235,17 @@ int OpMoveSr(int op)
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if (type==2 || type==3)
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{
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EaCalcReadNoSE(-1,0,ea,size,0x003f);
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OpRegToFlags(type==3);
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OpRegToFlags(type==3,1);
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if (type==3) {
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SuperChange(op,0);
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SuperChange(op,1);
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opend_check_interrupt = 1;
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opend_check_trace = 1;
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OpEnd(ea);
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return 0;
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}
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}
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OpEnd(ea,0,0,type==3);
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OpEnd(ea);
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return 0;
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}
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@ -239,6 +256,7 @@ int OpArithSr(int op)
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{
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int type=0,ea=0;
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int use=0,size=0;
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int sr_mask=EMULATE_TRACE?0xa7:0x27;
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type=(op>>9)&5; if (type==4) return 1;
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size=(op>>6)&1; // ccr or sr?
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@ -249,19 +267,53 @@ int OpArithSr(int op)
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OpStart(op,ea,0,0,size!=0); Cycles=16;
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EaCalc(10,0x003f,ea,size);
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EaRead(10, 10,ea,size,0x003f);
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EaCalcRead(-1,0,ea,size,0x003f);
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OpFlagsToReg(size);
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if (type==0) ot(" orr r0,r1,r10\n");
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if (type==1) ot(" and r0,r1,r10\n");
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if (type==5) ot(" eor r0,r1,r10\n");
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OpRegToFlags(size);
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if (size && type!=0) { // we can't enter supervisor mode, nor unmask irqs just by using OR
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SuperChange(op,0);
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ot(" eor r1,r0,r0,ror #1 ;@ Bit 0=C^V\n");
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ot(" tst r1,#1 ;@ 1 if C!=V\n");
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ot(" eorne r0,r0,#3 ;@ ___XNZCV\n");
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ot(" ldr r2,[r7,#0x4c] ;@ Load old X bit\n");
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// note: old srh is already in r11 (done by OpStart)
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if (type==0) {
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ot(" orr r9,r9,r0,lsl #28\n");
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ot(" orr r2,r2,r0,lsl #25 ;@ X bit\n");
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if (size!=0) {
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ot(" orr r1,r11,r0,lsr #8\n");
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ot(" and r1,r1,#0x%02x ;@ mask-out unused bits\n",sr_mask);
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}
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}
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if (type==1) {
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ot(" and r9,r9,r0,lsl #28\n");
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ot(" and r2,r2,r0,lsl #25 ;@ X bit\n");
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if (size!=0)
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ot(" and r1,r11,r0,lsr #8\n");
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}
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if (type==5) {
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ot(" eor r9,r9,r0,lsl #28\n");
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ot(" eor r2,r2,r0,lsl #25 ;@ X bit\n");
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if (size!=0) {
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ot(" eor r1,r11,r0,lsr #8\n");
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ot(" and r1,r1,#0x%02x ;@ mask-out unused bits\n",sr_mask);
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}
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}
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OpEnd(ea,0,0,size!=0 && type!=0);
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ot(" str r2,[r7,#0x4c] ;@ Save X bit\n");
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if (size!=0)
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ot(" strb r1,[r7,#0x44]\n");
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ot("\n");
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// we can't enter supervisor mode, nor unmask irqs just by using OR
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if (size!=0 && type!=0) {
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SuperChange(op,1);
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ot("\n");
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opend_check_interrupt = 1;
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}
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// also can't set trace bit with AND
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if (size!=0 && type!=1)
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opend_check_trace = 1;
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OpEnd(ea);
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return 0;
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}
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@ -338,6 +390,13 @@ int OpMovem(int op)
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ot(" tst r11,r11\n"); // sanity check
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ot(" beq NoRegs%.4x\n",op);
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#if EMULATE_ADDRESS_ERRORS_IO
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ot("\n");
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ot(" tst r6,#1 ;@ address error?\n");
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ot(" movne r0,r6\n");
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ot(" bne ExceptionAddressError_%c_data\n",dir?'r':'w');
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#endif
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ot("\n");
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ot("Movemloop%.4x%s\n",op, ms?"":":");
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ot(" add r10,r10,#%d ;@ r10=Next Register\n",decr?-4:4);
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@ -350,6 +409,7 @@ int OpMovem(int op)
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if (dir)
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{
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ot(" ;@ Copy memory to register:\n",1<<size);
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earead_check_addrerr=0; // already checked
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EaRead (6,0,ea,size,0x003f);
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ot(" str r0,[r7,r10] ;@ Save value into Dn/An\n");
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}
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@ -391,7 +451,8 @@ int OpMovem(int op)
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Cycles+=Ea_add_ns(g_movem_cycle_table,ea);
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OpEnd(ea,0,1);
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opend_op_changes_cycles = 1;
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OpEnd(ea);
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ltorg();
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ot("\n");
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@ -413,6 +474,7 @@ int OpMoveUsp(int op)
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if (dir)
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{
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eawrite_check_addrerr=1;
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ot(" ldr r1,[r7,#0x48] ;@ Get from USP\n\n");
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EaCalc (0,0x000f,8,2,1);
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EaWrite(0, 1,8,2,0x000f,1);
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@ -568,11 +630,12 @@ int OpStopReset(int op)
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ot("\n");
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ot(" mov r0,#1\n");
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ot(" str r0,[r7,#0x58] ;@ stopped\n");
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ot(" ldr r0,[r7,#0x58]\n");
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ot(" mov r5,#0 ;@ eat cycles\n");
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ot(" orr r0,r0,#1 ;@ stopped\n");
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ot(" str r0,[r7,#0x58]\n");
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ot("\n");
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ot(" mov r5,#0 ;@ eat cycles\n");
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Cycles = 4;
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ot("\n");
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}
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