mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
mcd, fixes and improvements by mcd-verificator
This commit is contained in:
kub
parent
44a6c67823
commit
178a9b683c
6 changed files with 164 additions and 127 deletions
144
pico/cd/memory.c
144
pico/cd/memory.c
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@ -100,9 +100,9 @@ static u32 m68k_reg_read16(u32 a)
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switch (a) {
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case 0:
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// here IFL2 is always 0, just like in Gens
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d = ((Pico_mcd->s68k_regs[0x33] << 13) & 0x8000)
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| Pico_mcd->m.busreq;
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pcd_sync_s68k(SekCyclesDone(), 0);
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d = ((Pico_mcd->s68k_regs[0x33] & PCDS_IEN2) << 13) |
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(Pico_mcd->m.state_flags & PCD_ST_S68K_IFL2) | Pico_mcd->m.busreq;
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goto end;
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case 2:
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m68k_comm_check(a);
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@ -158,6 +158,8 @@ void m68k_reg_write8(u32 a, u32 d)
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switch (a) {
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case 0:
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d &= 1;
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_IFL2;
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if (d) Pico_mcd->m.state_flags |= PCD_ST_S68K_IFL2;
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if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {
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elprintf(EL_INTS, "m68k: s68k irq 2");
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pcd_sync_s68k(SekCyclesDone(), 0);
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@ -179,7 +181,7 @@ void m68k_reg_write8(u32 a, u32 d)
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if (!(d & 1))
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Pico_mcd->m.state_flags |= PCD_ST_S68K_RST;
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else if (d == 1 && (Pico_mcd->m.state_flags & PCD_ST_S68K_RST)) {
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_RST;
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Pico_mcd->m.state_flags &= ~(PCD_ST_S68K_RST|PCD_ST_S68K_POLL|PCD_ST_S68K_SLEEP);
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elprintf(EL_CDREGS, "m68k: resetting s68k");
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SekResetS68k();
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}
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@ -193,8 +195,8 @@ void m68k_reg_write8(u32 a, u32 d)
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elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);
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goto write_comm;
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case 3:
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dold = Pico_mcd->s68k_regs[3];
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elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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dold = Pico_mcd->s68k_regs[3];
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if ((d ^ dold) & 0xc0) {
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elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",
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(Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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@ -214,7 +216,6 @@ void m68k_reg_write8(u32 a, u32 d)
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d = (d & 0xc0) | (dold & 0x1c) | Pico_mcd->m.dmna_ret_2m;
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if ((dold ^ d) & 0x1f)
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remap_word_ram(d);
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goto write_comm;
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case 6:
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Pico_mcd->bios[MEM_BE2(0x72)] = d; // simple hint vector changer
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@ -224,6 +225,9 @@ void m68k_reg_write8(u32 a, u32 d)
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elprintf(EL_CDREGS, "hint vector set to %04x%04x",
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((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);
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return;
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case 8:
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(void) cdc_host_r(); // acts same as reading
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return;
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case 0x0f:
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a = 0x0e;
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case 0x0e:
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@ -277,7 +281,7 @@ u32 s68k_poll_detect(u32 a, u32 d)
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elprintf(EL_CDPOLL, "s68k poll detected @%06x, a=%02x",
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SekPcS68k, a);
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} else if (cnt > 2)
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SekEndRunS68k(80);
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SekEndRunS68k(240);
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}
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}
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Pico_mcd->m.s68k_poll_a = a;
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@ -308,38 +312,47 @@ u32 s68k_reg_read16(u32 a)
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switch (a) {
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case 0:
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return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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d = ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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goto end;
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case 2:
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d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
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elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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return s68k_poll_detect(a, d);
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s68k_poll_detect(a, d);
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goto end;
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case 4:
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d = (Pico_mcd->s68k_regs[4]<<8) | (Pico_mcd->s68k_regs[5]&0x1f);
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goto end;
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case 6:
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return cdc_reg_r();
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d = cdc_reg_r();
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goto end;
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case 8:
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return cdc_host_r();
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d = cdc_host_r();
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goto end;
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case 0xC:
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d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;
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d /= 384;
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d &= 0x0fff;
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elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);
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return d;
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goto end;
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case 0x30:
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elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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return Pico_mcd->s68k_regs[31];
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elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[0x31]);
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d = Pico_mcd->s68k_regs[0x31];
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goto end;
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case 0x34: // fader
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return 0; // no busy bit
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d = 0; // no busy bit
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goto end;
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case 0x50: // font data (check: Lunar 2, Silpheed)
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READ_FONT_DATA(0x00100000);
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return d;
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goto end;
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case 0x52:
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READ_FONT_DATA(0x00010000);
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return d;
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goto end;
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case 0x54:
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READ_FONT_DATA(0x10000000);
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return d;
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goto end;
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case 0x56:
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READ_FONT_DATA(0x01000000);
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return d;
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goto end;
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}
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d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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@ -347,6 +360,7 @@ u32 s68k_reg_read16(u32 a)
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if (a >= 0x0e && a < 0x30)
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return s68k_poll_detect(a, d);
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end:
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return d;
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}
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@ -361,8 +375,7 @@ void s68k_reg_write8(u32 a, u32 d)
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if (!(d & 1))
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pcd_soft_reset();
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return;
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case 2:
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return; // only m68k can change WP
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case 2: a++; // byte access only, ignores LDS/UDS
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case 3: {
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int dold = Pico_mcd->s68k_regs[3];
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elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);
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@ -399,33 +412,38 @@ void s68k_reg_write8(u32 a, u32 d)
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}
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case 4:
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elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);
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Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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Pico_mcd->s68k_regs[a] = (d&7); // CDC mode
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Pico_mcd->s68k_regs[0xa] = Pico_mcd->s68k_regs[0xb] = 0; // resets DMA
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return;
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case 5:
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//dprintf("s68k CDC reg addr: %x", d&0xf);
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break;
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//dprintf("s68k CDC reg addr: %x", d&0x1f);
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Pico_mcd->s68k_regs[a] = (d&0x1f);
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return;
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case 7:
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cdc_reg_w(d & 0xff);
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return;
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case 0xa:
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case 0xb:
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// word access only. 68k sets both bus halves to value d.
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elprintf(EL_CDREGS, "s68k set CDC dma addr");
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break;
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Pico_mcd->s68k_regs[0xa] = Pico_mcd->s68k_regs[0xb] = d;
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return;
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case 0xc:
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case 0xd: // 384 cycle stopwatch timer
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elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);
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// does this also reset internal 384 cycle counter?
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Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();
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return;
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case 0x0e:
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a = 0x0f;
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case 0x0e: a++;
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case 0x0f:
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goto write_comm;
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case 0x30: a++;
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case 0x31: // 384 cycle int3 timer
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d &= 0xff;
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elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);
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Pico_mcd->s68k_regs[a] = (u8) d;
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if (d) // d or d+1??
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pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);
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if (d) // XXX: d or d+1? mcd-verificator results suggest d+1
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pcd_event_schedule_s68k(PCD_EVENT_TIMER3, (d+1) * 384);
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else
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pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);
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break;
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@ -439,6 +457,8 @@ void s68k_reg_write8(u32 a, u32 d)
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pcd_irq_s68k(4, 1);
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}
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}
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if ((d ^ Pico_mcd->s68k_regs[0x33]) & ~d & PCDS_IEN2)
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pcd_irq_s68k(2, 0);
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break;
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case 0x34: // fader
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Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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@ -478,6 +498,8 @@ void s68k_reg_write8(u32 a, u32 d)
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s[0], s[1], s[2], s[3], s[4], s[5], s[6], s[7], s[8], s[9]);
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}
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return;
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case 0x4c: a++;
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break;
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case 0x58:
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return;
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}
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@ -517,11 +539,18 @@ void s68k_reg_write16(u32 a, u32 d)
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goto write_comm;
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switch (a) {
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case 0x02:
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case 0x0e:
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// special case, 2 byte writes would be handled differently
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// TODO: verify
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d = (u8)d | (r[0xe] << 8);
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goto write_comm;
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case 0x30:
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case 0x4c:
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// these are only byte registers, LDS/UDS ignored
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return s68k_reg_write8(a + 1, d);
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case 0x08:
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return (void) cdc_host_r(); // acts same as reading
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case 0x0a: // DMA address
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r[0xa] = d >> 8;
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r[0xb] = d;
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return;
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case 0x58: // stamp data size
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r[0x59] = d & 7;
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return;
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@ -634,19 +663,19 @@ static void PicoWriteM68k16_cell1(u32 a, u32 d)
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static u32 PicoReadM68k8_ramc(u32 a)
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{
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u32 d = 0;
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if (a == 0x400001) {
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if ((a & 0xf00001) == 0x400001) {
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if (Pico.sv.data != NULL)
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d = 3; // 64k cart
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return d;
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}
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if ((a & 0xfe0000) == 0x600000) {
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if ((a & 0xf00001) == 0x600001) {
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if (Pico.sv.data != NULL)
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d = Pico.sv.data[((a >> 1) & 0xffff) + 0x2000];
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return d;
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}
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if (a == 0x7fffff)
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if ((a & 0xf00001) == 0x700001)
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return Pico_mcd->m.bcram_reg;
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elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
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@ -661,15 +690,15 @@ static u32 PicoReadM68k16_ramc(u32 a)
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static void PicoWriteM68k8_ramc(u32 a, u32 d)
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{
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if ((a & 0xfe0000) == 0x600000) {
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if ((a & 0xf00001) == 0x600001) {
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if (Pico.sv.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {
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Pico.sv.data[((a>>1) & 0xffff) + 0x2000] = d;
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Pico.sv.data[((a >> 1) & 0xffff) + 0x2000] = d;
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Pico.sv.changed = 1;
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}
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return;
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}
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if (a == 0x7fffff) {
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if ((a & 0xf00001) == 0x700001) {
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Pico_mcd->m.bcram_reg = d;
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return;
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}
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@ -902,15 +931,16 @@ static u32 PicoReadS68k16_bram(u32 a)
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u32 d;
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elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
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a = (a >> 1) & 0x1fff;
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d = Pico_mcd->bram[a++];
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d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify
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d = Pico_mcd->bram[a];
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return d;
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}
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static void PicoWriteS68k8_bram(u32 a, u32 d)
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{
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Pico_mcd->bram[(a >> 1) & 0x1fff] = d;
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Pico.sv.changed = 1;
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if (a & 1) {
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Pico_mcd->bram[(a >> 1) & 0x1fff] = d;
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Pico.sv.changed = 1;
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}
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}
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static void PicoWriteS68k16_bram(u32 a, u32 d)
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@ -918,7 +948,6 @@ static void PicoWriteS68k16_bram(u32 a, u32 d)
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elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
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a = (a >> 1) & 0x1fff;
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Pico_mcd->bram[a++] = d;
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Pico_mcd->bram[a++] = d >> 8; // TODO: verify..
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Pico.sv.changed = 1;
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}
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@ -1079,28 +1108,6 @@ static void remap_prg_window(u32 r1, u32 r3)
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// is reassigned to it (e.g. Mega Race).
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// since DTACK isn't on the expansion port, main cpu accesses are not blocked.
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// XXX is data read/written if main is accessing Word_RAM while not owning it?
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static u32 m68k_wordram_sub_read8(u32 a)
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{
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return 0xff;
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// return Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff];
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}
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static u32 m68k_wordram_sub_read16(u32 a)
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{
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return 0xffff;
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// return ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff];
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}
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static void m68k_wordram_sub_write8(u32 a, u32 d)
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{
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// Pico_mcd->word_ram2M[MEM_BE2(a) & 0x3ffff] = d;
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}
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static void m68k_wordram_sub_write16(u32 a, u32 d)
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{
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// ((u16 *)Pico_mcd->word_ram2M)[(a >> 1) & 0x1ffff] = d;
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}
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static u32 s68k_wordram_main_read8(u32 a)
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{
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Pico_mcd->m.state_flags |= PCD_ST_S68K_SLEEP;
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@ -1145,9 +1152,7 @@ static void remap_word_ram(u32 r3)
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} else {
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Pico_mcd->m.state_flags &= ~PCD_ST_S68K_SLEEP;
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cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
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cpu68k_map_all_funcs(0x200000, 0x23ffff,
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m68k_wordram_sub_read8, m68k_wordram_sub_read16,
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m68k_wordram_sub_write8, m68k_wordram_sub_write16, 0);
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m68k_map_unmap(0x200000, 0x23ffff);
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}
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// TODO: handle 0x0c0000
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}
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@ -1236,6 +1241,7 @@ PICO_INTERNAL void PicoMemSetupCD(void)
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cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);
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// RAMs
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remap_prg_window(2,1);
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remap_word_ram(1);
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#ifdef EMU_C68K
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