mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
32x: RLE mode + tweaks, VR runs but unstable as everything else
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@795 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz
parent
be20816c4c
commit
1b3f584492
4 changed files with 47 additions and 19 deletions
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@ -79,7 +79,13 @@ void FinalizeLine32xRGB555(int sh, int line)
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}
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}
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else { // Run Length Mode
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unsigned short len, t;
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for (i = 320; i > 0; ps++) {
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t = pal[*ps & 0xff];
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for (len = (*ps >> 8) + 1; len > 0 && i > 0; len--, i--, pd++, pb++)
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if (*pb == 0 || (t & 0x20))
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*pd = t;
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}
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}
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}
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@ -114,6 +114,10 @@ static void dma_68k2sh2_do(void)
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if (dmac0->tcr0 != *dreqlen)
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elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen);
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// HACK: assume bus is busy and SH2 is halted
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// XXX: use different mechanism for this, not poll det
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Pico32x.emu_flags |= P32XF_MSH2POLL; // id ? P32XF_SSH2POLL : P32XF_MSH2POLL;
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for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) {
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extern void p32x_sh2_write16(u32 a, u32 d, int id);
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elprintf(EL_32X, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen);
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@ -177,7 +181,7 @@ static void p32x_reg_write8(u32 a, u32 d)
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switch (a) {
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case 0: // adapter ctl
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r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM);
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break;
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return;
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case 3: // irq ctl
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if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) {
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Pico32x.sh2irqi[0] |= P32XI_CMD;
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@ -189,20 +193,29 @@ static void p32x_reg_write8(u32 a, u32 d)
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p32x_update_irls();
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SekEndRun(16);
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}
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break;
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return;
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case 5: // bank
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d &= 7;
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if (r[4 / 2] != d) {
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r[4 / 2] = d;
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bank_switch(d);
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}
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break;
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return;
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case 7: // DREQ ctl
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r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_DMA|P32XS_RV));
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break;
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return;
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case 0x1b: // TV
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r[0x1a / 2] = d;
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break;
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return;
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}
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if ((a & 0x30) == 0x20) {
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u8 *r8 = (u8 *)r;
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r8[a ^ 1] = d;
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if (p32x_poll_undetect(&sh2_poll[0], 0) || p32x_poll_undetect(&sh2_poll[1], 0))
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// if some SH2 is busy waiting, it needs to see the result ASAP
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SekEndRun(16);
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return;
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}
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}
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@ -310,7 +323,7 @@ static void p32x_vdp_write16(u32 a, u32 d)
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}
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if (a == 8) { // fill data
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u16 *dram = Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
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int len = Pico32x.vdp_regs[4 / 2];
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int len = Pico32x.vdp_regs[4 / 2] + 1;
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a = Pico32x.vdp_regs[6 / 2];
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while (len--) {
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dram[a] = d;
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@ -365,16 +378,24 @@ static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid)
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case 0: // FM
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Pico32x.regs[0] &= ~P32XS_FM;
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Pico32x.regs[0] |= (d << 8) & P32XS_FM;
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break;
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return;
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case 1: //
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Pico32x.sh2irq_mask[cpuid] = d & 0x8f;
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Pico32x.sh2_regs[0] &= ~0x80;
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Pico32x.sh2_regs[0] |= d & 0x80;
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p32x_update_irls();
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break;
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return;
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case 5: // H count
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Pico32x.sh2_regs[4 / 2] = d & 0xff;
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break;
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return;
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}
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if ((a & 0x30) == 0x20) {
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u8 *r8 = (u8 *)Pico32x.regs;
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r8[a ^ 1] = d;
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p32x_poll_undetect(&m68k_poll, 0);
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p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
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return;
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}
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}
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@ -488,10 +509,8 @@ static void sh2_peripheral_write32(u32 a, u32 d, int id)
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dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id));
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dmac0->tcr0 &= 0xffffff;
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// HACK: assume bus is busy and SH2 is halted
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// XXX: use different mechanism for this, not poll det
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Pico32x.emu_flags |= id ? P32XF_SSH2POLL : P32XF_MSH2POLL;
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ash2_end_run(5);
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// HACK: assume 68k starts writing soon and end the timeslice
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ash2_end_run(16);
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// DREQ is only sent after first 4 words are written.
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// we do multiple of 4 words to avoid messing up alignment
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@ -775,6 +794,8 @@ u32 p32x_sh2_read16(u32 a, int id)
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if ((a & 0xdfffff00) == 0x4000) {
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d = p32x_sh2reg_read16(a, id);
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if (!(EL_LOGMASK & EL_PWM) && (a & 0x30) == 0x30) // hide PWM
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return d;
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goto out;
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}
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@ -855,7 +876,7 @@ void p32x_sh2_write8(u32 a, u32 d, int id)
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void p32x_sh2_write16(u32 a, u32 d, int id)
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{
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if ((a & 0xdffffc00) == 0x4000)
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if ((a & 0xdffffc00) == 0x4000 && ((EL_LOGMASK & EL_PWM) || (a & 0x30) != 0x30)) // hide PWM
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elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x",
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id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
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@ -14,7 +14,7 @@ void p32x_pwm_refresh(void)
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cycles = (cycles - 1) & 0x0fff;
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if (cycles < 500) {
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elprintf(EL_32X|EL_ANOMALY, "pwm: low cycle value: %d", cycles + 1);
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elprintf(EL_32X|EL_PWM|EL_ANOMALY, "pwm: low cycle value: %d", cycles + 1);
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cycles = 500;
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}
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pwm_cycles = cycles;
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@ -59,7 +59,7 @@ unsigned int p32x_pwm_read16(unsigned int a)
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case 6: // R ch
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case 8: // MONO
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predict = (pwm_line_samples * Pico.m.scanline) >> 16;
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elprintf(EL_32X, "pwm: read status: ptr %d/%d, predict %d",
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elprintf(EL_PWM, "pwm: read status: ptr %d/%d, predict %d",
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pwm_frame_smp_cnt, (pwm_line_samples * scanlines_total) >> 16, predict);
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if (pwm_frame_smp_cnt > predict + 3)
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d |= P32XP_FULL;
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@ -97,7 +97,7 @@ void p32x_pwm_write16(unsigned int a, unsigned int d)
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if (a >= 6) { // R or MONO
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pwm_frame_smp_cnt++;
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pwm_ptr = (pwm_ptr + 1) & (PWM_BUFF_LEN - 1);
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elprintf(EL_32X, "pwm: smp_cnt %d, ptr %d, smp %x", pwm_frame_smp_cnt, pwm_ptr, d);
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elprintf(EL_PWM, "pwm: smp_cnt %d, ptr %d, smp %x", pwm_frame_smp_cnt, pwm_ptr, d);
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}
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}
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}
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@ -137,7 +137,7 @@ void p32x_pwm_update(int *buf32, int length, int stereo)
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}
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}
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elprintf(EL_32X, "pwm_update: pwm_ptr %d, len %d, step %04x, done %d",
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elprintf(EL_PWM, "pwm_update: pwm_ptr %d, len %d, step %04x, done %d",
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pwm_ptr, length, step, (pwmb - Pico32xMem->pwm) / 2);
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pwm_ptr = 0;
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@ -718,6 +718,7 @@ static __inline int isspace_(int c)
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#define EL_CDREGS 0x00020000 /* MCD: register access */
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#define EL_CDREG3 0x00040000 /* MCD: register 3 only */
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#define EL_32X 0x00080000
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#define EL_PWM 0x00100000 /* 32X PWM stuff (LOTS of output) */
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#define EL_STATUS 0x40000000 /* status messages */
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#define EL_ANOMALY 0x80000000 /* some unexpected conditions (during emulation) */
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