mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
32x: watchdog for Star Wars, SCI IRQs for X-men (also needs idle loop hacks)
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@799 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
parent
236990cf77
commit
1d7a28a723
8 changed files with 167 additions and 54 deletions
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@ -44,7 +44,9 @@ typedef struct
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UINT32 delay;
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UINT32 test_irq;
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int pending_irq;
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int pending_irl;
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int pending_int_irq; // internal irq
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int pending_int_vector;
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void (*irq_callback)(int id, int level);
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int is_slave;
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@ -58,5 +60,6 @@ void sh2_init(SH2 *sh2, int is_slave);
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void sh2_reset(SH2 *sh2);
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int sh2_execute(SH2 *sh2_, int cycles);
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void sh2_irl_irq(SH2 *sh2, int level);
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void sh2_internal_irq(SH2 *sh2, int level, int vector);
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#endif /* __SH2_H__ */
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@ -57,6 +57,25 @@ void sh2_reset(SH2 *sh2)
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sh2->sr = I;
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}
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static void sh2_do_irq(SH2 *sh2, int level, int vector)
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{
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sh2->irq_callback(sh2->is_slave, level);
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sh2->r[15] -= 4;
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WL(sh2->r[15], sh2->sr); /* push SR onto stack */
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sh2->r[15] -= 4;
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WL(sh2->r[15], sh2->pc); /* push PC onto stack */
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/* set I flags in SR */
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sh2->sr = (sh2->sr & ~I) | (level << 4);
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/* fetch PC */
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sh2->pc = RL(sh2->vbr + vector * 4);
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/* 13 cycles at best */
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sh2_icount -= 13;
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}
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/* Execute cycles - returns number of cycles actually run */
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int sh2_execute(SH2 *sh2_, int cycles)
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{
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@ -105,8 +124,10 @@ int sh2_execute(SH2 *sh2_, int cycles)
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if (sh2->test_irq && !sh2->delay)
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{
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if (sh2->pending_irq)
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sh2_irl_irq(sh2, sh2->pending_irq);
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if (sh2->pending_irl > sh2->pending_int_irq)
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sh2_irl_irq(sh2, sh2->pending_irl);
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else
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sh2_internal_irq(sh2, sh2->pending_int_irq, sh2->pending_int_vector);
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sh2->test_irq = 0;
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}
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sh2_icount--;
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@ -124,29 +145,21 @@ void sh2_init(SH2 *sh2, int is_slave)
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void sh2_irl_irq(SH2 *sh2, int level)
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{
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int vector;
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sh2->pending_irq = level;
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sh2->pending_irl = level;
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if (level <= ((sh2->sr >> 4) & 0x0f))
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/* masked */
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return;
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sh2->irq_callback(sh2->is_slave, level);
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vector = 64 + level/2;
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sh2->r[15] -= 4;
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WL(sh2->r[15], sh2->sr); /* push SR onto stack */
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sh2->r[15] -= 4;
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WL(sh2->r[15], sh2->pc); /* push PC onto stack */
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/* set I flags in SR */
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sh2->sr = (sh2->sr & ~I) | (level << 4);
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/* fetch PC */
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sh2->pc = RL(sh2->vbr + vector * 4);
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/* 13 cycles at best */
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sh2_icount -= 13;
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sh2_do_irq(sh2, level, 64 + level/2);
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}
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void sh2_internal_irq(SH2 *sh2, int level, int vector)
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{
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sh2->pending_int_irq = level;
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sh2->pending_int_vector = vector;
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if (level <= ((sh2->sr >> 4) & 0x0f))
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return;
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sh2_do_irq(sh2, level, vector);
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sh2->pending_int_irq = 0; // auto-clear
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}
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@ -1,6 +1,7 @@
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#include "../pico_int.h"
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#include "../sound/ym2612.h"
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SH2 sh2s[2];
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struct Pico32x Pico32x;
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static void sh2_irq_cb(int id, int level)
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@ -51,6 +52,9 @@ void Pico32xStartup(void)
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if (!Pico.m.pal)
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Pico32x.vdp_regs[0] |= P32XV_nPAL;
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PREG8(Pico32xMem->sh2_peri_regs[0], 4) =
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PREG8(Pico32xMem->sh2_peri_regs[1], 4) = 0x84; // SCI SSR
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emu_32x_startup();
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}
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@ -30,7 +30,7 @@ static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 cycles, int is_vdp)
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if (is_vdp)
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flag <<= 3;
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if (a - 2 <= pd->addr && pd->addr <= a + 2 && cycles - pd->cycles < pd->cyc_max) {
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if (a - 2 <= pd->addr && pd->addr <= a + 2 && cycles - pd->cycles <= pd->cyc_max) {
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pd->cnt++;
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if (pd->cnt > POLL_THRESHOLD) {
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if (!(Pico32x.emu_flags & flag)) {
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@ -307,8 +307,6 @@ static void p32x_vdp_write8(u32 a, u32 d)
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if ((r[0] ^ d) & P32XV_PRI)
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Pico32x.dirty_pal = 1;
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r[0] = (r[0] & P32XV_nPAL) | (d & 0xff);
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if ((d & 3) == 3)
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elprintf(EL_32X|EL_ANOMALY, "TODO: mode3");
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break;
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case 0x05: // fill len
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r[4 / 2] = d & 0xff;
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@ -442,7 +440,7 @@ static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid)
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case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls;
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case 0x1c:
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Pico32x.sh2irqs &= ~P32XI_PWM;
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p32x_pwm_irq_check(0);
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p32x_timers_do(0);
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goto irls;
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}
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@ -455,20 +453,31 @@ irls:
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// ------------------------------------------------------------------
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// SH2 internal peripherals
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// we keep them in little endian format
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static u32 sh2_peripheral_read8(u32 a, int id)
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{
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u8 *r = (void *)Pico32xMem->sh2_peri_regs[id];
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u32 d;
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a &= 0x1ff;
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d = r[a];
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if (a == 4)
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d = 0x84; // SCI SSR
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d = PREG8(r, a);
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elprintf(EL_32X, "%csh2 peri r8 [%08x] %02x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id));
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return d;
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}
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static u32 sh2_peripheral_read16(u32 a, int id)
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{
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u16 *r = (void *)Pico32xMem->sh2_peri_regs[id];
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u32 d;
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a &= 0x1ff;
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d = r[(a / 2) ^ 1];
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elprintf(EL_32X, "%csh2 peri r16 [%08x] %04x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id));
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return d;
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}
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static u32 sh2_peripheral_read32(u32 a, int id)
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{
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u32 d;
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@ -485,7 +494,40 @@ static void sh2_peripheral_write8(u32 a, u32 d, int id)
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elprintf(EL_32X, "%csh2 peri w8 [%08x] %02x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
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a &= 0x1ff;
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r[a] = d;
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PREG8(r, a) = d;
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// X-men SCI hack
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if ((a == 2 && (d & 0x20)) || // transmiter enabled
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(a == 4 && !(d & 0x80))) { // valid data in TDR
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void *oregs = Pico32xMem->sh2_peri_regs[id ^ 1];
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if ((PREG8(oregs, 2) & 0x50) == 0x50) { // receiver + irq enabled
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int level = PREG8(oregs, 0x60) >> 4;
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int vector = PREG8(oregs, 0x63) & 0x7f;
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elprintf(EL_32X, "%csh2 SCI recv irq (%d, %d)", (id ^ 1) ? 's' : 'm', level, vector);
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sh2_internal_irq(&sh2s[id ^ 1], level, vector);
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}
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}
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}
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static void sh2_peripheral_write16(u32 a, u32 d, int id)
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{
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u16 *r = (void *)Pico32xMem->sh2_peri_regs[id];
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elprintf(EL_32X, "%csh2 peri w16 [%08x] %04x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
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a &= 0x1ff;
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// evil WDT
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if (a == 0x80) {
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if ((d & 0xff00) == 0xa500) { // WTCSR
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PREG8(r, 0x80) = d;
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p32x_timers_recalc();
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}
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if ((d & 0xff00) == 0x5a00) // WTCNT
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PREG8(r, 0x81) = d;
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return;
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}
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r[(a / 2) ^ 1] = d;
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}
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static void sh2_peripheral_write32(u32 a, u32 d, int id)
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@ -827,6 +869,9 @@ u32 p32x_sh2_read16(u32 a, int id)
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goto out;
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}
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if ((a & 0xfffffe00) == 0xfffffe00)
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return sh2_peripheral_read16(a, id);
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elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x",
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id ? 's' : 'm', a, d, sh2_pc(id));
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return d;
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return;
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}
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if ((a & 0xfffffe00) == 0xfffffe00) {
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sh2_peripheral_write16(a, d, id);
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return;
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}
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elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x",
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id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
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}
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@ -1052,7 +1102,7 @@ void PicoMemSetup32x(void)
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m68k_poll.flag = P32XF_68KPOLL;
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m68k_poll.cyc_max = 64;
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sh2_poll[0].flag = P32XF_MSH2POLL;
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sh2_poll[0].cyc_max = 16;
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sh2_poll[0].cyc_max = 21;
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sh2_poll[1].flag = P32XF_SSH2POLL;
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sh2_poll[1].cyc_max = 16;
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}
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@ -6,11 +6,14 @@ static int pwm_mult;
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static int pwm_ptr;
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int pwm_frame_smp_cnt;
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static int timer_line_ticks[2];
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void p32x_pwm_refresh(void)
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// timers. This includes PWM timer in 32x and internal SH2 timers
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void p32x_timers_recalc(void)
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{
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int cycles = Pico32x.regs[0x32 / 2];
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int frame_samples;
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int tmp, i;
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cycles = (cycles - 1) & 0x0fff;
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if (cycles < 500) {
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@ -25,16 +28,30 @@ void p32x_pwm_refresh(void)
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frame_samples = OSC_NTSC / 7 * 3 / 60 / cycles;
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pwm_line_samples = (frame_samples << 16) / scanlines_total;
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// SH2 timer step
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for (i = 0; i < 2; i++) {
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tmp = PREG8(Pico32xMem->sh2_peri_regs[i], 0x80) & 7;
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// Sclk cycles per timer tick
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if (tmp)
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cycles = 0x20 << tmp;
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else
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cycles = 2;
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if (Pico.m.pal)
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tmp = OSC_PAL / 7 * 3 / 50 / scanlines_total;
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else
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tmp = OSC_NTSC / 7 * 3 / 60 / scanlines_total;
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timer_line_ticks[i] = (tmp << 16) / cycles;
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elprintf(EL_32X, "timer_line_ticks[%d] = %.3f", i, (double)timer_line_ticks[i] / 0x10000);
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}
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}
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// irq for every sample??
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// FIXME: we need to hit more than once per line :(
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void p32x_pwm_irq_check(int new_line)
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// PWM irq for every tm samples
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void p32x_timers_do(int new_line)
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{
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int tm = (Pico32x.regs[0x30 / 2] & 0x0f00) >> 8;
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if (tm == 0)
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return; // TODO: verify
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int tm, cnt, i;
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tm = (Pico32x.regs[0x30 / 2] & 0x0f00) >> 8;
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if (tm != 0) {
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if (new_line)
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Pico32x.pwm_irq_sample_cnt += pwm_line_samples;
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if (Pico32x.pwm_irq_sample_cnt >= (tm << 16)) {
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@ -42,6 +59,26 @@ void p32x_pwm_irq_check(int new_line)
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Pico32x.sh2irqs |= P32XI_PWM;
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p32x_update_irls();
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}
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}
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if (!new_line)
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return;
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for (i = 0; i < 2; i++) {
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void *pregs = Pico32xMem->sh2_peri_regs[i];
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if (PREG8(pregs, 0x80) & 0x20) { // TME
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cnt = PREG8(pregs, 0x81);
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cnt += timer_line_ticks[i];
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if (cnt >= 0x100) {
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int level = PREG8(pregs, 0xe3) >> 4;
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int vector = PREG8(pregs, 0xe4) & 0x7f;
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elprintf(EL_32X, "%csh2 WDT irq (%d, %d)", i ? 's' : 'm', level, vector);
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sh2_internal_irq(&sh2s[i], level, vector);
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}
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cnt &= 0xff;
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PREG8(pregs, 0x81) = cnt;
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}
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}
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}
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unsigned int p32x_pwm_read16(unsigned int a)
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@ -78,7 +115,7 @@ void p32x_pwm_write16(unsigned int a, unsigned int d)
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Pico32x.regs[0x30 / 2] = d;
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else if (a == 2) { // cycle
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Pico32x.regs[0x32 / 2] = d & 0x0fff;
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p32x_pwm_refresh();
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p32x_timers_recalc();
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Pico32x.pwm_irq_sample_cnt = 0; // resets?
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}
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else if (a <= 8) {
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@ -220,7 +220,7 @@ void PicoLoopPrepare(void)
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scanlines_total = Pico.m.pal ? 312 : 262;
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if (PicoAHW & PAHW_32X)
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p32x_pwm_refresh();
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p32x_timers_recalc();
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}
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@ -84,7 +84,7 @@ static int PicoFrameHints(void)
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check_cd_dma();
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#endif
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#ifdef PICO_32X
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p32x_pwm_irq_check(1);
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p32x_timers_do(1);
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#endif
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// H-Interrupts:
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@ -156,7 +156,7 @@ static int PicoFrameHints(void)
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check_cd_dma();
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#endif
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#ifdef PICO_32X
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p32x_pwm_irq_check(1);
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p32x_timers_do(1);
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#endif
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// Last H-Int:
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check_cd_dma();
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#endif
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#ifdef PICO_32X
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p32x_pwm_irq_check(1);
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p32x_timers_do(1);
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#endif
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// Run scanline:
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@ -230,7 +230,10 @@ typedef void (z80_write_f)(unsigned int a, unsigned char data);
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#include "cpu/sh2mame/sh2.h"
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SH2 msh2, ssh2;
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extern SH2 sh2s[2];
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#define msh2 sh2s[0]
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#define ssh2 sh2s[1]
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#define ash2_end_run(after) if (sh2_icount > (after)) sh2_icount = after
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#define ash2_cycles_done() (sh2->cycles_aim - sh2_icount)
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@ -436,6 +439,9 @@ typedef struct
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#define P32XI_CMD (1 << 8/2)
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#define P32XI_PWM (1 << 6/2)
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// peripheral reg access
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#define PREG8(regs,offs) ((unsigned char *)regs)[offs ^ 3]
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// real one is 4*2, but we use more because we don't lockstep
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#define DMAC_FIFO_LEN (4*4)
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#define PWM_BUFF_LEN 1024 // in one channel samples
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@ -682,9 +688,9 @@ void FinalizeLine32xRGB555(int sh, int line);
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// 32x/pwm.c
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unsigned int p32x_pwm_read16(unsigned int a);
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void p32x_pwm_write16(unsigned int a, unsigned int d);
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void p32x_pwm_refresh(void);
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void p32x_pwm_irq_check(int new_line);
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void p32x_pwm_update(int *buf32, int length, int stereo);
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void p32x_timers_do(int new_line);
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void p32x_timers_recalc(void);
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extern int pwm_frame_smp_cnt;
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||||
/* avoid dependency on newer glibc */
|
||||
|
|
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Reference in a new issue