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svp compiler, early stage, works
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@359 be3aeb3a-fb24-0410-a615-afba39da0efa
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5c129565f0
commit
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3 changed files with 57 additions and 37 deletions
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@ -3,7 +3,7 @@
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#include "../../PicoInt.h"
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#define TCACHE_SIZE (256*1024)
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#define TCACHE_SIZE (1024*1024)
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static unsigned int *block_table[0x5090/2];
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static unsigned int *block_table_iram[15][0x800/2];
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static unsigned int *tcache = NULL;
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@ -33,7 +33,7 @@ static int iram_context = 0;
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static void op00(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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PC = ((unsigned short *)&op) + 1; /* FIXME: needed for interpreter */
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PC = ((unsigned short *)(void *)&op) + 1; /* FIXME: needed for interpreter */
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if (op == 0) return; // nop
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if (op == ((SSP_A<<4)|SSP_P)) { // A <- P
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// not sure. MAME claims that only hi word is transfered.
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@ -111,7 +111,7 @@ static void op24(unsigned int op, unsigned int imm)
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int cond = 0;
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do {
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COND_CHECK
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if (cond) { int new_PC = imm; write_STACK(GET_PC()); write_PC(new_PC); }
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if (cond) { int new_PC = imm; write_STACK(GET_PC()); SET_PC(new_PC); }
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}
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while (0);
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}
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@ -130,9 +130,9 @@ static void op26(unsigned int op, unsigned int imm)
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{
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int cond = 0;
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COND_CHECK
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if (cond) write_PC(imm);
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if (cond) SET_PC(imm);
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}
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while(0);
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while (0);
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}
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// mod cond, op
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@ -527,22 +527,23 @@ static void *translate_block(int pc)
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*tcache_ptr++ = (u32) &ssp->gr[SSP_PC].v; // -2 ptr to rPC
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*tcache_ptr++ = (u32) in_funcs; // -1 func pool
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printf("translate %04x -> %04x\n", pc<<1, (tcache_ptr-tcache)<<2);
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block_start = tcache_ptr;
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emit_block_prologue();
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//printf("translate %04x -> %04x\n", pc<<1, (tcache_ptr-tcache)<<1);
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for (;;)
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for (; icount < 100;)
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{
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icount++;
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//printf(" insn #%i\n", icount);
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op = PROGRAM(pc++);
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op1 = op >> 9;
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emit_mov_const16(0, op);
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emit_mov_const(0, op);
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// need immediate?
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if ((op1 & 0xf) == 4 || (op1 & 0xf) == 6) {
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emit_mov_const16(1, PROGRAM(pc++)); // immediate
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emit_mov_const(1, PROGRAM(pc++)); // immediate
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}
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// dump PC
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@ -575,6 +576,7 @@ static void *translate_block(int pc)
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nblocks++;
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//if (pc >= 0x400)
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printf("%i blocks, %i bytes\n", nblocks, (tcache_ptr - tcache)*4);
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//printf("%p %p\n", tcache_ptr, emit_block_epilogue);
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#if 0
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{
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@ -584,6 +586,9 @@ static void *translate_block(int pc)
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}
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exit(0);
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#endif
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handle_caches();
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return block_start;
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}
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@ -612,18 +617,6 @@ void ssp1601_dyn_reset(ssp1601_t *ssp)
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ssp1601_reset_local(ssp);
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}
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static void handle_caches()
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{
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#ifdef ARM
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extern void flush_inval_dcache(const void *start_addr, const void *end_addr);
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extern void flush_inval_icache(const void *start_addr, const void *end_addr);
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flush_inval_dcache(tcache, tcache_ptr);
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flush_inval_icache(tcache, tcache_ptr);
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#else
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#error wth
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#endif
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}
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void ssp1601_dyn_run(int cycles)
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{
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while (cycles > 0)
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@ -650,8 +643,9 @@ void ssp1601_dyn_run(int cycles)
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//printf("enter @ %04x, PC=%04x\n", (PC - tcache)<<1, rPC<<1);
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g_cycles = 0;
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handle_caches();
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//printf("enter %04x\n", rPC);
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trans_entry();
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//printf("leave %04x\n", rPC);
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cycles -= g_cycles;
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/*
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if (!had_jump) {
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@ -53,15 +53,30 @@
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#define EOP_BX(rm) EOP_C_BX(A_COND_AL,rm)
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static void emit_mov_const16(int d, unsigned int val)
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static void emit_mov_const(int d, unsigned int val)
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{
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int need_or = 0;
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if (val & 0xff00) {
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EOP_MOV_IMM(0, d, 24/2, (val>>8)&0xff);
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if (val & 0xff000000) {
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EOP_MOV_IMM(0, d, 8/2, (val>>24)&0xff);
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need_or = 1;
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}
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if ((val & 0xff) || !need_or)
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EOP_C_DOP_IMM(A_COND_AL,need_or ? A_OP_ORR : A_OP_MOV, 0, d, d, 0, val&0xff);
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if (val & 0x00ff0000) {
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EOP_C_DOP_IMM(A_COND_AL,need_or ? A_OP_ORR : A_OP_MOV, 0, need_or ? d : 0, d, 16/2, (val>>16)&0xff);
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need_or = 1;
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}
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if (val & 0x0000ff00) {
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EOP_C_DOP_IMM(A_COND_AL,need_or ? A_OP_ORR : A_OP_MOV, 0, need_or ? d : 0, d, 24/2, (val>>8)&0xff);
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need_or = 1;
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}
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if ((val &0x000000ff) || !need_or)
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EOP_C_DOP_IMM(A_COND_AL,need_or ? A_OP_ORR : A_OP_MOV, 0, need_or ? d : 0, d, 0, val&0xff);
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}
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static void check_offset_12(unsigned int val)
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{
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if (!(val & ~0xfff)) return;
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printf("offset_12 overflow %04x\n", val);
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exit(1);
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}
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static void emit_block_prologue(void)
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@ -74,8 +89,10 @@ static void emit_block_epilogue(unsigned int *block_start, int icount)
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{
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int back = (tcache_ptr - block_start) + 2;
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back += 3; // g_cycles
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check_offset_12(back<<2);
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EOP_LDR_NEGIMM(2,15,back<<2); // ldr r2,[pc,#back]
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emit_mov_const16(3, icount);
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emit_mov_const(3, icount);
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EOP_STR_SIMPLE(3,2); // str r3,[r2]
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EOP_LDMFD_ST(A_R14M); // ldmfd r13!, {r14}
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@ -86,8 +103,10 @@ static void emit_pc_inc(unsigned int *block_start, int pc)
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{
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int back = (tcache_ptr - block_start) + 2;
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back += 2; // rPC ptr
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check_offset_12(back<<2);
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EOP_LDR_NEGIMM(2,15,back<<2); // ldr r2,[pc,#back]
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emit_mov_const16(3, pc);
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emit_mov_const(3, pc<<16);
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EOP_STR_SIMPLE(3,2); // str r3,[r2]
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}
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@ -95,9 +114,21 @@ static void emit_call(unsigned int *block_start, unsigned int op1)
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{
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int back = (tcache_ptr - block_start) + 2;
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back += 1; // func table
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check_offset_12(back<<2);
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EOP_LDR_NEGIMM(2,15,back<<2); // ldr r2,[pc,#back]
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EOP_MOV_REG_SIMPLE(14,15); // mov lr,pc
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EOP_LDR_IMM(15,2,op1<<2); // ldr pc,[r2,#op1]
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}
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static void handle_caches()
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{
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#ifdef ARM
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extern void flush_inval_caches(const void *start_addr, const void *end_addr);
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flush_inval_caches(tcache, tcache_ptr);
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#else
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#error wth
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#endif
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}
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@ -10,19 +10,14 @@
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@ r9: r4-r6
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@ r10: P
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.global flush_inval_dcache
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.global flush_inval_icache
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.global flush_inval_caches
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.text
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.align 4
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flush_inval_dcache:
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mov r2, #0x0 @ ??
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flush_inval_caches:
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mov r2, #0x0 @ must be 0
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swi 0x9f0002
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bx lr
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flush_inval_icache:
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mov r2, #0x1
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swi 0x9f0002
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bx lr
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