mirror of
https://github.com/RaySollium99/picodrive.git
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svp...
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@322 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz
parent
5de27868df
commit
30752975e0
5 changed files with 179 additions and 66 deletions
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@ -42,16 +42,23 @@ void PicoSVPWrite16(unsigned int a, unsigned int d, int realsize)
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if ((a & 0xfe0000) == 0x300000)
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*(u16 *)(svp->dram + (a&0x1fffe)) = d;
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if (a == 0x30fe06 && d != 0)
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svp->ssp1601.emu_status &= ~SSP_30FE06_WAIT;
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if (a == 0x30fe08 && d != 0)
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svp->ssp1601.emu_status &= ~SSP_30FE08_WAIT;
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// debug: detect RAM clears..
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CLEAR_DETECT(0x0221dc, 0x0221f0, "SVP RAM CLEAR (1)");
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CLEAR_DETECT(0x02204c, 0x022068, "SVP RAM CLEAR (2)");
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CLEAR_DETECT(0x0221dc, 0x0221f0, "SVP RAM CLEAR (full) @ 0221C2");
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CLEAR_DETECT(0x02204c, 0x022068, "SVP RAM CLEAR 300000-31ffbf (1) @ 022032");
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CLEAR_DETECT(0x021900, 0x021ff0, "SVP RAM CLEAR 300000-305fff");
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CLEAR_DETECT(0x0220b0, 0x0220cc, "SVP RAM CLEAR 300000-31ffbf (2) @ 022096");
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clearing_ram = 0;
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elprintf(EL_UIO, "SVP w%i: [%06x], %04x @%06x", realsize, a&0xffffff, d, SekPc);
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// just guessing here
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if (a == 0xa15002) svp->ssp1601.gr[SSP_XST].h = d;
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else if (a == 0xa15006) svp->ssp1601.gr[SSP_PM0].h = d;
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else if (a == 0xa15006) svp->ssp1601.gr[SSP_PM0].h = d | (d << 1);
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}
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@ -141,6 +141,19 @@
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* name: multiply and subtract?
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* notes: not used by VR code.
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*
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* ld a, * doesn't affect flags! (e: A_LAW.SC, Div_c_dp.sc)
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*
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* memory map:
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* 000000 - 1fffff ROM, accessable by both
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* 200000 - 2fffff unused?
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* 300000 - 30ffff DRAM, both
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* 310000 - 31ffff cleared, but never(?) accessed?
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* 320000 - 38ffff unused?
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* 390000 - 3907ff IRAM. can only be accessed by ssp?
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*
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* 30fe02 - 0 if SVP busy, 1 if done (set by SVP, checked and cleared by 68k)
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* 30fe06 - also sync related.
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* 30fe08 - job number [1-12] for SVP. 0 means nothing. Set by 68k, read-cleared by SVP.
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*
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* Assumptions in this code
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* P is not directly writeable
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@ -182,7 +195,6 @@
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#define SET_PC(d) PC = (unsigned short *)svp->iram_rom + d
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#define REG_READ(r) (((r) <= 4) ? ssp->gr[r].h : read_handlers[r]())
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// if r is 'A', should we set flags?
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#define REG_WRITE(r,d) { \
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int r1 = r; \
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if (r1 >= 4) write_handlers[r1](d); \
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@ -220,10 +232,9 @@
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// ops with accumulator.
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// how is low word really affected by these?
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// not sure if 'ld A' affects flags (assume it does..)
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// nearly sure 'ld A' doesn't affect flags
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#define OP_LDA(x) \
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ssp->gr[SSP_A].h = x; \
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UPD_ACC_ZN
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ssp->gr[SSP_A].h = x
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#define OP_SUBA(x) { \
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u32 t = (ssp->gr[SSP_A].v >> 16) - (x); \
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@ -260,6 +271,7 @@ static unsigned short *PC;
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static int g_cycles;
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// debug
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static int running = 0;
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static int last_iram = 0;
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// -----------------------------------------------------
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// register i/o handlers
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@ -267,13 +279,13 @@ static int running = 0;
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// 0-4, 13
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static u32 read_unknown(void)
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{
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elprintf(EL_ANOMALY|EL_SVP, "ssp16: unknown read @ %04x", GET_PPC_OFFS());
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elprintf(EL_ANOMALY|EL_SVP, "ssp16: FIXME: unknown read @ %04x", GET_PPC_OFFS());
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return 0;
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}
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static void write_unknown(u32 d)
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{
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elprintf(EL_ANOMALY|EL_SVP, "ssp16: unknown write @ %04x", GET_PPC_OFFS());
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elprintf(EL_ANOMALY|EL_SVP, "ssp16: FIXME: unknown write @ %04x", GET_PPC_OFFS());
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}
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// 4
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@ -281,7 +293,7 @@ static void write_ST(u32 d)
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{
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if ((rST ^ d) & 7) {
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elprintf(EL_SVP, "ssp16: RPL %i -> %i @ %04x", rST&7, d&7, GET_PPC_OFFS());
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running = 0;
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// running = 0;
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}
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rST = d;
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}
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@ -293,7 +305,7 @@ static u32 read_STACK(void)
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--rSTACK;
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if ((short)rSTACK < 0) {
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rSTACK = 5;
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elprintf(EL_ANOMALY|EL_SVP, "ssp16: stack underflow! (%i) @ %04x", rSTACK, GET_PPC_OFFS());
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elprintf(EL_ANOMALY|EL_SVP, "ssp16: FIXME: stack underflow! (%i) @ %04x", rSTACK, GET_PPC_OFFS());
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}
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return ssp->stack[rSTACK];
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}
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@ -301,8 +313,8 @@ static u32 read_STACK(void)
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static void write_STACK(u32 d)
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{
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if (rSTACK >= 6) {
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//running = 0;
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elprintf(EL_ANOMALY|EL_SVP, "ssp16: stack overflow! (%i) @ %04x", rSTACK, GET_PPC_OFFS());
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running = 0;
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elprintf(EL_ANOMALY|EL_SVP, "ssp16: FIXME: stack overflow! (%i) @ %04x", rSTACK, GET_PPC_OFFS());
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rSTACK = 0;
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}
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ssp->stack[rSTACK++] = d;
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@ -332,18 +344,41 @@ static u32 read_P(void)
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static void iram_write(int addr, u32 d, int reg, int inc)
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{
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if ((addr&0xfc00) != 0x8000)
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elprintf(EL_SVP|EL_ANOMALY, "ssp invalid IRAM addr: %04x", addr<<1);
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elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: invalid IRAM addr: %04x", addr<<1);
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elprintf(EL_SVP, "ssp IRAM w [%06x] %04x (inc %i)", (addr<<1)&0x7ff, d, inc);
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((unsigned short *)svp->iram_rom)[addr&0x3ff] = d;
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ssp->pmac_write[reg] += inc<<16;
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}
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int lil[32] = { 0, }, lilp = 0;
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static void debug_dump2file(const char *fname, void *mem, int len);
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static u32 pm_io(int reg, int write, u32 d)
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{
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if (ssp->emu_status & SSP_PMC_SET) {
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elprintf(EL_SVP, "PM%i (%c) set to %08x @ %04x", reg, write ? 'w' : 'r', rPMC.v, GET_PPC_OFFS());
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ssp->pmac_read[write ? reg + 6 : reg] = rPMC.v;
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ssp->emu_status &= ~SSP_PMC_SET;
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if ((rPMC.v & 0x7f) == 0x1c && (rPMC.v & 0x7fff0000) == 0) {
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elprintf(EL_SVP, "IRAM copy from %06x", (ssp->RAM1[0]-1)<<1);
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/*
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{
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int i;
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char buff[64];
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for (i = 0; i < 32; i++) {
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if (lil[i] == last_iram) break;
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if (lil[i] == 0) {
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lil[i] = last_iram;
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sprintf(buff, "iramrom_%04x.bin", last_iram);
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debug_dump2file(buff, svp->iram_rom, sizeof(svp->iram_rom));
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break;
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}
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}
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}
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*/
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last_iram = (ssp->RAM1[0]-1)<<1;
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}
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return 0;
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}
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@ -353,22 +388,27 @@ static u32 pm_io(int reg, int write, u32 d)
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// if (ssp->pmac_read[reg] != 0)
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if (reg == 4 || (rST & 0x60))
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{
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#define CADDR ((((mode<<16)&0x7f0000)|addr)<<1)
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if (write)
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{
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int mode = ssp->pmac_write[reg]&0xffff;
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int addr = ssp->pmac_write[reg]>>16;
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switch (mode) {
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case 0x0018: elprintf(EL_SVP, "ssp DRAM w [%06x] %04x", addr<<1, d);
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case 0x0018: elprintf(EL_SVP, "ssp DRAM w [%06x] %04x", CADDR, d);
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((unsigned short *)svp->dram)[addr] = d;
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break;
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case 0x0818: elprintf(EL_SVP, "ssp DRAM w [%06x] %04x (inc 1)", addr<<1, d);
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case 0x0818: elprintf(EL_SVP, "ssp DRAM w [%06x] %04x (inc 1)", CADDR, d);
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((unsigned short *)svp->dram)[addr] = d;
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ssp->pmac_write[reg] += 1<<16;
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break;
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case 0x081c: iram_write(addr, d, reg, 1); break; // checked: used by code @ 0902
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case 0x101c: iram_write(addr, d, reg, 2); break; // checked: used by code @ 3b7c
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case 0x4018: elprintf(EL_SVP, "ssp DRAM w [%06x] %04x (cell inc)", CADDR, d);
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((unsigned short *)svp->dram)[addr] = d;
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ssp->pmac_write[reg] += (addr&1) ? (31<<16) : (1<<16);
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break;
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default: elprintf(EL_SVP|EL_ANOMALY, "ssp PM%i unhandled write mode %04x, [%06x] %04x @ %04x",
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reg, mode, addr<<1, d, GET_PPC_OFFS()); break;
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reg, mode, CADDR, d, GET_PPC_OFFS()); break;
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}
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}
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else
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@ -376,24 +416,44 @@ static u32 pm_io(int reg, int write, u32 d)
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int mode = ssp->pmac_read[reg]&0xffff;
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int addr = ssp->pmac_read[reg]>>16;
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switch (mode) {
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case 0x0809: elprintf(EL_SVP, "ssp ROM r [%06x] %04x", (addr|((mode&0xf)<<16))<<1,
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case 0x0807:
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case 0x0808:
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case 0x0809: elprintf(EL_SVP, "ssp ROM r [%06x] %04x", CADDR,
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((unsigned short *)Pico.rom)[addr|((mode&0xf)<<16)]);
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// possibly correct, the first word read is some sort of counter, sane values in ROM
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ssp->pmac_read[reg] += 1<<16;
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return ((unsigned short *)Pico.rom)[addr|((mode&0xf)<<16)];
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case 0x0018: elprintf(EL_SVP, "ssp DRAM r [%06x] %04x", addr<<1, ((unsigned short *)svp->dram)[addr]);
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return ((unsigned short *)svp->dram)[addr]; // checked
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case 0x0818: elprintf(EL_SVP, "ssp DRAM r [%06x] %04x (inc 1)", addr<<1, ((unsigned short *)svp->dram)[addr]);
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d = ((unsigned short *)Pico.rom)[addr|((mode&0xf)<<16)];
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break;
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case 0x0018: elprintf(EL_SVP, "ssp DRAM r [%06x] %04x", CADDR, ((unsigned short *)svp->dram)[addr]);
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d = ((unsigned short *)svp->dram)[addr]; // checked
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break;
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case 0x0818: elprintf(EL_SVP, "ssp DRAM r [%06x] %04x (inc 1)", CADDR, ((unsigned short *)svp->dram)[addr]);
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ssp->pmac_read[reg] += 1<<16;
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return ((unsigned short *)svp->dram)[addr];
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case 0x3018: elprintf(EL_SVP, "ssp DRAM r [%06x] %04x (inc 32)", addr<<1, ((unsigned short *)svp->dram)[addr]);
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d = ((unsigned short *)svp->dram)[addr];
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break;
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case 0x3018: elprintf(EL_SVP, "ssp DRAM r [%06x] %04x (inc 32)", CADDR, ((unsigned short *)svp->dram)[addr]);
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ssp->pmac_read[reg] += 32<<16;
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return ((unsigned short *)svp->dram)[addr];
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d = ((unsigned short *)svp->dram)[addr];
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break;
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case 0xa818: elprintf(EL_SVP, "ssp DRAM r [%06x] %04x (dec 16)", CADDR, ((unsigned short *)svp->dram)[addr]);
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ssp->pmac_read[reg] -= 16<<16;
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d = ((unsigned short *)svp->dram)[addr];
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break;
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case 0xb818: elprintf(EL_SVP, "ssp DRAM r [%06x] %04x (dec 128?)", CADDR, ((unsigned short *)svp->dram)[addr]);
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ssp->pmac_read[reg] -= 128<<16;
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d = ((unsigned short *)svp->dram)[addr];
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break;
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default: elprintf(EL_SVP|EL_ANOMALY, "ssp PM%i unhandled read mode %04x, [%06x] @ %04x",
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reg, mode, addr<<1, GET_PPC_OFFS()); break;
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reg, mode, CADDR, GET_PPC_OFFS());
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d = 0;
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break;
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}
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}
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return 0;
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// PMC value corresponds to last PMR accessed (not sure).
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rPMC.v = ssp->pmac_read[write ? reg + 6 : reg];
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return d;
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}
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return (u32)-1;
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@ -414,7 +474,7 @@ static void write_PM0(u32 d)
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u32 r = pm_io(0, 1, d);
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if (r != (u32)-1) return;
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elprintf(EL_SVP, "PM0 raw w %04x @ %04x", d, GET_PPC_OFFS());
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rPM0 = d;
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// rPM0 = d; // ignore
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}
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// 9
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@ -480,6 +540,12 @@ static void write_XST(u32 d)
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static u32 read_PM4(void)
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{
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u32 d = pm_io(4, 0, 0);
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if (d == 0) {
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switch (GET_PPC_OFFS()) {
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case 0x0854: ssp->emu_status |= SSP_30FE08_WAIT; elprintf(EL_SVP, "det TIGHT loop: [30fe08]"); break;
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case 0x4f12: ssp->emu_status |= SSP_30FE06_WAIT; elprintf(EL_SVP, "det TIGHT loop: [30fe06]"); break;
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}
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}
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if (d != (u32)-1) return d;
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// can be removed?
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elprintf(EL_SVP, "PM4 raw r %04x @ %04x", rPM4, GET_PPC_OFFS());
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@ -498,6 +564,7 @@ static void write_PM4(u32 d)
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// 14
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static u32 read_PMC(void)
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{
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elprintf(EL_SVP, "PMC r %08x @ %04x", rPMC.v, GET_PPC_OFFS());
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if (ssp->emu_status & SSP_PMC_HAVE_ADDR) {
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if (ssp->emu_status & SSP_PMC_SET)
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elprintf(EL_ANOMALY|EL_SVP, "prev PMC not used @ %04x", GET_PPC_OFFS());
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@ -584,7 +651,8 @@ static write_func_t write_handlers[16] =
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static u32 ptr1_read_(int ri, int isj2, int modi3)
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{
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//int t = (op&3) | ((op>>6)&4) | ((op<<1)&0x18);
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int t = ri | isj2 | modi3;
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u32 mask, add = 0, t = ri | isj2 | modi3;
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unsigned char *rp = NULL;
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switch (t)
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{
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// mod=0 (00)
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@ -597,36 +665,48 @@ static u32 ptr1_read_(int ri, int isj2, int modi3)
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case 0x06: return ssp->RAM1[ssp->r1[t&3]];
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case 0x07: return ssp->RAM1[0];
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// mod=1 (01), "+!"
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// mod=3, "+"
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case 0x08:
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case 0x18:
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case 0x09:
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case 0x19:
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case 0x0a:
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case 0x1a: return ssp->RAM0[ssp->r0[t&3]++];
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case 0x0a: return ssp->RAM0[ssp->r0[t&3]++];
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case 0x0b: return ssp->RAM0[1];
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case 0x0c:
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case 0x1c:
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case 0x0d:
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case 0x1d:
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case 0x0e:
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case 0x1e: return ssp->RAM1[ssp->r1[t&3]++];
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case 0x0e: return ssp->RAM1[ssp->r1[t&3]++];
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case 0x0f: return ssp->RAM1[1];
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// mod=2 (10), "-"
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case 0x10:
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case 0x11:
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case 0x12: return ssp->RAM0[ssp->r0[t&3]--];
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case 0x12: rp = &ssp->r0[t&3]; t = ssp->RAM0[*rp];
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if (!(rST&7)) { (*rp)--; return t; }
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add = -1; goto modulo;
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case 0x13: return ssp->RAM0[2];
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case 0x14:
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case 0x15:
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case 0x16: return ssp->RAM1[ssp->r1[t&3]--];
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case 0x16: rp = &ssp->r1[t&3]; t = ssp->RAM1[*rp];
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if (!(rST&7)) { (*rp)--; return t; }
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add = -1; goto modulo;
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case 0x17: return ssp->RAM1[2];
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// mod=3 (11)
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// mod=3 (11), "+"
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case 0x18:
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case 0x19:
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case 0x1a: rp = &ssp->r0[t&3]; t = ssp->RAM0[*rp];
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if (!(rST&7)) { (*rp)++; return t; }
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add = 1; goto modulo;
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case 0x1b: return ssp->RAM0[3];
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case 0x1c:
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case 0x1d:
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case 0x1e: rp = &ssp->r1[t&3]; t = ssp->RAM1[*rp];
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if (!(rST&7)) { (*rp)++; return t; }
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add = 1; goto modulo;
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case 0x1f: return ssp->RAM1[3];
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}
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return 0;
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modulo:
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mask = (1 << (rST&7)) - 1;
|
||||
*rp = (*rp & ~mask) | ((*rp + add) & mask);
|
||||
return t;
|
||||
}
|
||||
|
||||
static void ptr1_write(int op, u32 d)
|
||||
|
|
@ -697,7 +777,7 @@ static u32 ptr2_read(int op)
|
|||
// mod=3 (11)
|
||||
case 0x1b: mv = ssp->RAM0[3]++; break;
|
||||
case 0x1f: mv = ssp->RAM1[3]++; break;
|
||||
default: elprintf(EL_SVP|EL_ANOMALY, "invalid mod in ((rX))? @ %04x", GET_PPC_OFFS());
|
||||
default: elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: invalid mod in ((rX))? @ %04x", GET_PPC_OFFS());
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -714,6 +794,7 @@ void ssp1601_reset(ssp1601_t *l_ssp)
|
|||
ssp->gr[SSP_GR0].v = 0xffff0000;
|
||||
rPC = 0x400;
|
||||
rSTACK = 0; // ? using ascending stack
|
||||
rST = 0;
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -745,6 +826,22 @@ static void debug_dump_mem(void)
|
|||
}
|
||||
}
|
||||
|
||||
static void debug_dump2file(const char *fname, void *mem, int len)
|
||||
{
|
||||
FILE *f = fopen(fname, "wb");
|
||||
unsigned short *p = mem;
|
||||
int i;
|
||||
if (f) {
|
||||
for (i = 0; i < len/2; i++) p[i] = (p[i]<<8) | (p[i]>>8);
|
||||
fwrite(mem, 1, len, f);
|
||||
fclose(f);
|
||||
for (i = 0; i < len/2; i++) p[i] = (p[i]<<8) | (p[i]>>8);
|
||||
printf("dumped to %s\n", fname);
|
||||
}
|
||||
else
|
||||
printf("dump failed\n");
|
||||
}
|
||||
|
||||
static int bpts[10] = { 0, };
|
||||
|
||||
static void debug(unsigned int pc, unsigned int op)
|
||||
|
|
@ -789,21 +886,11 @@ static void debug(unsigned int pc, unsigned int op)
|
|||
printf("breakpoint %i set @ %04x\n", i, bpts[i]<<1);
|
||||
break;
|
||||
}
|
||||
case 'd': {
|
||||
FILE *f = fopen("dump.bin", "wb");
|
||||
unsigned short *p = (unsigned short *)svp->iram_rom;
|
||||
int i;
|
||||
if (f) {
|
||||
for (i = 0; i < 0x10000; i++) p[i] = (p[i]<<8) | (p[i]>>8);
|
||||
fwrite(svp->iram_rom, 1, 0x20000, f);
|
||||
fclose(f);
|
||||
for (i = 0; i < 0x10000; i++) p[i] = (p[i]<<8) | (p[i]>>8);
|
||||
printf("dumped to dump.bin\n");
|
||||
}
|
||||
else
|
||||
printf("dump failed\n");
|
||||
case 'd':
|
||||
sprintf(buff, "iramrom_%04x.bin", last_iram);
|
||||
debug_dump2file(buff, svp->iram_rom, sizeof(svp->iram_rom));
|
||||
debug_dump2file("dram.bin", svp->dram, sizeof(svp->dram));
|
||||
break;
|
||||
}
|
||||
default: printf("unknown command\n"); break;
|
||||
}
|
||||
}
|
||||
|
|
@ -815,7 +902,7 @@ void ssp1601_run(int cycles)
|
|||
g_cycles = cycles;
|
||||
//running = 0;
|
||||
|
||||
while (g_cycles > 0)
|
||||
while (g_cycles > 0 && !(ssp->emu_status&0xc000))
|
||||
{
|
||||
int op;
|
||||
u32 tmpv;
|
||||
|
|
@ -902,16 +989,30 @@ void ssp1601_run(int cycles)
|
|||
case 7: if ((int)rA32 < 0) rA32 = -(int)rA32; break; // abs
|
||||
default: elprintf(EL_SVP, "ssp16: unhandled mod %i @ %04x", op&7, GET_PPC_OFFS());
|
||||
}
|
||||
UPD_ACC_ZN
|
||||
UPD_ACC_ZN // ?
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
#if 1
|
||||
// mpys?
|
||||
case 0x1b:
|
||||
// very uncertain about this one. What about b?
|
||||
if (!(op&0x100)) elprintf(EL_SVP|EL_ANOMALY, "ssp16: FIXME: no b bit @ %04x", GET_PPC_OFFS());
|
||||
read_P(); // update P
|
||||
ssp->gr[SSP_A].v -= ssp->gr[SSP_P].v; // maybe only upper word?
|
||||
// UPD_ACC_ZN // I've seen code checking flags after this
|
||||
rX = ptr1_read_(op&3, 0, (op<<1)&0x18); // ri (maybe rj?)
|
||||
rY = ptr1_read_((op>>4)&3, 4, (op>>3)&0x18); // rj
|
||||
break;
|
||||
#endif
|
||||
// mpya (rj), (ri), b
|
||||
case 0x4b:
|
||||
// dunno if this is correct. What about b?
|
||||
if (!(op&0x100)) elprintf(EL_SVP|EL_ANOMALY, "ssp16: FIXME: no b bit @ %04x", GET_PPC_OFFS());
|
||||
read_P(); // update P
|
||||
ssp->gr[SSP_A].v += ssp->gr[SSP_P].v; // maybe only upper word?
|
||||
// UPD_ACC_ZN // ?
|
||||
rX = ptr1_read_(op&3, 0, (op<<1)&0x18); // ri (maybe rj?)
|
||||
rY = ptr1_read_((op>>4)&3, 4, (op>>3)&0x18); // rj
|
||||
break;
|
||||
|
|
@ -919,7 +1020,9 @@ void ssp1601_run(int cycles)
|
|||
// mld (rj), (ri), b
|
||||
case 0x5b:
|
||||
// dunno if this is correct. What about b?
|
||||
if (!(op&0x100)) elprintf(EL_SVP|EL_ANOMALY, "ssp16: FIXME: no b bit @ %04x", GET_PPC_OFFS());
|
||||
ssp->gr[SSP_A].v = 0; // maybe only upper word?
|
||||
// UPD_t_LZVN // ?
|
||||
rX = ptr1_read_(op&3, 0, (op<<1)&0x18); // ri (maybe rj?)
|
||||
rY = ptr1_read_((op>>4)&3, 4, (op>>3)&0x18); // rj
|
||||
break;
|
||||
|
|
@ -993,6 +1096,6 @@ void ssp1601_run(int cycles)
|
|||
rPC = GET_PC();
|
||||
|
||||
if (ssp->gr[SSP_GR0].v != 0xffff0000)
|
||||
elprintf(EL_ANOMALY|EL_SVP, "ssp16: REG 0 corruption! %08x", ssp->gr[SSP_GR0].v);
|
||||
elprintf(EL_ANOMALY|EL_SVP, "ssp16: FIXME: REG 0 corruption! %08x", ssp->gr[SSP_GR0].v);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -37,8 +37,10 @@ typedef struct
|
|||
unsigned int pmac_read[6]; // read modes/addrs for PM0-PM5
|
||||
unsigned int pmac_write[6]; // write ...
|
||||
//
|
||||
#define SSP_PMC_HAVE_ADDR 1 // address written to PMAC, waiting for mode
|
||||
#define SSP_PMC_SET 2 // PMAC is set
|
||||
#define SSP_PMC_HAVE_ADDR 0x0001 // address written to PMAC, waiting for mode
|
||||
#define SSP_PMC_SET 0x0002 // PMAC is set
|
||||
#define SSP_30FE06_WAIT 0x4000 // ssp tight loops on 30FE08 to become non-zero
|
||||
#define SSP_30FE08_WAIT 0x8000 // same for 30FE06
|
||||
unsigned int emu_status;
|
||||
unsigned int pad[30];
|
||||
} ssp1601_t;
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@ static void PicoSVPLine(void)
|
|||
// ???
|
||||
// OSC_NTSC / 3.0 / 60.0 / 262.0 ~= 1139
|
||||
// OSC_PAL / 3.0 / 50.0 / 312.0 ~= 1137
|
||||
ssp1601_run(100);
|
||||
ssp1601_run(800);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -26,6 +26,7 @@ static int PicoSVPDma(unsigned int source, int len, unsigned short **srcp, unsig
|
|||
{
|
||||
elprintf(EL_VDPDMA|EL_SVP, "SVP DmaSlow from %06x, len=%i", source, len);
|
||||
source &= 0x1fffe;
|
||||
source -= 2;
|
||||
*srcp = (unsigned short *)(svp->dram + source);
|
||||
*limitp = (unsigned short *)(svp->dram + sizeof(svp->dram));
|
||||
return 1;
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
#define VERSION "1.35"
|
||||
#define VERSION "1.36"
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue