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32x: remove some comm hacks

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they can (and do) easily break things
This commit is contained in:
notaz 2017-11-26 20:19:40 +02:00
parent 6311a3baf5
commit 31fbc691a1
3 changed files with 16 additions and 27 deletions
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3
pico/32x/32x.c
View file

@ -502,6 +502,9 @@ void sync_sh2s_normal(unsigned int m68k_target)
if (CYCLES_GT(m68k_target, ssh2.m68krcycles_done))
ssh2.m68krcycles_done = m68k_target;
}
// everyone is in sync now
Pico32x.comm_dirty = 0;
}
#define STEP_68K 24

30
pico/32x/memory.c
View file

@ -191,12 +191,10 @@ static u32 p32x_reg_read16(u32 a)
int comreg = 1 << (a & 0x0f) / 2;
if (cycles - msh2.m68krcycles_done > 244
|| (Pico32x.comm_dirty_68k & comreg))
|| (Pico32x.comm_dirty & comreg))
p32x_sync_sh2s(cycles);
if (Pico32x.comm_dirty_sh2 & comreg)
Pico32x.comm_dirty_sh2 &= ~comreg;
else if (m68k_poll_detect(a, cycles, P32XF_68KCPOLL)) {
if (m68k_poll_detect(a, cycles, P32XF_68KCPOLL)) {
SekSetStop(1);
SekEndRun(16);
}
@ -388,14 +386,13 @@ static void p32x_reg_write8(u32 a, u32 d)
if (REG8IN16(r, a) == d)
return;
comreg = 1 << (a & 0x0f) / 2;
if (Pico32x.comm_dirty_68k & comreg)
p32x_sync_sh2s(cycles);
REG8IN16(r, a) = d;
p32x_sh2_poll_event(&sh2s[0], SH2_STATE_CPOLL, cycles);
p32x_sh2_poll_event(&sh2s[1], SH2_STATE_CPOLL, cycles);
Pico32x.comm_dirty_68k |= comreg;
comreg = 1 << (a & 0x0f) / 2;
Pico32x.comm_dirty |= comreg;
if (cycles - (int)msh2.m68krcycles_done > 120)
p32x_sync_sh2s(cycles);
@ -451,20 +448,13 @@ static void p32x_reg_write16(u32 a, u32 d)
int cycles = SekCyclesDone();
int comreg;
if (r[a / 2] == d)
return;
comreg = 1 << (a & 0x0f) / 2;
if (Pico32x.comm_dirty_68k & comreg)
p32x_sync_sh2s(cycles);
r[a / 2] = d;
p32x_sh2_poll_event(&sh2s[0], SH2_STATE_CPOLL, cycles);
p32x_sh2_poll_event(&sh2s[1], SH2_STATE_CPOLL, cycles);
Pico32x.comm_dirty_68k |= comreg;
if (cycles - (int)msh2.m68krcycles_done > 120)
p32x_sync_sh2s(cycles);
comreg = 1 << (a & 0x0f) / 2;
Pico32x.comm_dirty |= comreg;
return;
}
// PWM
@ -601,10 +591,6 @@ static u32 p32x_sh2reg_read16(u32 a, SH2 *sh2)
// comm port
if ((a & 0x30) == 0x20) {
int comreg = 1 << (a & 0x0f) / 2;
if (Pico32x.comm_dirty_68k & comreg)
Pico32x.comm_dirty_68k &= ~comreg;
else
sh2_poll_detect(sh2, a, SH2_STATE_CPOLL, 3);
sh2s_sync_on_read(sh2);
return r[a / 2];
@ -708,7 +694,7 @@ static void p32x_sh2reg_write8(u32 a, u32 d, SH2 *sh2)
p32x_sh2_poll_event(sh2->other_sh2, SH2_STATE_CPOLL,
sh2_cycles_done_m68k(sh2));
comreg = 1 << (a & 0x0f) / 2;
Pico32x.comm_dirty_sh2 |= comreg;
Pico32x.comm_dirty |= comreg;
return;
}
@ -733,7 +719,7 @@ static void p32x_sh2reg_write16(u32 a, u32 d, SH2 *sh2)
p32x_sh2_poll_event(sh2->other_sh2, SH2_STATE_CPOLL,
sh2_cycles_done_m68k(sh2));
comreg = 1 << (a & 0x0f) / 2;
Pico32x.comm_dirty_sh2 |= comreg;
Pico32x.comm_dirty |= comreg;
return;
}
// PWM

4
pico/pico_int.h
View file

@ -582,8 +582,8 @@ struct Pico32x
unsigned int dmac0_fifo_ptr;
unsigned short vdp_fbcr_fake;
unsigned short pad2;
unsigned char comm_dirty_68k;
unsigned char comm_dirty_sh2;
unsigned char comm_dirty;
unsigned char pad3; // was comm_dirty_sh2
unsigned char pwm_irq_cnt;
unsigned char pad1;
unsigned short pwm_p[2]; // pwm pos in fifo