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32x: drc: one manual page worth of opcodes implemented (x86 and arm)
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@827 be3aeb3a-fb24-0410-a615-afba39da0efa
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notaz
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5 changed files with 441 additions and 69 deletions
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@ -1,22 +1,46 @@
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/*
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* note about silly things like emith_eor_r_r_r_lsl:
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* these are here because the compiler was designed
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* for ARM as it's primary target.
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*/
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#include <stdarg.h>
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enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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#define CONTEXT_REG xBP
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#define IOP_JO 0x70
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#define IOP_JNO 0x71
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#define IOP_JB 0x72
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#define IOP_JAE 0x73
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#define IOP_JE 0x74
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#define IOP_JNE 0x75
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#define IOP_JBE 0x76
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#define IOP_JA 0x77
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#define IOP_JS 0x78
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#define IOP_JNS 0x79
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#define IOP_JL 0x7c
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#define IOP_JGE 0x7d
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#define IOP_JLE 0x7e
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#define IOP_JG 0x7f
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// unified conditions (we just use rel8 jump instructions for x86)
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#define DCOND_EQ IOP_JE
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#define DCOND_NE IOP_JNE
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#define DCOND_MI IOP_JS // MInus
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#define DCOND_PL IOP_JNS // PLus or zero
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#define DCOND_HI IOP_JA // higher (unsigned)
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#define DCOND_HS IOP_JAE // higher || same (unsigned)
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#define DCOND_LO IOP_JB // lower (unsigned)
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#define DCOND_LS IOP_JBE // lower || same (unsigned)
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#define DCOND_GE IOP_JGE // greater || equal (signed)
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#define DCOND_GT IOP_JG // greater (signed)
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#define DCOND_LE IOP_JLE // less || equal (signed)
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#define DCOND_LT IOP_JL // less (signed)
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#define DCOND_VS IOP_JO // oVerflow Set
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#define DCOND_VC IOP_JNO // oVerflow Clear
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#define DCOND_CS IOP_JB // Carry Set
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#define DCOND_CC IOP_JAE // Carry Clear
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#define EMIT_PTR(ptr, val, type) \
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*(type *)(ptr) = val
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@ -47,6 +71,7 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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EMIT_PTR(ptr, op, u8); \
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EMIT_PTR(ptr + 1, (tcache_ptr - (ptr+2)), u8)
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// _r_r
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#define emith_move_r_r(dst, src) \
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EMIT_OP_MODRM(0x8b, 3, dst, src)
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@ -56,11 +81,26 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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#define emith_sub_r_r(d, s) \
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EMIT_OP_MODRM(0x29, 3, s, d)
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#define emith_adc_r_r(d, s) \
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EMIT_OP_MODRM(0x11, 3, s, d)
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#define emith_sbc_r_r(d, s) \
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EMIT_OP_MODRM(0x19, 3, s, d) /* SBB */
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#define emith_or_r_r(d, s) \
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EMIT_OP_MODRM(0x09, 3, s, d)
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#define emith_and_r_r(d, s) \
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EMIT_OP_MODRM(0x21, 3, s, d)
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#define emith_eor_r_r(d, s) \
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EMIT_OP_MODRM(0x31, 3, s, d)
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EMIT_OP_MODRM(0x31, 3, s, d) /* XOR */
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#define emith_tst_r_r(d, s) \
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EMIT_OP_MODRM(0x85, 3, s, d) /* TEST */
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#define emith_cmp_r_r(d, s) \
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EMIT_OP_MODRM(0x39, 3, s, d)
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// fake teq - test equivalence - get_flags(d ^ s)
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#define emith_teq_r_r(d, s) { \
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@ -69,6 +109,27 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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emith_pop(d); \
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}
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// _r_r_r
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#define emith_eor_r_r_r(d, s1, s2) { \
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if (d != s1) \
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emith_move_r_r(d, s1); \
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emith_eor_r_r(d, s2); \
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}
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#define emith_or_r_r_r_lsl(d, s1, s2, lslimm) { \
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if (d != s2 && d != s1) { \
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emith_lsl(d, s2, lslimm); \
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emith_or_r_r(d, s1); \
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} else { \
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if (d != s1) \
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emith_move_r_r(d, s1); \
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emith_push(s2); \
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emith_lsl(s2, s2, lslimm); \
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emith_or_r_r(d, s2); \
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emith_pop(s2); \
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} \
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}
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// _r_imm
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#define emith_move_r_imm(r, imm) { \
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EMIT_OP(0xb8 + (r)); \
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@ -105,17 +166,22 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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// fake conditionals (using SJMP instead)
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#define emith_add_r_imm_c(cond, r, imm) { \
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(void)(cond); \
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emith_arith_r_imm(0, r, imm); \
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emith_add_r_imm(r, imm); \
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}
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#define emith_or_r_imm_c(cond, r, imm) { \
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(void)(cond); \
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emith_arith_r_imm(1, r, imm); \
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emith_or_r_imm(r, imm); \
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}
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#define emith_sub_r_imm_c(cond, r, imm) { \
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(void)(cond); \
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emith_arith_r_imm(5, r, imm); \
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emith_sub_r_imm(r, imm); \
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}
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#define emith_bic_r_imm_c(cond, r, imm) { \
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(void)(cond); \
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emith_bic_r_imm(r, imm); \
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}
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// shift
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@ -126,12 +192,15 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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EMIT(cnt, u8); \
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}
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#define emith_asr(d, s, cnt) \
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emith_shift(7, d, s, cnt)
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#define emith_lsl(d, s, cnt) \
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emith_shift(4, d, s, cnt)
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#define emith_lsr(d, s, cnt) \
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emith_shift(5, d, s, cnt)
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#define emith_asr(d, s, cnt) \
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emith_shift(7, d, s, cnt)
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// misc
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#define emith_push(r) \
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EMIT_OP(0x50 + (r))
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@ -155,11 +224,24 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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emith_asr(d, d, 32 - (bits)); \
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}
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// put bit0 of r0 to carry
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#define emith_set_carry(r0) { \
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emith_tst_r_imm(r0, 1); /* clears C */ \
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EMITH_SJMP_START(DCOND_EQ); \
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EMIT_OP(0xf9); /* STC */ \
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EMITH_SJMP_END(DCOND_EQ); \
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}
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// put bit0 of r0 to carry (for subtraction)
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#define emith_set_carry_sub emith_set_carry
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// XXX: stupid mess
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#define emith_mul(d, s1, s2) { \
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#define emith_mul_(op, dlo, dhi, s1, s2) { \
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int rmr; \
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if (d != xAX) \
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if (dlo != xAX && dhi != xAX) \
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emith_push(xAX); \
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if (dlo != xDX && dhi != xDX) \
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emith_push(xDX); \
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if ((s1) == xAX) \
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rmr = s2; \
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else if ((s2) == xAX) \
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@ -168,18 +250,39 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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emith_move_r_r(xAX, s1); \
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rmr = s2; \
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} \
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emith_push(xDX); \
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EMIT_OP_MODRM(0xf7, 3, 4, rmr); /* MUL rmr */ \
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emith_pop(xDX); \
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if (d != xAX) { \
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emith_move_r_r(d, xAX); \
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EMIT_OP_MODRM(0xf7, 3, op, rmr); /* xMUL rmr */ \
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/* XXX: using push/pop for the case of edx->eax; eax->edx */ \
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if (dhi != xDX && dhi != -1) \
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emith_push(xDX); \
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if (dlo != xAX) \
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emith_move_r_r(dlo, xAX); \
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if (dhi != xDX && dhi != -1) \
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emith_pop(dhi); \
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if (dlo != xDX && dhi != xDX) \
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emith_pop(xDX); \
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if (dlo != xAX && dhi != xAX) \
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emith_pop(xAX); \
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} \
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}
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#define emith_mul_u64(dlo, dhi, s1, s2) \
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emith_mul_(4, dlo, dhi, s1, s2) /* MUL */
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#define emith_mul_s64(dlo, dhi, s1, s2) \
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emith_mul_(5, dlo, dhi, s1, s2) /* IMUL */
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#define emith_mul(d, s1, s2) \
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emith_mul_(4, d, -1, s1, s2)
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// "flag" instructions are the same
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#define emith_subf_r_imm emith_sub_r_imm
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#define emith_addf_r_r emith_add_r_r
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#define emith_subf_r_r emith_sub_r_r
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#define emith_adcf_r_r emith_adc_r_r
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#define emith_sbcf_r_r emith_sbc_r_r
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#define emith_lslf emith_lsl
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#define emith_lsrf emith_lsr
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#define emith_asrf emith_asr
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// XXX: offs is 8bit only
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#define emith_ctx_read(r, offs) { \
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