mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
sh2 drc, add detection for in-memory polling
This commit is contained in:
kub
parent
213b7f42c1
commit
397ccdc6cf
9 changed files with 224 additions and 113 deletions
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@ -636,9 +636,13 @@ static inline void emith_pool_adjust(int pool_index, int move_offs)
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#define EMITH_SJMP3_MID(cond) EMITH_NOTHING1(cond)
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#define EMITH_SJMP3_END()
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#define emith_move_r_r_c(cond, d, s) \
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EOP_MOV_REG(cond,0,d,s,A_AM1_LSL,0)
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#define emith_move_r_r(d, s) \
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EOP_MOV_REG_SIMPLE(d, s)
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emith_move_r_r_c(A_COND_AL, d, s)
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#define emith_move_r_r_ptr_c(cond, d, s) \
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emith_move_r_r_c(cond, d, s)
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#define emith_move_r_r_ptr(d, s) \
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emith_move_r_r(d, s)
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@ -1116,11 +1120,16 @@ static inline void emith_pool_adjust(int pool_index, int move_offs)
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#define emith_ret_to_ctx(offs) \
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emith_ctx_write(LR, offs)
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#define emith_push_ret() \
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EOP_STMFD_SP(M1(LR))
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/* pushes r12 for eabi alignment */
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#define emith_push_ret(r) do { \
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int r_ = (r >= 0 ? r : 12); \
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EOP_STMFD_SP(M2(r_,LR)); \
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} while (0)
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#define emith_pop_and_ret() \
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EOP_LDMFD_SP(M1(PC))
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#define emith_pop_and_ret(r) do { \
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int r_ = (r >= 0 ? r : 12); \
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EOP_LDMFD_SP(M2(r_,PC)); \
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} while (0)
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#define host_instructions_updated(base, end) \
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cache_flush_d_inval_i(base, end)
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@ -381,21 +381,12 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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emith_arith_r_imm(4, r, ~(imm))
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// fake conditionals (using SJMP instead)
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#define emith_move_r_imm_c(cond, r, imm) do { \
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(void)(cond); \
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emith_move_r_imm(r, imm); \
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} while (0)
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#define emith_add_r_imm_c(cond, r, imm) do { \
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(void)(cond); \
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emith_add_r_imm(r, imm); \
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} while (0)
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#define emith_sub_r_imm_c(cond, r, imm) do { \
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(void)(cond); \
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emith_sub_r_imm(r, imm); \
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} while (0)
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#define emith_move_r_imm_c(cond, r, imm) \
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emith_move_r_imm(r, imm);
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#define emith_add_r_imm_c(cond, r, imm) \
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emith_add_r_imm(r, imm);
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#define emith_sub_r_imm_c(cond, r, imm) \
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emith_sub_r_imm(r, imm);
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#define emith_or_r_imm_c(cond, r, imm) \
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emith_or_r_imm(r, imm)
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#define emith_eor_r_imm_c(cond, r, imm) \
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@ -404,6 +395,8 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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emith_bic_r_imm(r, imm)
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#define emith_tst_r_imm_c(cond, r, imm) \
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emith_tst_r_imm(r, imm)
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#define emith_move_r_r_ptr_c(cond, d, s) \
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emith_move_r_r_ptr(d, s)
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#define emith_ror_c(cond, d, s, cnt) \
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emith_ror(d, s, cnt)
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#define emith_and_r_r_c(cond, d, s) \
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@ -819,12 +812,16 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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EMIT(offs, u32); \
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} while (0)
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#define emith_push_ret() \
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emith_push(xSI); /* to align */
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#define emith_push_ret(r) do { \
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int r_ = (r >= 0 ? r : xSI); \
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emith_push(r_); /* always push to align */ \
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} while (0)
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#define emith_pop_and_ret() \
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emith_pop(xSI); \
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emith_ret()
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#define emith_pop_and_ret(r) do { \
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int r_ = (r >= 0 ? r : xSI); \
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emith_pop(r_); \
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emith_ret(); \
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} while (0)
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#define EMITH_JMP_START(cond) { \
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u8 *cond_ptr; \
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@ -532,6 +532,9 @@ static void (*sh2_drc_test_irq)(void);
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static u32 REGPARM(1) (*sh2_drc_read8)(u32 a);
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static u32 REGPARM(1) (*sh2_drc_read16)(u32 a);
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static u32 REGPARM(1) (*sh2_drc_read32)(u32 a);
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static u32 REGPARM(1) (*sh2_drc_read8_poll)(u32 a);
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static u32 REGPARM(1) (*sh2_drc_read16_poll)(u32 a);
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static u32 REGPARM(1) (*sh2_drc_read32_poll)(u32 a);
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static void REGPARM(2) (*sh2_drc_write8)(u32 a, u32 d);
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static void REGPARM(2) (*sh2_drc_write16)(u32 a, u32 d);
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static void REGPARM(2) (*sh2_drc_write32)(u32 a, u32 d);
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@ -540,6 +543,7 @@ static void REGPARM(2) (*sh2_drc_write32)(u32 a, u32 d);
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#define MF_SIZEMASK 0x03 // size of access
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#define MF_POSTINCR 0x10 // post increment (for read_rr)
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#define MF_PREDECR MF_POSTINCR // pre decrement (for write_rr)
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#define MF_POLLING 0x20 // include polling check in read
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// address space stuff
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static int dr_is_rom(u32 a)
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@ -2263,11 +2267,18 @@ static int emit_memhandler_read(int size)
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rcache_evict_vreg(guest_regs[SHR_SR].vreg);
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#endif
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switch (size & MF_SIZEMASK) {
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case 0: emith_call(sh2_drc_read8); break; // 8
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case 1: emith_call(sh2_drc_read16); break; // 16
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case 2: emith_call(sh2_drc_read32); break; // 32
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}
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if (size & MF_POLLING)
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switch (size & MF_SIZEMASK) {
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case 0: emith_call(sh2_drc_read8_poll); break; // 8
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case 1: emith_call(sh2_drc_read16_poll); break; // 16
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case 2: emith_call(sh2_drc_read32_poll); break; // 32
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}
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else
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switch (size & MF_SIZEMASK) {
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case 0: emith_call(sh2_drc_read8); break; // 8
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case 1: emith_call(sh2_drc_read16); break; // 16
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case 2: emith_call(sh2_drc_read32); break; // 32
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}
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rcache_invalidate_tmp();
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return rcache_get_tmp_ret();
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@ -2545,6 +2556,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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struct drcf {
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int delay_reg:8;
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u32 loop_type:8;
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u32 polling:8;
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u32 test_irq:1;
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u32 pending_branch_direct:1;
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u32 pending_branch_indirect:1;
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@ -2769,6 +2781,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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#if LOOP_DETECTION
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drcf.loop_type = op_flags[i] & OF_LOOP;
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drcf.delay_reg = -1;
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drcf.polling = (drcf.loop_type == OF_POLL_LOOP ? MF_POLLING : 0);
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#endif
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// must update PC
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@ -3176,7 +3189,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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case 0x0c: // MOV.B @(R0,Rm),Rn 0000nnnnmmmm1100
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case 0x0d: // MOV.W @(R0,Rm),Rn 0000nnnnmmmm1101
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case 0x0e: // MOV.L @(R0,Rm),Rn 0000nnnnmmmm1110
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emit_indirect_indexed_read(sh2, GET_Rn(), SHR_R0, GET_Rm(), op & 3);
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emit_indirect_indexed_read(sh2, GET_Rn(), SHR_R0, GET_Rm(), (op & 3) | drcf.polling);
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goto end_op;
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case 0x0f: // MAC.L @Rm+,@Rn+ 0000nnnnmmmm1111
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emit_indirect_read_double(sh2, &tmp, &tmp2, GET_Rn(), GET_Rm(), 2);
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@ -3700,7 +3713,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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/////////////////////////////////////////////
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case 0x05: // MOV.L @(disp,Rm),Rn 0101nnnnmmmmdddd
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emit_memhandler_read_rr(sh2, GET_Rn(), GET_Rm(), (op & 0x0f) * 4, 2);
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emit_memhandler_read_rr(sh2, GET_Rn(), GET_Rm(), (op & 0x0f) * 4, 2 | drcf.polling);
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goto end_op;
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/////////////////////////////////////////////
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@ -3713,7 +3726,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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case 0x04: // MOV.B @Rm+,Rn 0110nnnnmmmm0100
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case 0x05: // MOV.W @Rm+,Rn 0110nnnnmmmm0101
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case 0x06: // MOV.L @Rm+,Rn 0110nnnnmmmm0110
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tmp = ((op & 7) >= 4 && GET_Rn() != GET_Rm()) ? MF_POSTINCR : 0;
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tmp = ((op & 7) >= 4 && GET_Rn() != GET_Rm()) ? MF_POSTINCR : drcf.polling;
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emit_memhandler_read_rr(sh2, GET_Rn(), GET_Rm(), 0, (op & 3) | tmp);
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goto end_op;
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case 0x03: // MOV Rm,Rn 0110nnnnmmmm0011
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@ -3791,7 +3804,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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case 0x0400: // MOV.B @(disp,Rm),R0 10000100mmmmdddd
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case 0x0500: // MOV.W @(disp,Rm),R0 10000101mmmmdddd
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tmp = (op & 0x100) >> 8;
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emit_memhandler_read_rr(sh2, SHR_R0, GET_Rm(), (op & 0x0f) << tmp, tmp);
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emit_memhandler_read_rr(sh2, SHR_R0, GET_Rm(), (op & 0x0f) << tmp, tmp | drcf.polling);
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goto end_op;
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case 0x0800: // CMP/EQ #imm,R0 10001000iiiiiiii
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tmp2 = rcache_get_reg(SHR_R0, RC_GR_READ, NULL);
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@ -3817,7 +3830,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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case 0x0500: // MOV.W @(disp,GBR),R0 11000101dddddddd
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case 0x0600: // MOV.L @(disp,GBR),R0 11000110dddddddd
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tmp = (op & 0x300) >> 8;
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emit_memhandler_read_rr(sh2, SHR_R0, SHR_GBR, (op & 0xff) << tmp, tmp);
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emit_memhandler_read_rr(sh2, SHR_R0, SHR_GBR, (op & 0xff) << tmp, tmp | drcf.polling);
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goto end_op;
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case 0x0800: // TST #imm,R0 11001000iiiiiiii
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tmp = rcache_get_reg(SHR_R0, RC_GR_READ, NULL);
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@ -3843,7 +3856,7 @@ static void REGPARM(2) *sh2_translate(SH2 *sh2, int tcache_id)
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}
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goto end_op;
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case 0x0c00: // TST.B #imm,@(R0,GBR) 11001100iiiiiiii
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tmp = emit_indirect_indexed_read(sh2, SHR_TMP, SHR_R0, SHR_GBR, 0);
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tmp = emit_indirect_indexed_read(sh2, SHR_TMP, SHR_R0, SHR_GBR, 0 | drcf.polling);
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sr = rcache_get_reg(SHR_SR, RC_GR_RMW, NULL);
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emith_bic_r_imm(sr, T);
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emith_tst_r_imm(tmp, op & 0xff);
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@ -4149,6 +4162,56 @@ static void sh2_generate_utils(void)
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emith_jump_reg(arg2);
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emith_flush();
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// d = sh2_drc_read8_poll(u32 a)
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sh2_drc_read8_poll = (void *)tcache_ptr;
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emith_ctx_read_ptr(arg1, offsetof(SH2, read8_map));
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emith_sh2_rcall(arg0, arg1, arg2, arg3);
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EMITH_SJMP_START(DCOND_CC);
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emith_move_r_r_ptr_c(DCOND_CS, arg1, CONTEXT_REG);
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emith_jump_reg_c(DCOND_CS, arg2);
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EMITH_SJMP_END(DCOND_CC);
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emith_and_r_r_r(arg1, arg0, arg3);
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emith_eor_r_imm(arg1, 1);
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emith_read8s_r_r_r(arg1, arg1, arg2);
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emith_push_ret(arg1);
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emith_move_r_r_ptr(arg1, CONTEXT_REG);
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emith_call(p32x_sh2_poll_memory);
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emith_pop_and_ret(RET_REG);
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emith_flush();
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// d = sh2_drc_read16_poll(u32 a)
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sh2_drc_read16_poll = (void *)tcache_ptr;
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emith_ctx_read_ptr(arg1, offsetof(SH2, read16_map));
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emith_sh2_rcall(arg0, arg1, arg2, arg3);
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EMITH_SJMP_START(DCOND_CC);
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emith_move_r_r_ptr_c(DCOND_CS, arg1, CONTEXT_REG);
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emith_jump_reg_c(DCOND_CS, arg2);
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EMITH_SJMP_END(DCOND_CC);
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emith_and_r_r_r(arg1, arg0, arg3);
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emith_read16s_r_r_r(arg1, arg1, arg2);
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emith_push_ret(arg1);
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emith_move_r_r_ptr(arg1, CONTEXT_REG);
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emith_call(p32x_sh2_poll_memory);
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emith_pop_and_ret(RET_REG);
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emith_flush();
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// d = sh2_drc_read32_poll(u32 a)
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sh2_drc_read32_poll = (void *)tcache_ptr;
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emith_ctx_read_ptr(arg1, offsetof(SH2, read32_map));
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emith_sh2_rcall(arg0, arg1, arg2, arg3);
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EMITH_SJMP_START(DCOND_CC);
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emith_move_r_r_ptr_c(DCOND_CS, arg1, CONTEXT_REG);
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emith_jump_reg_c(DCOND_CS, arg2);
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EMITH_SJMP_END(DCOND_CC);
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emith_and_r_r_r(arg1, arg0, arg3);
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emith_read_r_r_r(arg1, arg1, arg2);
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emith_ror(arg1, arg1, 16);
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emith_push_ret(arg1);
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emith_move_r_r_ptr(arg1, CONTEXT_REG);
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emith_call(p32x_sh2_poll_memory);
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emith_pop_and_ret(RET_REG);
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emith_flush();
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// sh2_drc_exit(void)
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sh2_drc_exit = (void *)tcache_ptr;
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emit_do_static_regs(1, arg2);
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@ -4289,6 +4352,9 @@ static void sh2_generate_utils(void)
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MAKE_WRITE_WRAPPER(sh2_drc_write8);
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MAKE_WRITE_WRAPPER(sh2_drc_write16);
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MAKE_WRITE_WRAPPER(sh2_drc_write32);
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MAKE_READ_WRAPPER(sh2_drc_read8_poll);
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MAKE_READ_WRAPPER(sh2_drc_read16_poll);
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MAKE_READ_WRAPPER(sh2_drc_read32_poll);
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#endif
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emith_pool_commit(0);
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@ -4304,6 +4370,9 @@ static void sh2_generate_utils(void)
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host_dasm_new_symbol(sh2_drc_read8);
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host_dasm_new_symbol(sh2_drc_read16);
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host_dasm_new_symbol(sh2_drc_read32);
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host_dasm_new_symbol(sh2_drc_read8_poll);
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host_dasm_new_symbol(sh2_drc_read16_poll);
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host_dasm_new_symbol(sh2_drc_read32_poll);
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#endif
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}
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@ -5396,11 +5465,13 @@ u16 scan_block(u32 base_pc, int is_slave, u8 *op_flags, u32 *end_pc_out,
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opd->source = BITMASK2(GET_Rm(), SHR_MEM);
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opd->dest = BITMASK1(SHR_R0);
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opd->imm = (op & 0x0f);
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op_flags[i] |= OF_POLL_INSN;
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break;
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case 0x0500: // MOV.W @(disp,Rm),R0 10000101mmmmdddd
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opd->source = BITMASK2(GET_Rm(), SHR_MEM);
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opd->dest = BITMASK1(SHR_R0);
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opd->imm = (op & 0x0f) * 2;
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op_flags[i] |= OF_POLL_INSN;
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break;
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case 0x0800: // CMP/EQ #imm,R0 10001000iiiiiiii
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opd->source = BITMASK1(SHR_R0);
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@ -5539,6 +5610,7 @@ u16 scan_block(u32 base_pc, int is_slave, u8 *op_flags, u32 *end_pc_out,
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opd->source = BITMASK3(SHR_GBR, SHR_R0, SHR_MEM);
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opd->dest = BITMASK1(SHR_T);
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opd->imm = op & 0xff;
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op_flags[i] |= OF_POLL_INSN;
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opd->cycles = 3;
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break;
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case 0x0d00: // AND.B #imm,@(R0,GBR) 11001101iiiiiiii
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@ -42,9 +42,10 @@ typedef struct SH2_
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unsigned int pdb_io_csum[2];
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#define SH2_STATE_RUN (1 << 0) // to prevent recursion
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#define SH2_STATE_SLEEP (1 << 1)
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#define SH2_STATE_SLEEP (1 << 1) // temporarily stopped (DMA, IO, ...)
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#define SH2_STATE_CPOLL (1 << 2) // polling comm regs
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#define SH2_STATE_VPOLL (1 << 3) // polling VDP
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#define SH2_STATE_RPOLL (1 << 4) // polling address in SDRAM
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unsigned int state;
|
||||
unsigned int poll_addr;
|
||||
int poll_cycles;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue