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FAME integration finished, some adjustments of CPU core stuff
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@278 be3aeb3a-fb24-0410-a615-afba39da0efa
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notaz
parent
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commit
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18 changed files with 398 additions and 8706 deletions
98
Pico/Sek.c
98
Pico/Sek.c
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@ -18,15 +18,15 @@ unsigned int SekCycleCntT=0;
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/* context */
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// Cyclone 68000
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#ifdef EMU_C68K
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struct Cyclone PicoCpu;
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struct Cyclone PicoCpuCM68k;
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#endif
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// MUSASHI 68000
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#ifdef EMU_M68K
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m68ki_cpu_core PicoM68kCPU;
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m68ki_cpu_core PicoCpuMM68k;
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#endif
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// FAME 68000
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#ifdef EMU_F68K
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M68K_CONTEXT PicoCpuM68k;
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M68K_CONTEXT PicoCpuFM68k;
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#endif
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@ -38,7 +38,7 @@ static int SekIntAck(int level)
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// try to emulate VDP's reaction to 68000 int ack
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if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }
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else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }
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PicoCpu.irq = 0;
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PicoCpuCM68k.irq = 0;
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return CYCLONE_INT_ACK_AUTOVECTOR;
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}
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@ -51,12 +51,12 @@ static int SekUnrecognizedOpcode()
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{
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unsigned int pc, op;
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pc = SekPc;
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op = PicoCpu.read16(pc);
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op = PicoCpuCM68k.read16(pc);
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elprintf(EL_ANOMALY, "Unrecognized Opcode %04x @ %06x", op, pc);
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// see if we are not executing trash
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if (pc < 0x200 || (pc > Pico.romsize+4 && (pc&0xe00000)!=0xe00000)) {
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PicoCpu.cycles = 0;
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PicoCpu.state_flags |= 1;
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PicoCpuCM68k.cycles = 0;
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PicoCpuCM68k.state_flags |= 1;
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return 1;
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}
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#ifdef EMU_M68K // debugging cyclone
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@ -87,31 +87,11 @@ static int SekTasCallback(void)
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#ifdef EMU_F68K
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static void setup_fame_fetchmap(void)
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{
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int i;
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// be default, point everything to fitst 64k of ROM
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for (i = 0; i < M68K_FETCHBANK1; i++)
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PicoCpuM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
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// now real ROM
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for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
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PicoCpuM68k.Fetch[i] = (unsigned int)Pico.rom;
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elprintf(EL_ANOMALY, "ROM end @ #%i %06x", i, (i<<(24-FAMEC_FETCHBITS)));
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// .. and RAM (TODO)
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for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
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PicoCpuM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
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elprintf(EL_ANOMALY, "rom = %p, ram = %p", Pico.rom, Pico.ram);
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for (i = 0; i < M68K_FETCHBANK1; i++)
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elprintf(EL_ANOMALY, "Fetch[%i] = %p", i, PicoCpuM68k.Fetch[i]);
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}
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void SekIntAckF68K(unsigned level)
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static void SekIntAckF68K(unsigned level)
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{
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if (level == 4) { Pico.video.pending_ints = 0; elprintf(EL_INTS, "hack: @ %06x [%i]", SekPc, SekCycleCnt); }
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else if(level == 6) { Pico.video.pending_ints &= ~0x20; elprintf(EL_INTS, "vack: @ %06x [%i]", SekPc, SekCycleCnt); }
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PicoCpuM68k.interrupts[0] = 0;
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PicoCpuFM68k.interrupts[0] = 0;
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}
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#endif
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@ -120,15 +100,15 @@ PICO_INTERNAL int SekInit()
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{
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#ifdef EMU_C68K
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CycloneInit();
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memset(&PicoCpu,0,sizeof(PicoCpu));
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PicoCpu.IrqCallback=SekIntAck;
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PicoCpu.ResetCallback=SekResetAck;
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PicoCpu.UnrecognizedCallback=SekUnrecognizedOpcode;
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memset(&PicoCpuCM68k,0,sizeof(PicoCpuCM68k));
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PicoCpuCM68k.IrqCallback=SekIntAck;
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PicoCpuCM68k.ResetCallback=SekResetAck;
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PicoCpuCM68k.UnrecognizedCallback=SekUnrecognizedOpcode;
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#endif
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#ifdef EMU_M68K
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{
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void *oldcontext = m68ki_cpu_p;
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m68k_set_context(&PicoM68kCPU);
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m68k_set_context(&PicoCpuMM68k);
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m68k_set_cpu_type(M68K_CPU_TYPE_68000);
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m68k_init();
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m68k_set_int_ack_callback(SekIntAckM68K);
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@ -140,10 +120,10 @@ PICO_INTERNAL int SekInit()
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#ifdef EMU_F68K
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{
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void *oldcontext = g_m68kcontext;
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g_m68kcontext = &PicoCpuM68k;
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memset(&PicoCpuM68k, 0, sizeof(PicoCpuM68k));
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g_m68kcontext = &PicoCpuFM68k;
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memset(&PicoCpuFM68k, 0, sizeof(PicoCpuFM68k));
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m68k_init();
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PicoCpuM68k.iack_handler = SekIntAckF68K;
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PicoCpuFM68k.iack_handler = SekIntAckF68K;
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g_m68kcontext = oldcontext;
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}
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#endif
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@ -158,28 +138,25 @@ PICO_INTERNAL int SekReset()
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if (Pico.rom==NULL) return 1;
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#ifdef EMU_C68K
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PicoCpu.state_flags=0;
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PicoCpu.osp=0;
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PicoCpu.srh =0x27; // Supervisor mode
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PicoCpu.flags=4; // Z set
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PicoCpu.irq=0;
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PicoCpu.a[7]=PicoCpu.read32(0); // Stack Pointer
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PicoCpu.membase=0;
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PicoCpu.pc=PicoCpu.checkpc(PicoCpu.read32(4)); // Program Counter
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PicoCpuCM68k.state_flags=0;
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PicoCpuCM68k.osp=0;
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PicoCpuCM68k.srh =0x27; // Supervisor mode
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PicoCpuCM68k.flags=4; // Z set
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PicoCpuCM68k.irq=0;
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PicoCpuCM68k.a[7]=PicoCpuCM68k.read32(0); // Stack Pointer
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PicoCpuCM68k.membase=0;
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PicoCpuCM68k.pc=PicoCpuCM68k.checkpc(PicoCpuCM68k.read32(4)); // Program Counter
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#endif
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#ifdef EMU_M68K
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m68k_set_context(&PicoM68kCPU); // if we ever reset m68k, we always need it's context to be set
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m68k_set_context(&PicoCpuMM68k); // if we ever reset m68k, we always need it's context to be set
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m68ki_cpu.sp[0]=0;
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m68k_set_irq(0);
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m68k_pulse_reset();
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#endif
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#ifdef EMU_F68K
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{
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unsigned ret;
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g_m68kcontext = &PicoCpuM68k;
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setup_fame_fetchmap();
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ret = m68k_reset();
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/*if (ret)*/ elprintf(EL_ANOMALY, "m68k_reset returned %u", ret);
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g_m68kcontext = &PicoCpuFM68k;
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m68k_reset();
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}
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#endif
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@ -197,33 +174,34 @@ PICO_INTERNAL int SekInterrupt(int irq)
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}
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#endif
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#ifdef EMU_C68K
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PicoCpu.irq=irq;
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PicoCpuCM68k.irq=irq;
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#endif
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#ifdef EMU_M68K
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{
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void *oldcontext = m68ki_cpu_p;
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m68k_set_context(&PicoM68kCPU);
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m68k_set_context(&PicoCpuMM68k);
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m68k_set_irq(irq); // raise irq (gets lowered after taken or must be done in ack)
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m68k_set_context(oldcontext);
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}
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#endif
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#ifdef EMU_F68K
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PicoCpuM68k.interrupts[0]=irq;
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PicoCpuFM68k.interrupts[0]=irq;
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#endif
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return 0;
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}
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PICO_INTERNAL void SekState(unsigned char *data)
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// data must be word aligned
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PICO_INTERNAL void SekState(int *data)
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{
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#ifdef EMU_C68K
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memcpy(data,PicoCpu.d,0x44);
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memcpy32(data,PicoCpuCM68k.d,0x44/4);
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#elif defined(EMU_M68K)
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memcpy(data, PicoM68kCPU.dar, 0x40);
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*(int *)(data+0x40) = PicoM68kCPU.pc;
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memcpy32(data, PicoCpuMM68k.dar, 0x40/4);
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data[0x10] = PicoCpuMM68k.pc;
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#elif defined(EMU_F68K)
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memcpy(data, PicoCpuM68k.dreg, 0x40);
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*(int *)(data+0x40) = PicoCpuM68k.pc;
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memcpy32(data, (int *)PicoCpuFM68k.dreg, 0x40/4);
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data[0x10] = PicoCpuFM68k.pc;
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#endif
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}
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