32x: split sh2 code, compiler stub

git-svn-id: file:///home/notaz/opt/svn/PicoDrive@810 be3aeb3a-fb24-0410-a615-afba39da0efa

cpu/sh2/compiler.c

@@ -0,0 +1,10 @@
+#include "../sh2.h"
+
+void sh2_execute(SH2 *sh2, int cycles)
+{
+  unsigned int pc = sh2->pc;
+  int op;
+
+  op = p32x_sh2_read16(pc);
+}
+

cpu/sh2/mame/sh2pico.c

@@ -0,0 +1,98 @@
+#include "../sh2.h"
+
+// MAME types
+typedef signed char  INT8;
+typedef signed short INT16;
+typedef signed int   INT32;
+typedef unsigned int   UINT32;
+typedef unsigned short UINT16;
+typedef unsigned char  UINT8;
+
+#define RB(a) p32x_sh2_read8(a,sh2->is_slave)
+#define RW(a) p32x_sh2_read16(a,sh2->is_slave)
+#define RL(a) p32x_sh2_read32(a,sh2->is_slave)
+#define WB(a,d) p32x_sh2_write8(a,d,sh2->is_slave)
+#define WW(a,d) p32x_sh2_write16(a,d,sh2->is_slave)
+#define WL(a,d) p32x_sh2_write32(a,d,sh2->is_slave)
+
+// some stuff from sh2comn.h
+#define T	0x00000001
+#define S	0x00000002
+#define I	0x000000f0
+#define Q	0x00000100
+#define M	0x00000200
+
+#define AM	0xc7ffffff
+
+#define FLAGS	(M|Q|I|S|T)
+
+#define Rn	((opcode>>8)&15)
+#define Rm	((opcode>>4)&15)
+
+#define sh2_icount sh2->icount
+
+#include "sh2.c"
+
+void sh2_execute(SH2 *sh2_, int cycles)
+{
+	sh2 = sh2_;
+	sh2->cycles_aim += cycles;
+	sh2->icount = cycles = sh2->cycles_aim - sh2->cycles_done;
+
+	if (sh2->icount <= 0)
+		return;
+
+	do
+	{
+		UINT32 opcode;
+
+		if (sh2->delay)
+		{
+			sh2->ppc = sh2->delay;
+			opcode = RW(sh2->delay);
+			sh2->pc -= 2;
+		}
+		else
+		{
+			sh2->ppc = sh2->pc;
+			opcode = RW(sh2->pc);
+		}
+
+		sh2->delay = 0;
+		sh2->pc += 2;
+
+		switch (opcode & ( 15 << 12))
+		{
+		case  0<<12: op0000(opcode); break;
+		case  1<<12: op0001(opcode); break;
+		case  2<<12: op0010(opcode); break;
+		case  3<<12: op0011(opcode); break;
+		case  4<<12: op0100(opcode); break;
+		case  5<<12: op0101(opcode); break;
+		case  6<<12: op0110(opcode); break;
+		case  7<<12: op0111(opcode); break;
+		case  8<<12: op1000(opcode); break;
+		case  9<<12: op1001(opcode); break;
+		case 10<<12: op1010(opcode); break;
+		case 11<<12: op1011(opcode); break;
+		case 12<<12: op1100(opcode); break;
+		case 13<<12: op1101(opcode); break;
+		case 14<<12: op1110(opcode); break;
+		default: op1111(opcode); break;
+		}
+
+		if (sh2->test_irq && !sh2->delay)
+		{
+			if (sh2->pending_irl > sh2->pending_int_irq)
+				sh2_irl_irq(sh2, sh2->pending_irl);
+			else
+				sh2_internal_irq(sh2, sh2->pending_int_irq, sh2->pending_int_vector);
+			sh2->test_irq = 0;
+		}
+		sh2->icount--;
+	}
+	while (sh2->icount > 0 || sh2->delay);	/* can't interrupt before delay */
+
+	sh2->cycles_done += cycles - sh2->icount;
+}
+

cpu/sh2/sh2.c

@@ -0,0 +1,60 @@
+#include <string.h>
+#include "sh2.h"
+
+#define I 0xf0
+
+void sh2_init(SH2 *sh2, int is_slave)
+{
+	memset(sh2, 0, sizeof(*sh2));
+	sh2->is_slave = is_slave;
+}
+
+void sh2_reset(SH2 *sh2)
+{
+	sh2->pc = p32x_sh2_read32(0, sh2->is_slave);
+	sh2->r[15] = p32x_sh2_read32(4, sh2->is_slave);
+	sh2->sr = I;
+	sh2->vbr = 0;
+	sh2->pending_int_irq = 0;
+}
+
+static void sh2_do_irq(SH2 *sh2, int level, int vector)
+{
+	sh2->irq_callback(sh2->is_slave, level);
+
+	sh2->r[15] -= 4;
+	p32x_sh2_write32(sh2->r[15], sh2->sr, sh2->is_slave);	/* push SR onto stack */
+	sh2->r[15] -= 4;
+	p32x_sh2_write32(sh2->r[15], sh2->pc, sh2->is_slave);	/* push PC onto stack */
+
+	/* set I flags in SR */
+	sh2->sr = (sh2->sr & ~I) | (level << 4);
+
+	/* fetch PC */
+	sh2->pc = p32x_sh2_read32(sh2->vbr + vector * 4, sh2->is_slave);
+
+	/* 13 cycles at best */
+	sh2->cycles_done += 13;
+//	sh2->icount -= 13;
+}
+
+void sh2_irl_irq(SH2 *sh2, int level)
+{
+	sh2->pending_irl = level;
+	if (level <= ((sh2->sr >> 4) & 0x0f))
+		return;
+
+	sh2_do_irq(sh2, level, 64 + level/2);
+}
+
+void sh2_internal_irq(SH2 *sh2, int level, int vector)
+{
+	sh2->pending_int_irq = level;
+	sh2->pending_int_vector = vector;
+	if (level <= ((sh2->sr >> 4) & 0x0f))
+		return;
+
+	sh2_do_irq(sh2, level, vector);
+	sh2->pending_int_irq = 0; // auto-clear
+}
+

cpu/sh2/sh2.h

@@ -0,0 +1,48 @@
+#ifndef __SH2_H__
+#define __SH2_H__
+
+// pico memhandlers
+// XXX: move somewhere else
+unsigned int p32x_sh2_read8(unsigned int a, int id);
+unsigned int p32x_sh2_read16(unsigned int a, int id);
+unsigned int p32x_sh2_read32(unsigned int a, int id);
+void p32x_sh2_write8(unsigned int a, unsigned int d, int id);
+void p32x_sh2_write16(unsigned int a, unsigned int d, int id);
+void p32x_sh2_write32(unsigned int a, unsigned int d, int id);
+
+
+typedef struct
+{
+	unsigned int	r[16];
+	unsigned int	ppc;
+	unsigned int	pc;
+	unsigned int	pr;
+	unsigned int	sr;
+	unsigned int	gbr, vbr;
+	unsigned int	mach, macl;
+
+	unsigned int	ea;
+	unsigned int	delay;
+	unsigned int	test_irq;
+
+	int	pending_irl;
+	int	pending_int_irq;	// internal irq
+	int	pending_int_vector;
+	void	(*irq_callback)(int id, int level);
+	int	is_slave;
+
+	int		icount;		// cycles left in current timeslice
+	unsigned int	cycles_aim;	// subtract sh2_icount to get global counter
+	unsigned int	cycles_done;
+} SH2;
+
+extern SH2 *sh2; // active sh2
+
+void sh2_init(SH2 *sh2, int is_slave);
+void sh2_reset(SH2 *sh2);
+void sh2_irl_irq(SH2 *sh2, int level);
+void sh2_internal_irq(SH2 *sh2, int level, int vector);
+
+void sh2_execute(SH2 *sh2, int cycles);
+
+#endif /* __SH2_H__ */