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32x, improve cartridge mapping, BIOS replication

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This commit is contained in:
kub 2021-11-28 22:02:11 +01:00
parent 44e4bf2b0f
commit 439cf7f850
2 changed files with 10 additions and 9 deletions
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12
pico/32x/32x.c
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@ -145,13 +145,13 @@ void p32x_reset_sh2s(void)
idl_src = CPU_BE2(*(u32 *)(Pico.rom + 0x3d4)) & ~0xf0000000; idl_src = CPU_BE2(*(u32 *)(Pico.rom + 0x3d4)) & ~0xf0000000;
idl_dst = CPU_BE2(*(u32 *)(Pico.rom + 0x3d8)) & ~0xf0000000; idl_dst = CPU_BE2(*(u32 *)(Pico.rom + 0x3d8)) & ~0xf0000000;
idl_size= CPU_BE2(*(u32 *)(Pico.rom + 0x3dc)); idl_size= CPU_BE2(*(u32 *)(Pico.rom + 0x3dc));
if (idl_size > Pico.romsize || idl_src + idl_size > Pico.romsize || // copy in guest memory space
idl_size > 0x40000 || idl_dst + idl_size > 0x40000 || (idl_src & 3) || (idl_dst & 3)) { idl_src += 0x2000000;
elprintf(EL_STATUS|EL_ANOMALY, "32x: invalid initial data ptrs: %06x -> %06x, %06x", idl_dst += 0x6000000;
idl_src, idl_dst, idl_size); while (idl_size >= 4) {
p32x_sh2_write32(idl_dst, p32x_sh2_read32(idl_src, &msh2), &msh2);
idl_src += 4, idl_dst += 4, idl_size -= 4;
} }
else
memcpy(Pico32xMem->sdram + idl_dst, Pico.rom + idl_src, idl_size);
// VBR // VBR
vbr = CPU_BE2(*(u32 *)(Pico.rom + 0x3e8)); vbr = CPU_BE2(*(u32 *)(Pico.rom + 0x3e8));

7
pico/32x/memory.c
View file

@ -2382,9 +2382,10 @@ void PicoMemSetup32x(void)
msh2_write32_map[0x00/2] = msh2_write32_map[0x20/2] = sh2_write32_cs0; msh2_write32_map[0x00/2] = msh2_write32_map[0x20/2] = sh2_write32_cs0;
// CS1 - ROM // CS1 - ROM
bank_switch_rom_sh2(); bank_switch_rom_sh2();
msh2_read8_map[0x02/2].mask = msh2_read8_map[0x22/2].mask = 0x3fffff; // FIXME for (rs = 0x8000; rs < Pico.romsize && rs < 0x400000; rs *= 2) ;
msh2_read16_map[0x02/2].mask = msh2_read16_map[0x22/2].mask = 0x3ffffe; // FIXME msh2_read8_map[0x02/2].mask = msh2_read8_map[0x22/2].mask = rs-1;
msh2_read32_map[0x02/2].mask = msh2_read32_map[0x22/2].mask = 0x3ffffc; // FIXME msh2_read16_map[0x02/2].mask = msh2_read16_map[0x22/2].mask = rs-1;
msh2_read32_map[0x02/2].mask = msh2_read32_map[0x22/2].mask = rs-1;
msh2_write16_map[0x02/2] = msh2_write16_map[0x22/2] = sh2_write16_rom; msh2_write16_map[0x02/2] = msh2_write16_map[0x22/2] = sh2_write16_rom;
msh2_write32_map[0x02/2] = msh2_write32_map[0x22/2] = sh2_write32_rom; msh2_write32_map[0x02/2] = msh2_write32_map[0x22/2] = sh2_write32_rom;
// CS2 - DRAM // CS2 - DRAM