mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
updated Cyclone not to use r9
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@417 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz
parent
651b1a25c2
commit
449ecf9257
8 changed files with 304 additions and 280 deletions
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@ -3,7 +3,7 @@
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static FILE *AsmFile=NULL;
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static int CycloneVer=0x0088; // Version number of library
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static int CycloneVer=0x0099; // Version number of library
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int *CyJump=NULL; // Jump table
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int ms=USE_MS_SYNTAX; // If non-zero, output in Microsoft ARMASM format
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char *Narm[4]={ "b", "h","",""}; // Normal ARM Extensions for operand sizes 0,1,2
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@ -87,10 +87,10 @@ static void AddressErrorWrapper(char rw, char *dataprg, int iw)
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{
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ot("ExceptionAddressError_%c_%s%s\n", rw, dataprg, ms?"":":");
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ot(" ldr r1,[r7,#0x44]\n");
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ot(" mov r10,#0x%02x\n", iw);
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ot(" mov r6,#0x%02x\n", iw);
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ot(" mov r11,r0\n");
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ot(" tst r1,#0x20\n");
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ot(" orrne r10,r10,#4\n");
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ot(" orrne r6,r6,#4\n");
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ot(" b ExceptionAddressError\n");
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ot("\n");
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}
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@ -119,18 +119,19 @@ static void PrintFramework()
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if (ms) ot("CycloneRun\n");
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else ot("CycloneRun:\n");
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ot(" stmdb sp!,{r4-r11,lr}\n");
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ot(" stmdb sp!,{r4-r8,r10,r11,lr}\n");
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ot(" mov r7,r0 ;@ r7 = Pointer to Cpu Context\n");
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ot(" ;@ r0-3 = Temporary registers\n");
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ot(" ldrb r9,[r7,#0x46] ;@ r9 = Flags (NZCV)\n");
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ot(" ldrb r10,[r7,#0x46] ;@ r10 = Flags (NZCV)\n");
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ot(" ldr r6,=CycloneJumpTab ;@ r6 = Opcode Jump table\n");
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ot(" ldr r5,[r7,#0x5c] ;@ r5 = Cycles\n");
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ot(" ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base\n");
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ot(" ;@ r8 = Current Opcode\n");
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ot(" ldr r1,[r7,#0x44] ;@ Get SR high T_S__III and irq level\n");
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ot(" mov r9,r9,lsl #28 ;@ r9 = Flags 0xf0000000, cpsr format\n");
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ot(" ;@ r10 = Source value / Memory Base\n");
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ot(" mov r10,r10,lsl #28;@ r10 = Flags 0xf0000000, cpsr format\n");
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ot(" ;@ r11 = Source value / Memory Base\n");
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ot(" str r6,[r7,#0x54] ;@ make a copy to avoid literal pools\n");
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ot("\n");
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#if (CYCLONE_FOR_GENESIS == 2) || EMULATE_TRACE
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ot(" mov r2,#0\n");
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@ -160,7 +161,7 @@ static void PrintFramework()
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ot(";@ stopped or halted\n");
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ot(" mov r5,#0\n");
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ot(" str r5,[r7,#0x5C] ;@ eat all cycles\n");
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ot(" ldmia sp!,{r4-r11,pc} ;@ we are stopped, do nothing!\n");
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ot(" ldmia sp!,{r4-r8,r10,r11,pc} ;@ we are stopped, do nothing!\n");
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ot("\n");
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ot("\n");
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@ -170,16 +171,16 @@ static void PrintFramework()
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ot("CycloneEndNoBack%s\n", ms?"":":");
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#if (CYCLONE_FOR_GENESIS == 2) || EMULATE_TRACE
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ot(" ldr r1,[r7,#0x98]\n");
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ot(" mov r9,r9,lsr #28\n");
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ot(" mov r10,r10,lsr #28\n");
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ot(" tst r1,r1\n");
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ot(" bxne r1 ;@ jump to alternative CycloneEnd\n");
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#else
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ot(" mov r9,r9,lsr #28\n");
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ot(" mov r10,r10,lsr #28\n");
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#endif
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ot(" str r4,[r7,#0x40] ;@ Save Current PC + Memory Base\n");
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ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");
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ot(" strb r9,[r7,#0x46] ;@ Save Flags (NZCV)\n");
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ot(" ldmia sp!,{r4-r11,pc}\n");
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ot(" strb r10,[r7,#0x46] ;@ Save Flags (NZCV)\n");
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ot(" ldmia sp!,{r4-r8,r10,r11,pc}\n");
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ltorg();
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ot("\n");
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ot("\n");
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@ -360,22 +361,22 @@ static void PrintFramework()
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ot(" movle r0,#0\n");
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ot(" bxle lr ;@ no ints\n");
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ot("\n");
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ot(" stmdb sp!,{r4,r5,r7-r11,lr}\n");
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ot(" stmdb sp!,{r4,r5,r7,r8,r10,r11,lr}\n");
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ot(" mov r7,r0\n");
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ot(" mov r0,r2\n");
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ot(" ldrb r9,[r7,#0x46] ;@ r9 = Flags (NZCV)\n");
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ot(" ldrb r10,[r7,#0x46] ;@ r10 = Flags (NZCV)\n");
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ot(" mov r5,#0\n");
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ot(" ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base\n");
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ot(" mov r9,r9,lsl #28 ;@ r9 = Flags 0xf0000000, cpsr format\n");
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ot(" ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base\n");
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ot(" mov r10,r10,lsl #28 ;@ r10 = Flags 0xf0000000, cpsr format\n");
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ot(" adr r2,CycloneFlushIrqEnd\n");
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ot(" str r2,[r7,#0x98] ;@ set custom CycloneEnd\n");
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ot(" b CycloneDoInterrupt\n");
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ot("\n");
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ot("CycloneFlushIrqEnd%s\n", ms?"":":");
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ot(" rsb r0,r5,#0\n");
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ot(" str r4,[r7,#0x40] ;@ Save Current PC + Memory Base\n");
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ot(" strb r9,[r7,#0x46] ;@ Save Flags (NZCV)\n");
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ot(" ldmia sp!,{r4,r5,r7-r11,lr}\n");
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ot(" str r4,[r7,#0x40] ;@ Save Current PC + Memory Base\n");
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ot(" strb r10,[r7,#0x46] ;@ Save Flags (NZCV)\n");
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ot(" ldmia sp!,{r4,r5,r7,r8,r10,r11,lr}\n");
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ot(" bx lr\n");
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ot("\n");
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ot("\n");
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@ -418,14 +419,14 @@ static void PrintFramework()
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ot(" orr r2,r2,#4 ;@ set activity bit: 'not processing instruction'\n");
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#endif
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ot(" str r2,[r7,#0x58]\n");
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ot(" ldrb r10,[r7,#0x44] ;@ Get old SR high\n");
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ot(" ldrb r6,[r7,#0x44] ;@ Get old SR high, abuse r6\n");
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ot(" strb r3,[r7,#0x44] ;@ Put new SR high\n");
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ot("\n");
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// 3. Save the current processor context.
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ot(" ldr r1,[r7,#0x60] ;@ Get Memory base\n");
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ot(" ldr r11,[r7,#0x3c] ;@ Get A7\n");
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ot(" tst r10,#0x20\n");
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ot(" tst r6,#0x20\n");
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ot(";@ get our SP:\n");
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ot(" ldreq r2,[r7,#0x48] ;@ ...or OSP as our stack pointer\n");
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ot(" streq r11,[r7,#0x48]\n");
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@ -436,13 +437,13 @@ static void PrintFramework()
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MemHandler(1,2);
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ot(";@ Push old SR:\n");
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ot(" ldr r0,[r7,#0x4c] ;@ X bit\n");
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ot(" mov r1,r9,lsr #28 ;@ ____NZCV\n");
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ot(" mov r1,r10,lsr #28 ;@ ____NZCV\n");
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ot(" eor r2,r1,r1,ror #1 ;@ Bit 0=C^V\n");
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ot(" tst r2,#1 ;@ 1 if C!=V\n");
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ot(" eorne r1,r1,#3 ;@ ____NZVC\n");
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ot(" and r0,r0,#0x20000000\n");
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ot(" orr r1,r1,r0,lsr #25 ;@ ___XNZVC\n");
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ot(" orr r1,r1,r10,lsl #8 ;@ Include old SR high\n");
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ot(" orr r1,r1,r6,lsl #8 ;@ Include old SR high\n");
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ot(" sub r0,r11,#6 ;@ Predecrement A7\n");
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ot(" str r0,[r7,#0x3c] ;@ Save A7\n");
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MemHandler(1,1,0,0); // already checked for address error by prev MemHandler
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@ -455,7 +456,7 @@ static void PrintFramework()
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ot(";@ call IrqCallback if it is defined\n");
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#if INT_ACK_NEEDS_STUFF
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ot(" str r4,[r7,#0x40] ;@ Save PC\n");
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ot(" mov r1,r9,lsr #28\n");
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ot(" mov r1,r10,lsr #28\n");
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ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");
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ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");
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#endif
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@ -481,7 +482,7 @@ static void PrintFramework()
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#endif
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ot(" mov r0,r0,lsl #2 ;@ get vector address\n");
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ot("\n");
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ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");
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ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");
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ot(";@ Read IRQ Vector:\n");
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MemHandler(0,2,0,0);
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ot(" tst r0,r0 ;@ uninitialized int vector?\n");
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@ -490,7 +491,7 @@ static void PrintFramework()
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ot(" ldreq pc,[r7,#0x70] ;@ Call read32(r0) handler\n");
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#if USE_CHECKPC_CALLBACK
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ot(" add lr,pc,#4\n");
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ot(" add r0,r0,r10 ;@ r0 = Memory Base + New PC\n");
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ot(" add r0,r0,r11 ;@ r0 = Memory Base + New PC\n");
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ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");
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#if EMULATE_ADDRESS_ERRORS_JUMP
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ot(" mov r4,r0\n");
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@ -498,7 +499,7 @@ static void PrintFramework()
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ot(" bic r4,r0,#1\n");
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#endif
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#else
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ot(" add r4,r0,r10 ;@ r4 = Memory Base + New PC\n");
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ot(" add r4,r0,r11 ;@ r4 = Memory Base + New PC\n");
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#if EMULATE_ADDRESS_ERRORS_JUMP
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ot(" bic r4,r4,#1\n");
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#endif
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@ -511,6 +512,7 @@ static void PrintFramework()
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ot(" tst r4,#1\n");
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ot(" bne ExceptionAddressError_r_prg_r4\n");
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#endif
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ot(" ldr r6,[r7,#0x54]\n");
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ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");
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ot(" subs r5,r5,#44 ;@ Subtract cycles\n");
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ot(" ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");
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@ -526,9 +528,9 @@ static void PrintFramework()
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ot(" orr r8,r8,r0,lsl #24 ;@ abuse r8\n");
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// 1. Make a temporary copy of the status register and set the status register for exception processing.
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ot(" ldr r10,[r7,#0x44] ;@ Get old SR high\n");
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ot(" ldr r6,[r7,#0x44] ;@ Get old SR high, abuse r6\n");
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ot(" ldr r2,[r7,#0x58] ;@ state flags\n");
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ot(" and r3,r10,#0x27 ;@ clear trace and unused flags\n");
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ot(" and r3,r6,#0x27 ;@ clear trace and unused flags\n");
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ot(" orr r3,r3,#0x20 ;@ set supervisor mode\n");
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ot(" bic r2,r2,#3 ;@ clear stopped and trace states\n");
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ot(" str r2,[r7,#0x58]\n");
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@ -537,7 +539,7 @@ static void PrintFramework()
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// 3. Save the current processor context.
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ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");
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ot(" tst r10,#0x20\n");
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ot(" tst r6,#0x20\n");
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ot(";@ get our SP:\n");
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ot(" ldreq r2,[r7,#0x48] ;@ ...or OSP as our stack pointer\n");
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ot(" streq r0,[r7,#0x48]\n");
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@ -550,14 +552,14 @@ static void PrintFramework()
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MemHandler(1,2);
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ot(";@ Push old SR:\n");
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ot(" ldr r0,[r7,#0x4c] ;@ X bit\n");
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ot(" mov r1,r9,lsr #28 ;@ ____NZCV\n");
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ot(" mov r1,r10,lsr #28 ;@ ____NZCV\n");
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ot(" eor r2,r1,r1,ror #1 ;@ Bit 0=C^V\n");
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ot(" tst r2,#1 ;@ 1 if C!=V\n");
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ot(" eorne r1,r1,#3 ;@ ____NZVC\n");
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ot(" and r0,r0,#0x20000000\n");
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ot(" orr r1,r1,r0,lsr #25 ;@ ___XNZVC\n");
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ot(" ldr r0,[r7,#0x3c] ;@ A7\n");
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ot(" orr r1,r1,r10,lsl #8 ;@ Include SR high\n");
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ot(" orr r1,r1,r6,lsl #8 ;@ Include SR high\n");
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ot(" sub r0,r0,#2 ;@ Predecrement A7\n");
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ot(" str r0,[r7,#0x3c] ;@ Save A7\n");
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MemHandler(1,1,0,0);
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@ -591,6 +593,7 @@ static void PrintFramework()
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ot(" tst r4,#1\n");
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ot(" bne ExceptionAddressError_r_prg_r4\n");
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#endif
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ot(" ldr r6,[r7,#0x54]\n");
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ot(" bx r11 ;@ Return\n");
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ot("\n");
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@ -606,14 +609,14 @@ static void PrintFramework()
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ot("ExceptionAddressError_r_prg_r4%s\n", ms?"":":");
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ot(" ldr r1,[r7,#0x44]\n");
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ot(" ldr r3,[r7,#0x60] ;@ Get Memory base\n");
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ot(" mov r10,#0x12\n");
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ot(" mov r6,#0x12\n");
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ot(" sub r11,r4,r3\n");
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ot(" tst r1,#0x20\n");
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ot(" orrne r10,r10,#4\n");
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ot(" orrne r6,r6,#4\n");
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ot("\n");
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ot("ExceptionAddressError%s\n", ms?"":":");
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ot(";@ r10 - info word (without instruction/not bit), r11 - faulting address\n");
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ot(";@ r6 - info word (without instruction/not bit), r11 - faulting address\n");
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// 1. Make a temporary copy of the status register and set the status register for exception processing.
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ot(" ldrb r0,[r7,#0x44] ;@ Get old SR high\n");
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@ -623,7 +626,7 @@ static void PrintFramework()
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ot(" strb r3,[r7,#0x44] ;@ Put new SR high\n");
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ot(" bic r2,r2,#3 ;@ clear stopped and trace states\n");
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ot(" tst r2,#4\n");
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ot(" orrne r10,r10,#8 ;@ complete info word\n");
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ot(" orrne r6,r6,#8 ;@ complete info word\n");
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ot(" orr r2,r2,#4 ;@ set activity bit: 'not processing instruction'\n");
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#if EMULATE_HALT
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ot(" tst r2,#8\n");
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@ -635,13 +638,13 @@ static void PrintFramework()
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#else
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ot(" str r2,[r7,#0x58]\n");
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#endif
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ot(" and r9,r9,#0xf0000000\n");
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ot(" orr r9,r9,r0,lsl #4 ;@ some preparations for SR push\n");
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ot(" and r10,r10,#0xf0000000\n");
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ot(" orr r10,r10,r0,lsl #4 ;@ some preparations for SR push\n");
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ot("\n");
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// 3. Save the current processor context + additional information.
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ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");
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ot(" tst r9,#0x200\n");
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ot(" tst r10,#0x200\n");
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ot(";@ get our SP:\n");
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ot(" ldreq r2,[r7,#0x48] ;@ ...or OSP as our stack pointer\n");
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ot(" streq r0,[r7,#0x48]\n");
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@ -656,14 +659,14 @@ static void PrintFramework()
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// SR
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ot(";@ Push old SR:\n");
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ot(" ldr r0,[r7,#0x4c] ;@ X bit\n");
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ot(" mov r1,r9,ror #28 ;@ ____NZCV\n");
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ot(" mov r1,r10,ror #28 ;@ ____NZCV\n");
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ot(" eor r2,r1,r1,ror #1 ;@ Bit 0=C^V\n");
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ot(" tst r2,#1 ;@ 1 if C!=V\n");
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ot(" eorne r1,r1,#3 ;@ ____NZVC\n");
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ot(" and r0,r0,#0x20000000\n");
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ot(" orr r1,r1,r0,lsr #25 ;@ ___XNZVC\n");
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ot(" ldr r0,[r7,#0x3c] ;@ A7\n");
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ot(" and r9,r9,#0xf0000000\n");
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ot(" and r10,r10,#0xf0000000\n");
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ot(" sub r0,r0,#2 ;@ Predecrement A7\n");
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ot(" str r0,[r7,#0x3c] ;@ Save A7\n");
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MemHandler(1,1,0,0);
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@ -684,7 +687,7 @@ static void PrintFramework()
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// information word
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ot(";@ Push info word:\n");
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ot(" ldr r0,[r7,#0x3c] ;@ A7\n");
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ot(" mov r1,r10\n");
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ot(" mov r1,r6\n");
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ot(" sub r0,r0,#2 ;@ Predecrement A7\n");
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ot(" str r0,[r7,#0x3c] ;@ Save A7\n");
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MemHandler(1,1,0,0);
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@ -713,6 +716,7 @@ static void PrintFramework()
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#endif
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// 4. Resume execution.
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ot(" ldr r6,[r7,#0x54]\n");
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ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");
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ot(" subs r5,r5,#50 ;@ Subtract cycles\n");
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ot(" ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");
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@ -753,7 +757,7 @@ static void PrintFramework()
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ot(" ldr r2,[r7,#0x58]\n");
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ot(" ldr r0,[r7,#0x9c] ;@ restore cycles\n");
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ot(" ldr r1,[r7,#0xa0] ;@ old CycloneEnd handler\n");
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ot(" mov r9,r9,lsl #28\n");
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ot(" mov r10,r10,lsl #28\n");
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ot(" add r5,r0,r5\n");
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ot(" str r1,[r7,#0x98]\n");
|
||||
ot(";@ still tracing?\n"); // exception might have happend
|
||||
|
|
@ -792,7 +796,7 @@ int MemHandler(int type,int size,int addrreg,int need_addrerr_check)
|
|||
func=0x68+type*0xc+(size<<2); // Find correct offset
|
||||
|
||||
#if MEMHANDLERS_NEED_FLAGS
|
||||
ot(" mov r3,r9,lsr #28\n");
|
||||
ot(" mov r3,r10,lsr #28\n");
|
||||
ot(" strb r3,[r7,#0x46] ;@ Save Flags (NZCV)\n");
|
||||
#endif
|
||||
FlushPC();
|
||||
|
|
@ -847,8 +851,8 @@ int MemHandler(int type,int size,int addrreg,int need_addrerr_check)
|
|||
ot(" handler\n");
|
||||
|
||||
#if MEMHANDLERS_CHANGE_FLAGS
|
||||
ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
|
||||
ot(" mov r9,r9,lsl #28\n");
|
||||
ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");
|
||||
ot(" mov r10,r10,lsl #28\n");
|
||||
#endif
|
||||
#if MEMHANDLERS_CHANGE_PC
|
||||
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");
|
||||
|
|
@ -877,17 +881,17 @@ static void PrintOpcodes()
|
|||
#endif
|
||||
#if USE_UNRECOGNIZED_CALLBACK
|
||||
ot(" str r4,[r7,#0x40] ;@ Save PC\n");
|
||||
ot(" mov r1,r9,lsr #28\n");
|
||||
ot(" mov r1,r10,lsr #28\n");
|
||||
ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");
|
||||
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");
|
||||
ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");
|
||||
ot(" tst r11,r11\n");
|
||||
ot(" movne lr,pc\n");
|
||||
ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");
|
||||
ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
|
||||
ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");
|
||||
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
|
||||
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");
|
||||
ot(" mov r9,r9,lsl #28\n");
|
||||
ot(" mov r10,r10,lsl #28\n");
|
||||
ot(" tst r0,r0\n");
|
||||
ot(" moveq r0,#4\n");
|
||||
ot(" bleq Exception\n");
|
||||
|
|
@ -904,17 +908,17 @@ static void PrintOpcodes()
|
|||
ot(" sub r4,r4,#2\n");
|
||||
#if USE_AFLINE_CALLBACK
|
||||
ot(" str r4,[r7,#0x40] ;@ Save PC\n");
|
||||
ot(" mov r1,r9,lsr #28\n");
|
||||
ot(" mov r1,r10,lsr #28\n");
|
||||
ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");
|
||||
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");
|
||||
ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");
|
||||
ot(" tst r11,r11\n");
|
||||
ot(" movne lr,pc\n");
|
||||
ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");
|
||||
ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
|
||||
ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");
|
||||
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
|
||||
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");
|
||||
ot(" mov r9,r9,lsl #28\n");
|
||||
ot(" mov r10,r10,lsl #28\n");
|
||||
ot(" tst r0,r0\n");
|
||||
ot(" moveq r0,#0x0a\n");
|
||||
ot(" bleq Exception\n");
|
||||
|
|
@ -930,17 +934,17 @@ static void PrintOpcodes()
|
|||
ot(" sub r4,r4,#2\n");
|
||||
#if USE_AFLINE_CALLBACK
|
||||
ot(" str r4,[r7,#0x40] ;@ Save PC\n");
|
||||
ot(" mov r1,r9,lsr #28\n");
|
||||
ot(" mov r1,r10,lsr #28\n");
|
||||
ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");
|
||||
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");
|
||||
ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");
|
||||
ot(" tst r11,r11\n");
|
||||
ot(" movne lr,pc\n");
|
||||
ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");
|
||||
ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");
|
||||
ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");
|
||||
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");
|
||||
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");
|
||||
ot(" mov r9,r9,lsl #28\n");
|
||||
ot(" mov r10,r10,lsl #28\n");
|
||||
ot(" tst r0,r0\n");
|
||||
ot(" moveq r0,#0x0b\n");
|
||||
ot(" bleq Exception\n");
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue