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Finish migrating to new mem handling. Make carthw db external.

Browse source 
Still need to fix asm and protection emulation.


git-svn-id: file:///home/notaz/opt/svn/PicoDrive@769 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz 2009-09-05 21:13:30 +00:00
parent af37bca858
commit 45f2f245f5
30 changed files with 948 additions and 1027 deletions
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116
pico/carthw/svp/memory.c
View file

@ -7,32 +7,9 @@
#include "../../pico_int.h"
#include "../../memory.h"
#ifndef UTYPES_DEFINED
typedef unsigned char u8;
typedef unsigned short u16;
typedef unsigned int u32;
#define UTYPES_DEFINED
#endif
#define CLEAR_DETECT(pc_start,pc_end,text) \
if (d == 0 && SekPc >= pc_start && SekPc < pc_end) \
{ \
if (!clearing_ram) \
elprintf(EL_SVP, text); \
clearing_ram = 1; \
return; \
}
unsigned int PicoSVPRead16(unsigned int a, int realsize)
{
unsigned int d = 0;
static int a15004_looping = 0;
// dram: 300000-31ffff
if ((a & 0xfe0000) == 0x300000)
d = *(u16 *)(svp->dram + (a&0x1fffe));
/*
// "cell arrange" 1: 390000-39ffff
else if ((a & 0xff0000) == 0x390000) {
// this is rewritten 68k code
@ -48,9 +25,15 @@ unsigned int PicoSVPRead16(unsigned int a, int realsize)
a1 = (a1 & 0x7801) | ((a1 & 0x1e) << 6) | ((a1 & 0x7e0) >> 4);
d = ((u16 *)svp->dram)[a1];
}
*/
// IO/control area (0xa10000 - 0xa1ffff)
static u32 PicoRead16_svpr(u32 a)
{
u32 d = 0;
// regs
else if ((a & 0xfffff0) == 0xa15000) {
if ((a & 0xfffff0) == 0xa15000) {
switch (a & 0xf) {
case 0:
case 2:
@ -60,44 +43,41 @@ unsigned int PicoSVPRead16(unsigned int a, int realsize)
case 4:
d = svp->ssp1601.gr[SSP_PM0].h;
svp->ssp1601.gr[SSP_PM0].h &= ~1;
if (d&1) a15004_looping = 0;
break;
}
}
else
elprintf(EL_UIO|EL_SVP|EL_ANOMALY, "SVP FIXME: unhandled r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);
if (!a15004_looping)
elprintf(EL_SVP, "SVP r%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);
#if EL_LOGMASK & EL_SVP
{
static int a15004_looping = 0;
if (a == 0xa15004 && (d & 1))
a15004_looping = 0;
if (a == 0xa15004 && !(d&1)) {
if (!a15004_looping)
elprintf(EL_SVP, "SVP det TIGHT loop: a15004");
a15004_looping = 1;
if (!a15004_looping)
elprintf(EL_SVP, "SVP r%i: [%06x] %04x @%06x", realsize, a, d, SekPc);
if (a == 0xa15004 && !(d&1)) {
if (!a15004_looping)
elprintf(EL_SVP, "SVP det TIGHT loop: a15004");
a15004_looping = 1;
}
else
a15004_looping = 0;
}
#endif
return d;
}
else a15004_looping = 0;
//if (a == 0x30fe02 && d == 0)
// elprintf(EL_ANOMALY, "SVP lag?");
return d;
return PicoRead16_io(a);
}
void PicoSVPWrite8(unsigned int a, unsigned int d, int realsize)
static void PicoWrite16_svpr(u32 a, u32 d)
{
elprintf(EL_UIO|EL_SVP|EL_ANOMALY, "!!! SVP w%i: [%06x], %08x @%06x", realsize, a&0xffffff, d, SekPc);
}
elprintf(EL_SVP, "SVP w16: [%06x] %04x @%06x", a, d, SekPc);
void PicoSVPWrite16(unsigned int a, unsigned int d, int realsize)
{
static int clearing_ram = 0;
// DRAM
if ((a & 0xfe0000) == 0x300000)
*(u16 *)(svp->dram + (a&0x1fffe)) = d;
// regs
else if ((a & 0xfffff0) == 0xa15000) {
if ((a & 0xfffff0) == 0xa15000) {
if (a == 0xa15000 || a == 0xa15002) {
// just guessing here
svp->ssp1601.gr[SSP_XST].h = d;
@ -106,24 +86,34 @@ void PicoSVPWrite16(unsigned int a, unsigned int d, int realsize)
}
//else if (a == 0xa15006) svp->ssp1601.gr[SSP_PM0].h = d | (d << 1);
// 0xa15006 probably has 'halt'
return;
}
else
elprintf(EL_UIO|EL_SVP|EL_ANOMALY, "SVP FIXME: unhandled w%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);
PicoWrite16_io(a, d);
/*
if (a == 0x30fe06 && d != 0)
svp->ssp1601.emu_status &= ~SSP_WAIT_30FE06;
if (a == 0x30fe08 && d != 0)
svp->ssp1601.emu_status &= ~SSP_WAIT_30FE08;
// debug: detect RAM clears..
CLEAR_DETECT(0x0221dc, 0x0221f0, "SVP RAM CLEAR (full) @ 0221C2");
CLEAR_DETECT(0x02204c, 0x022068, "SVP RAM CLEAR 300000-31ffbf (1) @ 022032");
CLEAR_DETECT(0x021900, 0x021ff0, "SVP RAM CLEAR 300000-305fff");
CLEAR_DETECT(0x0220b0, 0x0220cc, "SVP RAM CLEAR 300000-31ffbf (2) @ 022096");
clearing_ram = 0;
elprintf(EL_SVP, "SVP w%i: [%06x] %04x @%06x", realsize, a&0xffffff, d, SekPc);
*/
}
void PicoSVPMemSetup(void)
{
// 68k memmap:
// DRAM
cpu68k_map_set(m68k_read8_map, 0x300000, 0x31ffff, svp->dram, 0);
cpu68k_map_set(m68k_read16_map, 0x300000, 0x31ffff, svp->dram, 0);
cpu68k_map_set(m68k_write8_map, 0x300000, 0x31ffff, svp->dram, 0);
cpu68k_map_set(m68k_write16_map, 0x300000, 0x31ffff, svp->dram, 0);
// DRAM (cell arrange) - TODO
// regs
cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1); // PicoRead8_svpr
cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_svpr, 1);
cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1); // PicoWrite8_svpr
cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_svpr, 1);
}