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32x: some accuracy improvements

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This commit is contained in:
notaz 2013-08-05 03:58:27 +03:00
parent 34280f9b42
commit 4d5dfee861
4 changed files with 20 additions and 16 deletions
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10
pico/32x/32x.c
View file

@ -29,11 +29,9 @@ static int REGPARM(2) sh2_irq_cb(SH2 *sh2, int level)
}
}
// if !nested_call, must sync CPUs before calling this
void p32x_update_irls(SH2 *active_sh2)
void p32x_update_irls(SH2 *active_sh2, int m68k_cycles)
{
int irqs, mlvl = 0, slvl = 0;
int m68k_cycles = 0;
int mrun, srun;
if (active_sh2 != NULL)
@ -170,7 +168,7 @@ void PicoReset32x(void)
{
if (PicoAHW & PAHW_32X) {
Pico32x.sh2irqs |= P32XI_VRES;
p32x_update_irls(NULL);
p32x_update_irls(NULL, SekCyclesDoneT2());
p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES, 0);
p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES, 0);
p32x_pwm_ctl_changed();
@ -218,7 +216,7 @@ static void p32x_start_blank(void)
}
Pico32x.sh2irqs |= P32XI_VINT;
p32x_update_irls(NULL);
p32x_update_irls(NULL, SekCyclesDoneT2());
p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, 0);
p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0);
}
@ -517,7 +515,7 @@ void Pico32xStateLoaded(int is_early)
SekCycleCnt = 0;
sh2s[0].m68krcycles_done = sh2s[1].m68krcycles_done = SekCycleCntT;
p32x_update_irls(NULL);
p32x_update_irls(NULL, SekCycleCntT);
p32x_pwm_state_loaded();
run_events(SekCycleCntT);
}

18
pico/32x/memory.c
View file

@ -237,15 +237,21 @@ static void p32x_reg_write8(u32 a, u32 d)
r[0] = (r[0] & ~P32XS_nRES) | (d & P32XS_nRES);
return;
case 3: // irq ctl
if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) {
if ((d & 1) != !!(Pico32x.sh2irqi[0] & P32XI_CMD)) {
p32x_sync_sh2s(SekCyclesDoneT());
if (d & 1)
Pico32x.sh2irqi[0] |= P32XI_CMD;
p32x_update_irls(NULL);
else
Pico32x.sh2irqi[0] &= ~P32XI_CMD;
p32x_update_irls(NULL, SekCyclesDoneT2());
}
if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) {
if (!!(d & 2) != !!(Pico32x.sh2irqi[1] & P32XI_CMD)) {
p32x_sync_sh2s(SekCyclesDoneT());
if (d & 2)
Pico32x.sh2irqi[1] |= P32XI_CMD;
p32x_update_irls(NULL);
else
Pico32x.sh2irqi[1] &= ~P32XI_CMD;
p32x_update_irls(NULL, SekCyclesDoneT2());
}
return;
case 5: // bank
@ -481,7 +487,7 @@ static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid)
Pico32x.sh2_regs[0] |= d & 0x80;
if (d & 1)
p32x_pwm_schedule_sh2(&sh2s[cpuid]);
p32x_update_irls(&sh2s[cpuid]);
p32x_update_irls(&sh2s[cpuid], 0);
return;
case 5: // H count
d &= 0xff;
@ -555,7 +561,7 @@ static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid)
return;
irls:
p32x_update_irls(&sh2s[cpuid]);
p32x_update_irls(&sh2s[cpuid], 0);
}
// ------------------------------------------------------------------

2
pico/32x/pwm.c
View file

@ -31,7 +31,7 @@ void p32x_pwm_ctl_changed(void)
static void do_pwm_irq(unsigned int m68k_cycles)
{
Pico32x.sh2irqs |= P32XI_PWM;
p32x_update_irls(NULL);
p32x_update_irls(NULL, m68k_cycles);
if (Pico32x.regs[0x30 / 2] & P32XP_RTP) {
p32x_event_schedule(m68k_cycles, P32X_EVENT_PWM, pwm_cycles / 3 + 1);

2
pico/pico_int.h
View file

@ -746,7 +746,7 @@ void PicoFrame32x(void);
void Pico32xStateLoaded(int is_early);
void p32x_sync_sh2s(unsigned int m68k_target);
void p32x_sync_other_sh2(SH2 *sh2, unsigned int m68k_target);
void p32x_update_irls(SH2 *active_sh2);
void p32x_update_irls(SH2 *active_sh2, int m68k_cycles);
void p32x_reset_sh2s(void);
void p32x_event_schedule(unsigned int now, enum p32x_event event, int after);
void p32x_event_schedule_sh2(SH2 *sh2, enum p32x_event event, int after);