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sh2 drc, tentative MIPS32/64 Release 2 support

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This commit is contained in:
kub 2019-12-02 22:31:14 +01:00
parent 3b0d710418
commit 4f992bf541
4 changed files with 186 additions and 60 deletions
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4
cpu/drc/emit_riscv.c
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@ -1499,10 +1499,10 @@ static int emith_cond_check(int cond, int *r, int *s)
emith_tst_r_imm(sr, Q); /* if (Q ^ M) */ \
EMITH_JMP3_START(DCOND_EQ); \
emith_add_r_r_r(rn, t_, rm); \
EMIT(R5_SLTU_REG(FC, rn, t_)); \
EMIT(R5_SLTU_REG(FC, rn, t_)); \
EMITH_JMP3_MID(DCOND_EQ); \
emith_sub_r_r_r(rn, t_, rm); \
EMIT(R5_SLTU_REG(FC, t_, rn)); \
EMIT(R5_SLTU_REG(FC, t_, rn)); \
EMITH_JMP3_END(); \
emith_eor_r_r(sr, FC); /* T ^= carry */ \
rcache_free_tmp(t_); \