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core, another fix for z80 reset

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This commit is contained in:
kub 2024-03-02 10:34:50 +01:00
parent 2a87da47c0
commit 506adbd5eb
3 changed files with 13 additions and 13 deletions
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17
cpu/DrZ80/drz80.S
View file

@ -827,6 +827,7 @@ z80_xmap_rebase_sp:
mov r0,z80sp mov r0,z80sp
readmem16 readmem16
add z80sp,z80sp,#2 add z80sp,z80sp,#2
bic z80sp,z80sp,#1<<16
.endif .endif
.endm .endm
@ -856,7 +857,7 @@ z80_xmap_rebase_sp:
.else .else
mov r0,\reg mov r0,\reg
subs z80sp,z80sp,#2 subs z80sp,z80sp,#2
@ addcc z80sp,z80sp,#1<<16 addcc z80sp,z80sp,#1<<16
mov r1,z80sp mov r1,z80sp
writemem16 writemem16
.endif .endif
@ -874,7 +875,7 @@ z80_xmap_rebase_sp:
.else .else
mov r0,\reg,lsr #16 mov r0,\reg,lsr #16
subs z80sp,z80sp,#2 subs z80sp,z80sp,#2
@ addcc z80sp,z80sp,#1<<16 addcc z80sp,z80sp,#1<<16
mov r1,z80sp mov r1,z80sp
writemem16 writemem16
.endif .endif
@ -1506,7 +1507,7 @@ DoInterrupt_mode0:
strb r0,[z80sp,#-1]! strb r0,[z80sp,#-1]!
.else .else
subs z80sp,z80sp,#2 subs z80sp,z80sp,#2
@ addcc z80sp,z80sp,#1<<16 addcc z80sp,z80sp,#1<<16
mov r1,z80sp mov r1,z80sp
writemem16 writemem16
ldr r2,[cpucontext, #z80irqvector] ldr r2,[cpucontext, #z80irqvector]
@ -4732,6 +4733,9 @@ opcode_3_2:
;@INC SP ;@INC SP
opcode_3_3: opcode_3_3:
add z80sp,z80sp,#1 add z80sp,z80sp,#1
.if !FAST_Z80SP
bic z80sp,z80sp,#1<<16
.endif
fetch 6 fetch 6
;@INC (HL) ;@INC (HL)
opcode_3_4: opcode_3_4:
@ -4782,7 +4786,10 @@ opcode_3_A:
fetch 13 fetch 13
;@DEC SP ;@DEC SP
opcode_3_B: opcode_3_B:
sub z80sp,z80sp,#1 subs z80sp,z80sp,#1
.if !FAST_Z80SP
addcc z80sp,z80sp,#1<<16
.endif
fetch 6 fetch 6
;@INC A ;@INC A
opcode_3_C: opcode_3_C:
@ -5745,6 +5752,7 @@ opcode_F_1:
mov r0,z80sp mov r0,z80sp
readmem16 readmem16
add z80sp,z80sp,#2 add z80sp,z80sp,#2
bic z80sp,z80sp,#1<<16
and z80a,r0,#0xFF00 and z80a,r0,#0xFF00
mov z80a,z80a,lsl#16 mov z80a,z80a,lsl#16
and z80f,r0,#0xFF and z80f,r0,#0xFF
@ -7638,6 +7646,7 @@ opcode_DD_E1:
readmem16 readmem16
ldmfd sp!,{r2,z80xx} ldmfd sp!,{r2,z80xx}
add z80sp,z80sp,#2 add z80sp,z80sp,#2
bic z80sp,z80sp,#1<<16
.endif .endif
strh r0,[z80xx,#2] strh r0,[z80xx,#2]
fetch 14 fetch 14

2
cpu/cz80/cz80.c
View file

@ -212,8 +212,6 @@ void Cz80_Reset(cz80_struc *CPU)
{ {
// I, R, CPU and interrupts logic is reset, registers are untouched // I, R, CPU and interrupts logic is reset, registers are untouched
memset(&CPU->R, 0, (FPTR)&CPU->BasePC - (FPTR)&CPU->R); memset(&CPU->R, 0, (FPTR)&CPU->BasePC - (FPTR)&CPU->R);
Cz80_Set_Reg(CPU, CZ80_FA, 0xffff);
Cz80_Set_Reg(CPU, CZ80_SP, 0xffff);
Cz80_Set_Reg(CPU, CZ80_PC, 0); Cz80_Set_Reg(CPU, CZ80_PC, 0);
} }

7
pico/z80if.c
View file

@ -112,14 +112,7 @@ void z80_reset(void)
drZ80.Z80IF = 0; drZ80.Z80IF = 0;
drZ80.z80irqvector = 0xff0000; // RST 38h drZ80.z80irqvector = 0xff0000; // RST 38h
drZ80.Z80PC_BASE = drZ80.Z80PC = z80_read_map[0] << 1; drZ80.Z80PC_BASE = drZ80.Z80PC = z80_read_map[0] << 1;
drZ80.Z80SP = 0xffff;
drZ80.Z80F = 0xff;
drZ80.Z80A = 0xff << 24;
// others not changed, undefined on cold boot // others not changed, undefined on cold boot
/*
drZ80.Z80IX = 0xFFFF << 16;
drZ80.Z80IY = 0xFFFF << 16;
*/
#ifdef FAST_Z80SP #ifdef FAST_Z80SP
// drZ80 is locked in single bank // drZ80 is locked in single bank
drz80_sp_base = (PicoIn.AHW & PAHW_SMS) ? 0xc000 : 0x0000; drz80_sp_base = (PicoIn.AHW & PAHW_SMS) ? 0xc000 : 0x0000;