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md, fix vdp reset handling

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This commit is contained in:
kub 2024-03-28 21:39:12 +01:00
parent 3e491c7880
commit 51d6248b95
3 changed files with 32 additions and 17 deletions
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14
pico/pico.c
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@ -72,18 +72,11 @@ void PicoPower(void)
memset(&Pico.m,0,sizeof(Pico.m));
memset(&Pico.t,0,sizeof(Pico.t));
Pico.video.pending_ints=0;
z80_reset();
// my MD1 VA6 console has this in IO
PicoMem.ioports[1] = PicoMem.ioports[2] = PicoMem.ioports[3] = 0xff;
// default VDP register values (based on Fusion)
Pico.video.reg[0] = Pico.video.reg[1] = 0x04;
Pico.video.reg[0xc] = 0x81;
Pico.video.reg[0xf] = 0x02;
PicoVideoFIFOMode(0, 1);
if (PicoIn.AHW & PAHW_MCD)
PicoPowerMCD();
@ -178,20 +171,17 @@ int PicoReset(void)
// s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).
SekSetRealTAS(PicoIn.AHW & PAHW_MCD);
Pico.m.dirtyPal = 1;
Pico.m.z80_bank68k = 0;
Pico.m.z80_reset = 1;
PicoDetectRegion();
Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal
Pico.video.hint_irq = (PicoIn.AHW & PAHW_PICO ? 5 : 4);
PicoVideoReset();
PsndReset(); // pal must be known here
// create an empty "dma" to cause 68k exec start at random frame location
Pico.t.m68c_line_start = Pico.t.m68c_aim;
PicoDrawBgcDMA(NULL, 0, 0, 0, 0);
PicoVideoFIFOWrite(rand() & 0x1fff, 0, 0, PVS_CPURD);
SekFinishIdleDet();

1
pico/pico_int.h
View file

@ -958,6 +958,7 @@ int PicoVideoFIFOHint(void);
void PicoVideoFIFOMode(int active, int h40);
int PicoVideoFIFOWrite(int count, int byte_p, unsigned sr_mask, unsigned sr_flags);
void PicoVideoInit(void);
void PicoVideoReset(void);
void PicoVideoSync(int skip);
void PicoVideoSave(void);
void PicoVideoLoad(void);

34
pico/videoport.c
View file

@ -986,11 +986,13 @@ PICO_INTERNAL_ASM void PicoVideoWrite(u32 a,unsigned short d)
default:
return;
}
SATaddr = ((pvid->reg[5]&0x7f) << 9) | ((pvid->reg[6]&0x20) << 11);
SATmask = ~0x1ff;
if (pvid->reg[12]&1)
SATaddr &= ~0x200, SATmask &= ~0x200; // H40, zero lowest SAT bit
//elprintf(EL_STATUS, "spritep moved to %04x", SATaddr);
if (Pico.est.rendstatus & PDRAW_DIRTY_SPRITES) {
SATaddr = ((pvid->reg[5]&0x7f) << 9) | ((pvid->reg[6]&0x20) << 11);
SATmask = ~0x1ff;
if (pvid->reg[12]&1)
SATaddr &= ~0x200, SATmask &= ~0x200; // H40, zero lowest SAT bit
//elprintf(EL_STATUS, "spritep moved to %04x", SATaddr);
}
return;
update_irq:
@ -1160,6 +1162,28 @@ unsigned char PicoVideoRead8HV_L(int is_from_z80)
return d;
}
void PicoVideoReset(void)
{
Pico.video.hint_irq = (PicoIn.AHW & PAHW_PICO ? 5 : 4);
Pico.video.pending_ints=0;
// default VDP register values (based on Fusion)
Pico.video.reg[0] = Pico.video.reg[1] = 0x04;
Pico.video.reg[0xc] = 0x81;
Pico.video.reg[0xf] = 0x02;
SATaddr = 0x0000;
SATmask = ~0x1ff;
memset(VdpSATCache, 0, sizeof(VdpSATCache));
memset(&VdpFIFO, 0, sizeof(VdpFIFO));
Pico.m.dirtyPal = 1;
Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal
PicoDrawBgcDMA(NULL, 0, 0, 0, 0);
PicoVideoFIFOMode(0, 1);
}
void PicoVideoCacheSAT(int load)
{
struct PicoVideo *pv = &Pico.video;