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https://github.com/RaySollium99/picodrive.git
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improve input handling
This commit is contained in:
notaz
parent
be7867d875
commit
531a8f3883
12 changed files with 170 additions and 108 deletions
132
pico/memory.c
132
pico/memory.c
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@ -186,62 +186,119 @@ void cyclone_crashed(u32 pc, struct Cyclone *context)
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// -----------------------------------------------------------------
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// memmap helpers
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#ifndef _ASM_MEMORY_C
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static
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#endif
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int PadRead(int i)
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static u32 read_pad_3btn(int i, u32 out_bits)
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{
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int pad,value,data_reg;
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pad=~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU
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data_reg=Pico.ioports[i+1];
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u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU
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u32 value;
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// orr the bits, which are set as output
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value = data_reg&(Pico.ioports[i+4]|0x80);
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if (out_bits & 0x40) // TH
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value = pad & 0x3f; // ?1CB RLDU
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else
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value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU
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if (PicoOpt & POPT_6BTN_PAD)
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{
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int phase = Pico.m.padTHPhase[i];
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if(phase == 2 && !(data_reg&0x40)) { // TH
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value|=(pad&0xc0)>>2; // ?0SA 0000
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return value;
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} else if(phase == 3) {
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if(data_reg&0x40)
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value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ
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else
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value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111
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return value;
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}
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}
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if(data_reg&0x40) // TH
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value|=(pad&0x3f); // ?1CB RLDU
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else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU
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return value; // will mirror later
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value |= out_bits & 0x40;
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return value;
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}
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#ifndef _ASM_MEMORY_C
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static u32 read_pad_6btn(int i, u32 out_bits)
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{
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u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU
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int phase = Pico.m.padTHPhase[i];
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u32 value;
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static u32 io_ports_read(u32 a)
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if (phase == 2 && !(out_bits & 0x40)) {
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value = (pad & 0xc0) >> 2; // ?0SA 0000
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goto out;
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}
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else if(phase == 3) {
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if (out_bits & 0x40)
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return (pad & 0x30) | ((pad >> 8) & 0xf); // ?1CB MXYZ
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else
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return ((pad & 0xc0) >> 2) | 0x0f; // ?0SA 1111
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goto out;
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}
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if (out_bits & 0x40) // TH
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value = pad & 0x3f; // ?1CB RLDU
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else
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value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU
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out:
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value |= out_bits & 0x40;
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return value;
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}
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static u32 read_nothing(int i, u32 out_bits)
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{
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return 0xff;
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}
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typedef u32 (port_read_func)(int index, u32 out_bits);
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static port_read_func *port_readers[3] = {
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read_pad_3btn,
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read_pad_3btn,
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read_nothing
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};
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static NOINLINE u32 port_read(int i)
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{
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u32 data_reg = Pico.ioports[i + 1];
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u32 ctrl_reg = Pico.ioports[i + 4] | 0x80;
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u32 in, out;
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out = data_reg & ctrl_reg;
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out |= 0x7f & ~ctrl_reg; // pull-ups
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in = port_readers[i](i, out);
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return (in & ~ctrl_reg) | (data_reg & ctrl_reg);
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}
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void PicoSetInputDevice(int port, enum input_device device)
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{
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port_read_func *func;
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if (port < 0 || port > 2)
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return;
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switch (device) {
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case PICO_INPUT_PAD_3BTN:
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func = read_pad_3btn;
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break;
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case PICO_INPUT_PAD_6BTN:
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func = read_pad_6btn;
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break;
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default:
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func = read_nothing;
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break;
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}
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port_readers[port] = func;
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}
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NOINLINE u32 io_ports_read(u32 a)
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{
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u32 d;
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a = (a>>1) & 0xf;
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switch (a) {
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case 0: d = Pico.m.hardware; break; // Hardware value (Version register)
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case 1: d = PadRead(0); break;
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case 2: d = PadRead(1); break;
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case 1: d = port_read(0); break;
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case 2: d = port_read(1); break;
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case 3: d = port_read(2); break;
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default: d = Pico.ioports[a]; break; // IO ports can be used as RAM
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}
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return d;
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}
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static void NOINLINE io_ports_write(u32 a, u32 d)
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NOINLINE void io_ports_write(u32 a, u32 d)
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{
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a = (a>>1) & 0xf;
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// 6 button gamepad: if TH went from 0 to 1, gamepad changes state
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if (1 <= a && a <= 2 && (PicoOpt & POPT_6BTN_PAD))
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if (1 <= a && a <= 2)
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{
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Pico.m.padDelay[a - 1] = 0;
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if (!(Pico.ioports[a] & 0x40) && (d & 0x40))
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@ -252,8 +309,6 @@ static void NOINLINE io_ports_write(u32 a, u32 d)
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Pico.ioports[a] = d;
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}
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#endif // _ASM_MEMORY_C
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void NOINLINE ctl_write_z80busreq(u32 d)
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{
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d&=1; d^=1;
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@ -1177,3 +1232,4 @@ static void z80_mem_setup(void)
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#endif
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}
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// vim:shiftwidth=2:ts=2:expandtab
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@ -9,7 +9,6 @@
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.equ SRR_MAPPED, (1 << 0)
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.equ SRR_READONLY, (1 << 1)
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.equ SRF_EEPROM, (1 << 1)
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.equ POPT_6BTN_PAD, (1 << 5)
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.equ POPT_EN_32X, (1 << 20)
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.text
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@ -67,24 +66,7 @@ m_read8_eeprom:
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PicoRead8_io: @ u32 a, u32 d
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bic r2, r0, #0x001f @ most commonly we get i/o port read,
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cmp r2, #0xa10000 @ so check for it first
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bne m_read8_not_io
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m_read8_misc_io:
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ands r0, r0, #0x1e
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beq m_read8_misc_hwreg
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cmp r0, #4
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movlt r0, #0
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moveq r0, #1
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ble PadRead
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ldr r3, =(Pico+0x22000)
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mov r0, r0, lsr #1 @ other IO ports (Pico.ioports[a])
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ldrb r0, [r3, r0]
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bx lr
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m_read8_misc_hwreg:
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ldr r3, =(Pico+0x22200)
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ldrb r0, [r3, #0x0f] @ Pico.m.hardware
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bx lr
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beq io_ports_read
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m_read8_not_io:
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and r2, r0, #0xfc00
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@ -161,7 +143,7 @@ PicoRead16_io: @ u32 a, u32 d
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cmp r2, #0xa10000 @ so check for it first
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bne m_read16_not_io
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stmfd sp!,{lr}
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bl m_read8_misc_io @ same as read8
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bl io_ports_read @ same as read8
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orr r0, r0, r0, lsl #8 @ only has bytes mirrored
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ldmfd sp!,{pc}
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@ -201,37 +183,7 @@ PicoWrite8_io: @ u32 a, u32 d
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bic r2, r0, #0x1e @ most commonly we get i/o port write,
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eor r2, r2, #0xa10000 @ so check for it first
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eors r2, r2, #1
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bne m_write8_not_io
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m_write8_io:
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ldr r2, =PicoOpt
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and r0, r0, #0x1e
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ldr r2, [r2]
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ldr r3, =(Pico+0x22000) @ Pico.ioports
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tst r2, #POPT_6BTN_PAD
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beq m_write8_io_done
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cmp r0, #2
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cmpne r0, #4
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bne m_write8_io_done @ not likely to happen
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add r2, r3, #0x200 @ Pico+0x22200
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mov r12,#0
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cmp r0, #2
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streqb r12,[r2,#0x18]
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strneb r12,[r2,#0x19] @ Pico.m.padDelay[i] = 0
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tst r1, #0x40 @ TH
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beq m_write8_io_done
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ldrb r12,[r3, r0, lsr #1]
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tst r12,#0x40
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bne m_write8_io_done
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cmp r0, #2
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ldreqb r12,[r2,#0x0a]
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ldrneb r12,[r2,#0x0b] @ Pico.m.padTHPhase
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add r12,r12,#1
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streqb r12,[r2,#0x0a]
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strneb r12,[r2,#0x0b] @ Pico.m.padTHPhase
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m_write8_io_done:
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strb r1, [r3, r0, lsr #1]
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bx lr
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beq io_ports_write
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m_write8_not_io:
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tst r0, #1
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@ -270,7 +222,7 @@ m_write8_not_sreg:
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PicoWrite16_io: @ u32 a, u32 d
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bic r2, r0, #0x1f @ most commonly we get i/o port write,
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cmp r2, #0xa10000 @ so check for it first
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beq m_write8_io
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beq io_ports_write
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m_write16_not_io:
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and r2, r0, #0xff00
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@ -70,6 +70,9 @@ void PicoPower(void)
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Pico.video.pending_ints=0;
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z80_reset();
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// my MD1 VA6 console has this in IO
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Pico.ioports[1] = Pico.ioports[2] = Pico.ioports[3] = 0xff;
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// default VDP register values (based on Fusion)
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Pico.video.reg[0] = Pico.video.reg[1] = 0x04;
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Pico.video.reg[0xc] = 0x81;
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10
pico/pico.h
10
pico/pico.h
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@ -52,7 +52,7 @@ extern void *p32x_bios_g, *p32x_bios_m, *p32x_bios_s;
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#define POPT_EN_Z80 (1<< 2)
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#define POPT_EN_STEREO (1<< 3)
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#define POPT_ALT_RENDERER (1<< 4) // 00 00x0
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#define POPT_6BTN_PAD (1<< 5)
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// unused (1<< 5)
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// unused (1<< 6)
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#define POPT_ACC_SPRITES (1<< 7)
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#define POPT_DIS_32C_BORDER (1<< 8) // 00 0x00
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@ -248,6 +248,14 @@ int PicoCdCheck(const char *fname_in, int *pregion);
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extern unsigned char media_id_header[0x100];
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// memory.c
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enum input_device {
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PICO_INPUT_NOTHING,
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PICO_INPUT_PAD_3BTN,
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PICO_INPUT_PAD_6BTN,
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};
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void PicoSetInputDevice(int port, enum input_device device);
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#ifdef __cplusplus
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} // End of extern "C"
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#endif
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@ -14,11 +14,10 @@
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#define CYCLES_S68K_ASD 241
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// pad delay (for 6 button pads)
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#define PAD_DELAY \
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if (PicoOpt&POPT_6BTN_PAD) { \
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if(Pico.m.padDelay[0]++ > 25) Pico.m.padTHPhase[0]=0; \
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if(Pico.m.padDelay[1]++ > 25) Pico.m.padTHPhase[1]=0; \
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}
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#define PAD_DELAY() { \
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if(Pico.m.padDelay[0]++ > 25) Pico.m.padTHPhase[0]=0; \
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if(Pico.m.padDelay[1]++ > 25) Pico.m.padTHPhase[1]=0; \
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}
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// CPUS_RUN
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#ifndef CPUS_RUN
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@ -114,7 +113,7 @@ static int PicoFrameHints(void)
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Pico.video.status|=0x200;
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}
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PAD_DELAY
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PAD_DELAY();
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#ifdef PICO_CD
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check_cd_dma();
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#endif
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@ -187,7 +186,7 @@ static int PicoFrameHints(void)
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Pico.video.status|=0x200;
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memcpy(PicoPadInt, PicoPad, sizeof(PicoPadInt));
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PAD_DELAY
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PAD_DELAY();
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#ifdef PICO_CD
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check_cd_dma();
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#endif
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@ -257,7 +256,7 @@ static int PicoFrameHints(void)
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pv->v_counter = (pv->v_counter << 1) | 1;
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pv->v_counter &= 0xff;
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PAD_DELAY
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PAD_DELAY();
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#ifdef PICO_CD
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check_cd_dma();
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#endif
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@ -598,7 +598,6 @@ unsigned int PicoRead8_io(unsigned int a);
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unsigned int PicoRead16_io(unsigned int a);
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void PicoWrite8_io(unsigned int a, unsigned int d);
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void PicoWrite16_io(unsigned int a, unsigned int d);
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void p32x_dreq1_trigger(void);
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// pico/memory.c
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PICO_INTERNAL void PicoMemSetupPico(void);
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