mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
32x drc functional on ARM, random adjustments
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@824 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz
parent
274f95a9a9
commit
553c3eaa3a
12 changed files with 86 additions and 63 deletions
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@ -10,6 +10,7 @@
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do { \
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*(u32 *)ptr = x; \
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ptr = (void *)((u8 *)ptr + sizeof(u32)); \
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COUNT_OP; \
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} while (0)
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#define EMIT(x) EMIT_PTR(tcache_ptr, x)
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@ -170,29 +171,26 @@
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static void emith_op_imm(int cond, int op, int r, unsigned int imm)
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{
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u32 v, ror2;
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int ror2, rn = r;
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u32 v;
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if (imm == 0 && op != A_OP_MOV)
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if (op == A_OP_MOV)
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rn = 0;
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else if (imm == 0)
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return;
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/* shift down to get starting rot2 */
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for (v = imm, ror2 = 0; v && !(v & 3); v >>= 2)
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ror2++;
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ror2 = 16 - ror2;
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for (v = imm, ror2 = 0; v != 0 || op == A_OP_MOV; v >>= 8, ror2 -= 8/2) {
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/* shift down to get 'best' rot2 */
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for (; v && !(v & 3); v >>= 2)
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ror2--;
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EOP_C_DOP_IMM(cond, op, 0, op == A_OP_MOV ? 0 : r, r, ror2 & 0x0f, v & 0xff);
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if (op == A_OP_MOV)
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op = A_OP_ORR;
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EOP_C_DOP_IMM(cond, op, 0, rn, r, ror2 & 0x0f, v & 0xff);
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v >>= 8;
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if (v & 0xff)
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EOP_C_DOP_IMM(cond, op, 0, r, r, (ror2 - 8/2) & 0x0f, v & 0xff);
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v >>= 8;
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if (v & 0xff)
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EOP_C_DOP_IMM(cond, op, 0, r, r, (ror2 - 16/2) & 0x0f, v & 0xff);
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v >>= 8;
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if (v & 0xff)
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EOP_C_DOP_IMM(cond, op, 0, r, r, (ror2 - 24/2) & 0x0f, v & 0xff);
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if (op == A_OP_MOV) {
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op = A_OP_ORR;
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rn = r;
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}
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}
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}
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#define is_offset_24(val) \
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@ -227,14 +225,6 @@ static int emith_xbranch(int cond, void *target, int is_call)
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return (u32 *)tcache_ptr - start_ptr;
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}
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static void handle_caches(void)
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{
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#ifdef ARM
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extern void cache_flush_d_inval_i(const void *start_addr, const void *end_addr);
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cache_flush_d_inval_i(tcache, tcache_ptr);
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#endif
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}
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#define EMITH_CONDITIONAL(code, is_nonzero) { \
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u32 val, cond, *ptr; \
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@ -1,12 +1,5 @@
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#include <stdarg.h>
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#if (DRC_DEBUG & 1)
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#define COUNT_OP \
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host_insn_count++
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#else
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#define COUNT_OP
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#endif
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enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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#define CONTEXT_REG xBP
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@ -14,16 +14,22 @@
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#define DRC_DEBUG 0
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#endif
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#if DRC_DEBUG
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#define dbg(l,...) { \
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if ((l) & DRC_DEBUG) \
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elprintf(EL_STATUS, ##__VA_ARGS__); \
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}
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#if DRC_DEBUG
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#include "mame/sh2dasm.h"
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#include <platform/linux/host_dasm.h>
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static int insns_compiled, hash_collisions, host_insn_count;
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#define COUNT_OP \
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host_insn_count++
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#else // !DRC_DEBUG
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#define COUNT_OP
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#define dbg(...)
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#endif
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#if (DRC_DEBUG & 2)
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static u8 *tcache_dsm_ptrs[3];
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static char sh2dasm_buff[64];
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@ -111,12 +117,12 @@ extern void sh2_drc_entry(SH2 *sh2, void *block);
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extern void sh2_drc_exit(void);
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// tmp
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extern void __attribute__((regparm(2))) sh2_do_op(SH2 *sh2, int opcode);
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static void __attribute__((regparm(1))) sh2_test_irq(SH2 *sh2);
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extern void REGPARM(2) sh2_do_op(SH2 *sh2, int opcode);
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static void REGPARM(1) sh2_test_irq(SH2 *sh2);
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static void flush_tcache(int tcid)
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{
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printf("tcache #%d flush! (%d/%d, bds %d/%d)\n", tcid,
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dbg(1, "tcache #%d flush! (%d/%d, bds %d/%d)", tcid,
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tcache_ptrs[tcid] - tcache_bases[tcid], tcache_sizes[tcid],
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block_counts[tcid], block_max_counts[tcid]);
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@ -469,6 +475,10 @@ end_block:
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emith_jump(sh2_drc_exit);
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tcache_ptrs[tcache_id] = tcache_ptr;
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#ifdef ARM
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cache_flush_d_inval_i(block_entry, tcache_ptr);
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#endif
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do_host_disasm(tcache_id);
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dbg(1, " block #%d,%d tcache %d/%d, insns %d -> %d %.3f",
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tcache_id, block_counts[tcache_id],
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@ -476,6 +486,10 @@ end_block:
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insns_compiled, host_insn_count, (double)host_insn_count / insns_compiled);
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if ((sh2->pc & 0xc6000000) == 0x02000000) // ROM
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dbg(1, " hash collisions %d/%d", hash_collisions, block_counts[tcache_id]);
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#if (DRC_DEBUG & 2)
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fflush(stdout);
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#endif
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return block_entry;
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/*
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unimplemented:
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@ -592,7 +606,7 @@ void sh2_execute(SH2 *sh2, int cycles)
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sh2->cycles_done += cycles - ((signed int)sh2->sr >> 12);
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}
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static void __attribute__((regparm(1))) sh2_test_irq(SH2 *sh2)
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static void REGPARM(1) sh2_test_irq(SH2 *sh2)
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{
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if (sh2->pending_level > ((sh2->sr >> 4) & 0x0f))
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{
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@ -634,9 +648,23 @@ static void block_stats(void)
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(double)maxb->refcount / total * 100.0);
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maxb->refcount = 0;
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}
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for (b = 0; b < ARRAY_SIZE(block_tables); b++)
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for (i = 0; i < block_counts[b]; i++)
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block_tables[b][i].refcount = 0;
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}
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#else
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#define block_stats()
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#endif
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void sh2_drc_flush_all(void)
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{
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block_stats();
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flush_tcache(0);
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flush_tcache(1);
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flush_tcache(2);
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}
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int sh2_drc_init(SH2 *sh2)
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{
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if (block_tables[0] == NULL) {
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@ -657,6 +685,9 @@ int sh2_drc_init(SH2 *sh2)
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tcache_bases[i] = tcache_ptrs[i] = tcache_bases[i - 1] + tcache_sizes[i - 1];
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}
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// tmp
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PicoOpt |= POPT_DIS_VDP_FIFO;
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#if (DRC_DEBUG & 2)
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for (i = 0; i < ARRAY_SIZE(block_tables); i++)
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tcache_dsm_ptrs[i] = tcache_bases[i];
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@ -678,9 +709,7 @@ int sh2_drc_init(SH2 *sh2)
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void sh2_drc_finish(SH2 *sh2)
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{
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if (block_tables[0] != NULL) {
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#if (DRC_DEBUG & 1)
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block_stats();
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#endif
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free(block_tables[0]);
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memset(block_tables, 0, sizeof(block_tables));
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@ -104,8 +104,14 @@ void sh2_execute(SH2 *sh2_, int cycles)
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#else // DRC_TMP
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#ifdef __i386__
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#define REGPARM(x) __attribute__((regparm(x)))
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#else
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#define REGPARM(x)
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#endif
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// tmp
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void __attribute__((regparm(2))) sh2_do_op(SH2 *sh2_, int opcode)
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void REGPARM(2) sh2_do_op(SH2 *sh2_, int opcode)
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{
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sh2 = sh2_;
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sh2->pc += 2;
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@ -735,7 +735,7 @@ static void PicoWrite8_32x_on(u32 a, u32 d)
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static void PicoWrite16_32x_on(u32 a, u32 d)
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{
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if ((a & 0xfc00) == 0x5000)
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elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
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elprintf(EL_32X, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
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if ((a & 0xffc0) == 0x5100) { // a15100
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p32x_reg_write16(a, d);
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@ -35,6 +35,7 @@ void ssp_drc_next_patch(void){}
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void ssp_drc_end(void){}
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#endif
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#define COUNT_OP
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#include "../../../cpu/drc/emit_arm.c"
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// -----------------------------------------------------
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@ -1787,7 +1788,9 @@ void *ssp_translate_block(int pc)
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exit(0);
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#endif
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handle_caches();
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#ifdef ARM
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cache_flush_d_inval_i(tcache, tcache_ptr);
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#endif
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return block_start;
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}
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@ -957,7 +957,7 @@ static int ym2612_write_local(u32 a, u32 d, int is_from_z80)
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if (xcycles >= timer_b_next_oflow) \
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ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2
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static u32 MEMH_FUNC ym2612_read_local_z80(void)
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static u32 ym2612_read_local_z80(void)
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{
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int xcycles = z80_cyclesDone() << 8;
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@ -1055,14 +1055,14 @@ void ym2612_unpack_state(void)
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// -----------------------------------------------------------------
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// z80 memhandlers
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static unsigned char MEMH_FUNC z80_md_vdp_read(unsigned short a)
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static unsigned char z80_md_vdp_read(unsigned short a)
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{
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// TODO?
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elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);
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return 0xff;
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}
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static unsigned char MEMH_FUNC z80_md_bank_read(unsigned short a)
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static unsigned char z80_md_bank_read(unsigned short a)
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{
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unsigned int addr68k;
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unsigned char ret;
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@ -1076,13 +1076,13 @@ static unsigned char MEMH_FUNC z80_md_bank_read(unsigned short a)
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return ret;
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}
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static void MEMH_FUNC z80_md_ym2612_write(unsigned int a, unsigned char data)
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static void z80_md_ym2612_write(unsigned int a, unsigned char data)
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{
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if (PicoOpt & POPT_EN_FM)
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emustatus |= ym2612_write_local(a, data, 1) & 1;
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}
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static void MEMH_FUNC z80_md_vdp_br_write(unsigned int a, unsigned char data)
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static void z80_md_vdp_br_write(unsigned int a, unsigned char data)
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{
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// TODO: allow full VDP access
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if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17
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@ -1103,7 +1103,7 @@ static void MEMH_FUNC z80_md_vdp_br_write(unsigned int a, unsigned char data)
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elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);
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}
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static void MEMH_FUNC z80_md_bank_write(unsigned int a, unsigned char data)
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static void z80_md_bank_write(unsigned int a, unsigned char data)
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{
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unsigned int addr68k;
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@ -789,10 +789,10 @@ extern void lprintf(const char *fmt, ...);
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#define cdprintf(x...)
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#endif
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#if defined(__GNUC__) && __GNUC__ >= 4 && __GNUC_MINOR__ >= 3
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#define MEMH_FUNC __attribute__((aligned(4)))
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#ifdef __i386__
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#define REGPARM(x) __attribute__((regparm(x)))
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#else
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#define MEMH_FUNC
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#define REGPARM(x)
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#endif
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#ifdef __GNUC__
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@ -169,7 +169,7 @@ static void write_bank(unsigned short a, unsigned char d)
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}
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}
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static void MEMH_FUNC xwrite(unsigned int a, unsigned char d)
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static void xwrite(unsigned int a, unsigned char d)
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{
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elprintf(EL_IO, "z80 write [%04x] %02x", a, d);
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if (a >= 0xc000)
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@ -15,14 +15,15 @@ amalgamate = 0
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use_sh2drc = 1
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drc_debug = 1
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-include Makefile.local
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ifeq "$(debug_cyclone)" "1"
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use_cyclone = 1
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use_musashi = 1
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endif
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ifeq "$(use_musashi)" "1"
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# due to CPU stop flag acces
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asm_cdpico = 0
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asm_memory = 0
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asm_cdmemory = 0
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else
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use_cyclone = 1
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@ -119,8 +120,8 @@ DEFINES += DRC_SH2 DRC_TMP
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OBJS += cpu/sh2/mame/sh2pico.o
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OBJS += cpu/sh2/compiler.o
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OBJS += cpu/sh2/stub_arm.o
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ifeq "$(drc_debug)" "1"
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DEFINES += DRC_DEBUG=1
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ifdef drc_debug
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DEFINES += DRC_DEBUG=$(drc_debug)
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OBJS += cpu/sh2/mame/sh2dasm.o
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OBJS += platform/linux/host_dasm.o
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LDFLAGS += -lbfd -lopcodes -liberty
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@ -22,13 +22,13 @@ CFLAGS += -ggdb -Wall -falign-functions=2
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endif
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DEFINES = _UNZIP_SUPPORT IO_STATS IN_EVDEV
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CFLAGS += -I../.. -I.
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LDFLAGS += -lpthread
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LDFLAGS += -lm -lpng
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ifeq "$(ARCH)" "arm"
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CFLAGS += -mcpu=arm920t
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DEFINES += ARM
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else
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LDFLAGS += -lX11
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endif
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LDFLAGS += -lpthread
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LDFLAGS += -lX11
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CC = $(CROSS)gcc
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@ -95,8 +95,8 @@ DEFINES += DRC_SH2 DRC_TMP
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OBJS += cpu/sh2/mame/sh2pico.o
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OBJS += cpu/sh2/compiler.o
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OBJS += cpu/sh2/stub_$(ARCH).o
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ifeq "$(drc_debug)" "1"
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DEFINES += DRC_DEBUG=1
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ifdef drc_debug
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DEFINES += DRC_DEBUG=$(drc_debug)
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OBJS += cpu/sh2/mame/sh2dasm.o
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OBJS += host_dasm.o
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LDFLAGS += -lbfd -lopcodes -liberty
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@ -132,7 +132,7 @@ tidy:
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PicoDrive : $(OBJS)
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@echo ">>>" $@
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$(CC) $(CFLAGS) $^ $(LDFLAGS) -lm -lpng -Wl,-Map=PicoDrive.map -o $@
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$(CC) $(CFLAGS) $^ $(LDFLAGS) -Wl,-Map=PicoDrive.map -o $@
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mkdirs:
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@mkdir -p $(DIRS)
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@ -37,7 +37,7 @@ remove_useless_symbols (asymbol **symbols, long count)
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{
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asymbol *sym = *in_ptr++;
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if (sym->name == NULL || sym->name[0] == '\0')
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if (sym->name == NULL || sym->name[0] == '\0' || sym->name[0] == '$')
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continue;
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if (sym->flags & (BSF_DEBUGGING | BSF_SECTION_SYM))
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continue;
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@ -53,6 +53,7 @@ remove_useless_symbols (asymbol **symbols, long count)
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*/
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*out_ptr++ = sym;
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}
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return out_ptr - symbols;
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}
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