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core vdp, fix out-of-bounds vram access for save/load

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kub 2022-05-09 21:45:59 +02:00
parent 7c16d1357b
commit 56e0b86559
1 changed files with 3 additions and 2 deletions
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5
pico/videoport.c
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@ -1105,8 +1105,9 @@ void PicoVideoCacheSAT(int load)
// rebuild SAT cache XXX wrong since cache and memory can differ
for (l = 0; load && l < 80; l++) {
((u16 *)VdpSATCache)[l*2 ] = PicoMem.vram[(SATaddr>>1) + l*4 ];
((u16 *)VdpSATCache)[l*2 + 1] = PicoMem.vram[(SATaddr>>1) + l*4 + 1];
u16 addr = SATaddr + l*8;
((u16 *)VdpSATCache)[l*2 ] = PicoMem.vram[(addr>>1) ];
((u16 *)VdpSATCache)[l*2 + 1] = PicoMem.vram[(addr>>1) + 1];
}
Pico.est.rendstatus |= PDRAW_SPRITES_MOVED;