mirror of
https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
svp: some ARM code translation, as calls, broken
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@358 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz
parent
892b1dd258
commit
5c129565f0
5 changed files with 201 additions and 187 deletions
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@ -17,16 +17,15 @@ static int iram_context = 0;
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#define ssp1601_reset ssp1601_reset_local
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#define ssp1601_run ssp1601_run_local
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static unsigned int interp_get_pc(void);
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#define GET_PC interp_get_pc
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#define GET_PPC_OFFS() (interp_get_pc()*2 - 2)
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#define GET_PC() rPC
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#define GET_PPC_OFFS() (GET_PC()*2 - 2)
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#define SET_PC(d) { had_jump = 1; rPC = d; } /* must return to dispatcher after this */
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//#define GET_PC() (PC - (unsigned short *)svp->iram_rom)
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//#define GET_PPC_OFFS() ((unsigned int)PC - (unsigned int)svp->iram_rom - 2)
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//#define SET_PC(d) PC = (unsigned short *)svp->iram_rom + d
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#include "ssp16.c"
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#include "gen_arm.c"
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// -----------------------------------------------------
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@ -34,6 +33,7 @@ static unsigned int interp_get_pc(void);
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static void op00(unsigned int op, unsigned int imm)
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{
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unsigned int tmpv;
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PC = ((unsigned short *)&op) + 1; /* FIXME: needed for interpreter */
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if (op == 0) return; // nop
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if (op == ((SSP_A<<4)|SSP_P)) { // A <- P
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// not sure. MAME claims that only hi word is transfered.
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@ -487,91 +487,6 @@ static in_func *in_funcs[0x80] =
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// -----------------------------------------------------
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static unsigned int crctable[256] =
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{
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0x00000000L, 0x77073096L, 0xEE0E612CL, 0x990951BAL,
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0x076DC419L, 0x706AF48FL, 0xE963A535L, 0x9E6495A3L,
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0x0EDB8832L, 0x79DCB8A4L, 0xE0D5E91EL, 0x97D2D988L,
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0x09B64C2BL, 0x7EB17CBDL, 0xE7B82D07L, 0x90BF1D91L,
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0x1DB71064L, 0x6AB020F2L, 0xF3B97148L, 0x84BE41DEL,
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0x1ADAD47DL, 0x6DDDE4EBL, 0xF4D4B551L, 0x83D385C7L,
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0x136C9856L, 0x646BA8C0L, 0xFD62F97AL, 0x8A65C9ECL,
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0x14015C4FL, 0x63066CD9L, 0xFA0F3D63L, 0x8D080DF5L,
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0x3B6E20C8L, 0x4C69105EL, 0xD56041E4L, 0xA2677172L,
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0x3C03E4D1L, 0x4B04D447L, 0xD20D85FDL, 0xA50AB56BL,
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0x35B5A8FAL, 0x42B2986CL, 0xDBBBC9D6L, 0xACBCF940L,
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0x32D86CE3L, 0x45DF5C75L, 0xDCD60DCFL, 0xABD13D59L,
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0x26D930ACL, 0x51DE003AL, 0xC8D75180L, 0xBFD06116L,
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0x21B4F4B5L, 0x56B3C423L, 0xCFBA9599L, 0xB8BDA50FL,
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0x2802B89EL, 0x5F058808L, 0xC60CD9B2L, 0xB10BE924L,
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0x2F6F7C87L, 0x58684C11L, 0xC1611DABL, 0xB6662D3DL,
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0x76DC4190L, 0x01DB7106L, 0x98D220BCL, 0xEFD5102AL,
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0x71B18589L, 0x06B6B51FL, 0x9FBFE4A5L, 0xE8B8D433L,
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0x7807C9A2L, 0x0F00F934L, 0x9609A88EL, 0xE10E9818L,
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0x7F6A0DBBL, 0x086D3D2DL, 0x91646C97L, 0xE6635C01L,
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0x6B6B51F4L, 0x1C6C6162L, 0x856530D8L, 0xF262004EL,
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0x6C0695EDL, 0x1B01A57BL, 0x8208F4C1L, 0xF50FC457L,
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0x65B0D9C6L, 0x12B7E950L, 0x8BBEB8EAL, 0xFCB9887CL,
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0x62DD1DDFL, 0x15DA2D49L, 0x8CD37CF3L, 0xFBD44C65L,
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0x4DB26158L, 0x3AB551CEL, 0xA3BC0074L, 0xD4BB30E2L,
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0x4ADFA541L, 0x3DD895D7L, 0xA4D1C46DL, 0xD3D6F4FBL,
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0x4369E96AL, 0x346ED9FCL, 0xAD678846L, 0xDA60B8D0L,
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0x44042D73L, 0x33031DE5L, 0xAA0A4C5FL, 0xDD0D7CC9L,
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0x5005713CL, 0x270241AAL, 0xBE0B1010L, 0xC90C2086L,
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0x5768B525L, 0x206F85B3L, 0xB966D409L, 0xCE61E49FL,
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0x5EDEF90EL, 0x29D9C998L, 0xB0D09822L, 0xC7D7A8B4L,
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0x59B33D17L, 0x2EB40D81L, 0xB7BD5C3BL, 0xC0BA6CADL,
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0xEDB88320L, 0x9ABFB3B6L, 0x03B6E20CL, 0x74B1D29AL,
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0xEAD54739L, 0x9DD277AFL, 0x04DB2615L, 0x73DC1683L,
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0xE3630B12L, 0x94643B84L, 0x0D6D6A3EL, 0x7A6A5AA8L,
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0xE40ECF0BL, 0x9309FF9DL, 0x0A00AE27L, 0x7D079EB1L,
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0xF00F9344L, 0x8708A3D2L, 0x1E01F268L, 0x6906C2FEL,
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0xF762575DL, 0x806567CBL, 0x196C3671L, 0x6E6B06E7L,
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0xFED41B76L, 0x89D32BE0L, 0x10DA7A5AL, 0x67DD4ACCL,
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0xF9B9DF6FL, 0x8EBEEFF9L, 0x17B7BE43L, 0x60B08ED5L,
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0xD6D6A3E8L, 0xA1D1937EL, 0x38D8C2C4L, 0x4FDFF252L,
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0xD1BB67F1L, 0xA6BC5767L, 0x3FB506DDL, 0x48B2364BL,
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0xD80D2BDAL, 0xAF0A1B4CL, 0x36034AF6L, 0x41047A60L,
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0xDF60EFC3L, 0xA867DF55L, 0x316E8EEFL, 0x4669BE79L,
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0xCB61B38CL, 0xBC66831AL, 0x256FD2A0L, 0x5268E236L,
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0xCC0C7795L, 0xBB0B4703L, 0x220216B9L, 0x5505262FL,
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0xC5BA3BBEL, 0xB2BD0B28L, 0x2BB45A92L, 0x5CB36A04L,
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0xC2D7FFA7L, 0xB5D0CF31L, 0x2CD99E8BL, 0x5BDEAE1DL,
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0x9B64C2B0L, 0xEC63F226L, 0x756AA39CL, 0x026D930AL,
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0x9C0906A9L, 0xEB0E363FL, 0x72076785L, 0x05005713L,
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0x95BF4A82L, 0xE2B87A14L, 0x7BB12BAEL, 0x0CB61B38L,
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0x92D28E9BL, 0xE5D5BE0DL, 0x7CDCEFB7L, 0x0BDBDF21L,
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0x86D3D2D4L, 0xF1D4E242L, 0x68DDB3F8L, 0x1FDA836EL,
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0x81BE16CDL, 0xF6B9265BL, 0x6FB077E1L, 0x18B74777L,
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0x88085AE6L, 0xFF0F6A70L, 0x66063BCAL, 0x11010B5CL,
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0x8F659EFFL, 0xF862AE69L, 0x616BFFD3L, 0x166CCF45L,
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0xA00AE278L, 0xD70DD2EEL, 0x4E048354L, 0x3903B3C2L,
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0xA7672661L, 0xD06016F7L, 0x4969474DL, 0x3E6E77DBL,
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0xAED16A4AL, 0xD9D65ADCL, 0x40DF0B66L, 0x37D83BF0L,
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0xA9BCAE53L, 0xDEBB9EC5L, 0x47B2CF7FL, 0x30B5FFE9L,
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0xBDBDF21CL, 0xCABAC28AL, 0x53B39330L, 0x24B4A3A6L,
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0xBAD03605L, 0xCDD70693L, 0x54DE5729L, 0x23D967BFL,
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0xB3667A2EL, 0xC4614AB8L, 0x5D681B02L, 0x2A6F2B94L,
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0xB40BBE37L, 0xC30C8EA1L, 0x5A05DF1BL, 0x2D02EF8DL
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};
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static u32 chksum_crc32 (unsigned char *block, unsigned int length)
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{
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register u32 crc;
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unsigned long i;
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crc = 0xFFFFFFFF;
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for (i = 0; i < length; i++)
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{
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crc = ((crc >> 8) & 0x00FFFFFF) ^ crctable[(crc ^ *block++) & 0xFF];
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}
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return (crc ^ 0xFFFFFFFF);
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}
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//static int iram_crcs[32] = { 0, };
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// -----------------------------------------------------
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static unsigned char iram_context_map[] =
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{
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0, 0, 0, 0, 1, 0, 0, 0, // 04
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@ -584,81 +499,37 @@ static unsigned char iram_context_map[] =
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13,14, 0, 0, 0, 0, 0, 0 // 38 39
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};
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static unsigned int checksums[] =
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{
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0,
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0xfa9ddfb2,
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0x229c80b6,
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0x3af0c3d3,
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0x98fc4552,
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0x5ecacdbc,
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0xa6931962,
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0x53930b10,
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0x69524552,
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0xcb1ccdaf,
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0x995068c7,
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0x48b97f4d,
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0xe8c61b74,
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0xafa2e81a,
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0x4e3e071a
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};
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static int get_iram_context(void)
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{
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unsigned char *ir = (unsigned char *)svp->iram_rom;
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int val1, val = ir[0x083^1] + ir[0x4FA^1] + ir[0x5F7^1] + ir[0x47B^1];
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int crc = chksum_crc32(svp->iram_rom, 0x800);
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val1 = iram_context_map[(val>>1)&0x3f];
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if (crc != checksums[val1] || val1 == 0) {
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if (val1 == 0) {
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printf("val: %02x PC=%04x\n", (val>>1)&0x3f, rPC);
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elprintf(EL_ANOMALY, "bad crc: %08x vs %08x", crc, checksums[val1]);
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//debug_dump2file(name, svp->iram_rom, 0x800);
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exit(1);
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}
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elprintf(EL_ANOMALY, "iram_context: %02i", val1);
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// elprintf(EL_ANOMALY, "iram_context: %02i", val1);
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return val1;
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}
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#define PROGRAM(x) ((unsigned short *)svp->iram_rom)[x]
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static u32 interp_get_pc(void)
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{
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#if 0
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unsigned short *pc1 = PC;
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int i;
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while (pc1[-1] != 0xfe01) pc1--; // goto current block start
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if (rPC >= 0x800/2)
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{
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for (i = 0; i < 0x5090/2; i++)
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if (block_table[i] == pc1) break;
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if (i == 0x5090/2) goto fail;
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}
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else
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{
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for (i = 0; i < 0x800/2; i++)
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if (block_table_iram[iram_context][i] == pc1) break;
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if (i == 0x800/2) goto fail;
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}
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return i + (PC - pc1);
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fail:
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printf("block not found!\n");
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exit(1);
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#else
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return rPC;
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#endif
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}
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static void *translate_block(int pc)
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{
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unsigned int op, op1, icount = 0;
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void *ret;
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unsigned int *block_start;
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ret = tcache_ptr;
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// create .pool
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*tcache_ptr++ = (u32) &g_cycles; // -3 g_cycles
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*tcache_ptr++ = (u32) &ssp->gr[SSP_PC].v; // -2 ptr to rPC
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*tcache_ptr++ = (u32) in_funcs; // -1 func pool
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block_start = tcache_ptr;
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emit_block_prologue();
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//printf("translate %04x -> %04x\n", pc<<1, (tcache_ptr-tcache)<<1);
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for (;;)
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@ -666,25 +537,32 @@ static void *translate_block(int pc)
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icount++;
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op = PROGRAM(pc++);
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op1 = op >> 9;
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emit_mov_const16(0, op);
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// need immediate?
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if ((op1 & 0xf) == 4 || (op1 & 0xf) == 6) {
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op |= PROGRAM(pc++) << 16; // immediate
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emit_mov_const16(1, PROGRAM(pc++)); // immediate
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}
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*tcache_ptr++ = op;
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*tcache_ptr = (unsigned int) in_funcs[op1];
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if (*tcache_ptr == 0) {
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// dump PC
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emit_pc_inc(block_start, pc);
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emit_call(block_start, op1);
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if (in_funcs[op1] == NULL) {
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printf("NULL func! op=%08x (%02x)\n", op, op1);
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exit(1);
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}
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tcache_ptr++;
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if (op1 == 0x24 || op1 == 0x26 || // call, bra
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((op1 == 0 || op1 == 1 || op1 == 4 || op1 == 5 || op1 == 9 || op1 == 0x25) &&
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(op & 0xf0) == 0x60)) { // ld PC
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break;
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}
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}
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*tcache_ptr++ = 0xfe01;
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*tcache_ptr++ = 0xfe01; // end of block
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emit_block_epilogue(block_start, icount + 1);
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*tcache_ptr++ = 0xffffffff; // end of block
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//printf(" %i inst\n", icount);
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if (tcache_ptr - tcache > TCACHE_SIZE/4) {
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@ -698,7 +576,15 @@ static void *translate_block(int pc)
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//if (pc >= 0x400)
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printf("%i blocks, %i bytes\n", nblocks, (tcache_ptr - tcache)*4);
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return ret;
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#if 0
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{
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FILE *f = fopen("tcache.bin", "wb");
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fwrite(tcache, 1, (tcache_ptr - tcache)*4, f);
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fclose(f);
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}
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exit(0);
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#endif
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return block_start;
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}
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@ -708,11 +594,14 @@ static void *translate_block(int pc)
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int ssp1601_dyn_init(void)
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{
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tcache = tcache_ptr = malloc(TCACHE_SIZE);
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if (tcache == NULL) {
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printf("oom\n");
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exit(1);
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}
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memset(tcache, 0, sizeof(TCACHE_SIZE));
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memset(block_table, 0, sizeof(block_table));
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memset(block_table_iram, 0, sizeof(block_table_iram));
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*tcache_ptr++ = 0xfe01;
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*tcache_ptr++ = 0xfe01;
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*tcache_ptr++ = 0xffffffff;
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return 0;
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}
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@ -723,33 +612,23 @@ void ssp1601_dyn_reset(ssp1601_t *ssp)
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ssp1601_reset_local(ssp);
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}
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static void ssp1601_run2(unsigned int *iPC)
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static void handle_caches()
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{
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in_func *func;
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unsigned int op, op1, imm;
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while (*iPC != 0xfe01)
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{
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rPC++;
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op = *iPC & 0xffff;
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imm = *iPC++ >> 16;
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op1 = op >> 9;
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if ((op1 & 0xf) == 4 || (op1 & 0xf) == 6) rPC++;
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PC = ((unsigned short *)&op) + 1; /* needed for interpreter */
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func = (in_func *) *iPC++;
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func(op, imm);
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g_cycles--;
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#ifdef ARM
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extern void flush_inval_dcache(const void *start_addr, const void *end_addr);
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extern void flush_inval_icache(const void *start_addr, const void *end_addr);
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flush_inval_dcache(tcache, tcache_ptr);
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flush_inval_icache(tcache, tcache_ptr);
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#else
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#error wth
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#endif
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}
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}
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void ssp1601_dyn_run(int cycles)
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{
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while (cycles > 0)
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{
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unsigned int *iPC;
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//int pc_old = rPC;
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void (*trans_entry)(void);
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if (rPC < 0x800/2)
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{
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if (iram_dirty) {
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@ -758,21 +637,22 @@ void ssp1601_dyn_run(int cycles)
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}
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if (block_table_iram[iram_context][rPC] == NULL)
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block_table_iram[iram_context][rPC] = translate_block(rPC);
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iPC = block_table_iram[iram_context][rPC];
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trans_entry = (void *) block_table_iram[iram_context][rPC];
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}
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else
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{
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if (block_table[rPC] == NULL)
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block_table[rPC] = translate_block(rPC);
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iPC = block_table[rPC];
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trans_entry = (void *) block_table[rPC];
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}
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had_jump = 0;
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//printf("enter @ %04x, PC=%04x\n", (PC - tcache)<<1, rPC<<1);
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g_cycles = 0;
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ssp1601_run2(iPC);
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cycles += g_cycles;
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handle_caches();
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trans_entry();
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cycles -= g_cycles;
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/*
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if (!had_jump) {
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// no jumps
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103
Pico/carthw/svp/gen_arm.c
Normal file
103
Pico/carthw/svp/gen_arm.c
Normal file
|
|
@ -0,0 +1,103 @@
|
|||
#define EMIT(x) *tcache_ptr++ = x
|
||||
|
||||
#define A_R14M (1 << 14)
|
||||
|
||||
#define A_COND_AL 0xe
|
||||
|
||||
/* addressing mode 1 */
|
||||
#define A_AM1_LSL 0
|
||||
#define A_AM1_LSR 1
|
||||
#define A_AM1_ASR 2
|
||||
#define A_AM1_ROR 3
|
||||
|
||||
#define A_AM1_IMM(ror2,imm8) (((ror2)<<8) | (imm8) | 0x02000000)
|
||||
#define A_AM1_REG_XIMM(shift_imm,shift_op,rm) (((shift_imm)<<7) | ((shift_op)<<5) | (rm))
|
||||
|
||||
/* data processing op */
|
||||
#define A_OP_ORR 0xc
|
||||
#define A_OP_MOV 0xd
|
||||
|
||||
#define EOP_C_DOP_X(cond,op,s,rn,rd,shifter_op) \
|
||||
EMIT(((cond)<<28) | ((op)<< 21) | ((s)<<20) | ((rn)<<16) | ((rd)<<12) | (shifter_op))
|
||||
|
||||
#define EOP_C_DOP_IMM(cond,op,s,rn,rd,ror2,imm8) EOP_C_DOP_X(cond,op,s,rn,rd,A_AM1_IMM(ror2,imm8))
|
||||
#define EOP_C_DOP_REG(cond,op,s,rn,rd,shift_imm,shift_op,rm) EOP_C_DOP_X(cond,op,s,rn,rd,A_AM1_REG_XIMM(shift_imm,shift_op,rm))
|
||||
|
||||
#define EOP_MOV_IMM(s, rd,ror2,imm8) EOP_C_DOP_IMM(A_COND_AL,A_OP_MOV,s, 0,rd,ror2,imm8)
|
||||
#define EOP_ORR_IMM(s,rn,rd,ror2,imm8) EOP_C_DOP_IMM(A_COND_AL,A_OP_ORR,s,rn,rd,ror2,imm8)
|
||||
|
||||
#define EOP_MOV_REG(s, rd,shift_imm,shift_op,rm) EOP_C_DOP_REG(A_COND_AL,A_OP_MOV,s, 0,rd,shift_imm,shift_op,rm)
|
||||
|
||||
#define EOP_MOV_REG_SIMPLE(rd,rm) EOP_MOV_REG(0,rd,0,A_AM1_LSL,rm)
|
||||
|
||||
/* ldr and str */
|
||||
#define EOP_C_XXR_IMM(cond,u,b,l,rn,rd,offset_12) \
|
||||
EMIT(((cond)<<28) | 0x05000000 | ((u)<<23) | ((b)<<22) | ((l)<<20) | ((rn)<<16) | ((rd)<<12) | (offset_12))
|
||||
|
||||
#define EOP_LDR_IMM( rd,rn,offset_12) EOP_C_XXR_IMM(A_COND_AL,1,0,1,rn,rd,offset_12)
|
||||
#define EOP_LDR_NEGIMM(rd,rn,offset_12) EOP_C_XXR_IMM(A_COND_AL,0,0,1,rn,rd,offset_12)
|
||||
#define EOP_LDR_SIMPLE(rd,rn) EOP_C_XXR_IMM(A_COND_AL,1,0,1,rn,rd,0)
|
||||
#define EOP_STR_SIMPLE(rd,rn) EOP_C_XXR_IMM(A_COND_AL,1,0,0,rn,rd,0)
|
||||
|
||||
/* ldm and stm */
|
||||
#define EOP_XXM(cond,p,u,s,w,l,rn,list) \
|
||||
EMIT(((cond)<<28) | (1<<27) | ((p)<<24) | ((u)<<23) | ((s)<<22) | ((w)<<21) | ((l)<<20) | ((rn)<<16) | (list))
|
||||
|
||||
#define EOP_STMFD_ST(list) EOP_XXM(A_COND_AL,1,0,0,1,0,13,list)
|
||||
#define EOP_LDMFD_ST(list) EOP_XXM(A_COND_AL,0,1,0,1,1,13,list)
|
||||
|
||||
/* branches */
|
||||
#define EOP_C_BX(cond,rm) \
|
||||
EMIT(((cond)<<28) | 0x012fff10 | (rm))
|
||||
|
||||
#define EOP_BX(rm) EOP_C_BX(A_COND_AL,rm)
|
||||
|
||||
|
||||
static void emit_mov_const16(int d, unsigned int val)
|
||||
{
|
||||
int need_or = 0;
|
||||
if (val & 0xff00) {
|
||||
EOP_MOV_IMM(0, d, 24/2, (val>>8)&0xff);
|
||||
need_or = 1;
|
||||
}
|
||||
if ((val & 0xff) || !need_or)
|
||||
EOP_C_DOP_IMM(A_COND_AL,need_or ? A_OP_ORR : A_OP_MOV, 0, d, d, 0, val&0xff);
|
||||
}
|
||||
|
||||
static void emit_block_prologue(void)
|
||||
{
|
||||
// stack LR
|
||||
EOP_STMFD_ST(A_R14M); // stmfd r13!, {r14}
|
||||
}
|
||||
|
||||
static void emit_block_epilogue(unsigned int *block_start, int icount)
|
||||
{
|
||||
int back = (tcache_ptr - block_start) + 2;
|
||||
back += 3; // g_cycles
|
||||
EOP_LDR_NEGIMM(2,15,back<<2); // ldr r2,[pc,#back]
|
||||
emit_mov_const16(3, icount);
|
||||
EOP_STR_SIMPLE(3,2); // str r3,[r2]
|
||||
|
||||
EOP_LDMFD_ST(A_R14M); // ldmfd r13!, {r14}
|
||||
EOP_BX(14); // bx r14
|
||||
}
|
||||
|
||||
static void emit_pc_inc(unsigned int *block_start, int pc)
|
||||
{
|
||||
int back = (tcache_ptr - block_start) + 2;
|
||||
back += 2; // rPC ptr
|
||||
EOP_LDR_NEGIMM(2,15,back<<2); // ldr r2,[pc,#back]
|
||||
emit_mov_const16(3, pc);
|
||||
EOP_STR_SIMPLE(3,2); // str r3,[r2]
|
||||
}
|
||||
|
||||
static void emit_call(unsigned int *block_start, unsigned int op1)
|
||||
{
|
||||
int back = (tcache_ptr - block_start) + 2;
|
||||
back += 1; // func table
|
||||
EOP_LDR_NEGIMM(2,15,back<<2); // ldr r2,[pc,#back]
|
||||
EOP_MOV_REG_SIMPLE(14,15); // mov lr,pc
|
||||
EOP_LDR_IMM(15,2,op1<<2); // ldr pc,[r2,#op1]
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -26,23 +26,23 @@ typedef union
|
|||
typedef struct
|
||||
{
|
||||
union {
|
||||
unsigned short RAM[256*2]; // 2 internal RAM banks
|
||||
unsigned short RAM[256*2]; // 000 2 internal RAM banks
|
||||
struct {
|
||||
unsigned short RAM0[256];
|
||||
unsigned short RAM1[256];
|
||||
};
|
||||
};
|
||||
ssp_reg_t gr[16]; // general registers
|
||||
ssp_reg_t gr[16]; // 400 general registers
|
||||
union {
|
||||
unsigned char r[8]; // BANK pointers
|
||||
unsigned char r[8]; // 440 BANK pointers
|
||||
struct {
|
||||
unsigned char r0[4];
|
||||
unsigned char r1[4];
|
||||
};
|
||||
};
|
||||
unsigned short stack[6];
|
||||
unsigned int pmac_read[6]; // read modes/addrs for PM0-PM5
|
||||
unsigned int pmac_write[6]; // write ...
|
||||
unsigned short stack[6]; // 448
|
||||
unsigned int pmac_read[6]; // 454 read modes/addrs for PM0-PM5
|
||||
unsigned int pmac_write[6]; // 46c write ...
|
||||
//
|
||||
#define SSP_PMC_HAVE_ADDR 0x0001 // address written to PMAC, waiting for mode
|
||||
#define SSP_PMC_SET 0x0002 // PMAC is set
|
||||
|
|
@ -50,7 +50,7 @@ typedef struct
|
|||
#define SSP_WAIT_30FE06 0x4000 // ssp tight loops on 30FE08 to become non-zero
|
||||
#define SSP_WAIT_30FE08 0x8000 // same for 30FE06
|
||||
#define SSP_WAIT_MASK 0xe000
|
||||
unsigned int emu_status;
|
||||
unsigned int emu_status; // 484
|
||||
unsigned int pad[30];
|
||||
} ssp1601_t;
|
||||
|
||||
|
|
|
|||
28
Pico/carthw/svp/stub_arm.s
Normal file
28
Pico/carthw/svp/stub_arm.s
Normal file
|
|
@ -0,0 +1,28 @@
|
|||
@ vim:filetype=armasm
|
||||
|
||||
|
||||
@ register map:
|
||||
@ r4: XXYY
|
||||
@ r5: A
|
||||
@ r6: STACK and emu flags
|
||||
@ r7: SSP context
|
||||
@ r8: r0-r2
|
||||
@ r9: r4-r6
|
||||
@ r10: P
|
||||
|
||||
.global flush_inval_dcache
|
||||
.global flush_inval_icache
|
||||
|
||||
.text
|
||||
.align 4
|
||||
|
||||
flush_inval_dcache:
|
||||
mov r2, #0x0 @ ??
|
||||
swi 0x9f0002
|
||||
bx lr
|
||||
|
||||
flush_inval_icache:
|
||||
mov r2, #0x1
|
||||
swi 0x9f0002
|
||||
bx lr
|
||||
|
||||
|
|
@ -74,7 +74,8 @@ OBJS += ../../Pico/cd/Pico.o ../../Pico/cd/Memory.o ../../Pico/cd/Sek.o ../../Pi
|
|||
../../Pico/cd/Area.o ../../Pico/cd/Misc.o ../../Pico/cd/pcm.o ../../Pico/cd/buffering.o
|
||||
endif
|
||||
# Pico - carthw
|
||||
OBJS += ../../Pico/carthw/svp/svp.o ../../Pico/carthw/svp/Memory.o ../../Pico/carthw/svp/ssp16.o
|
||||
OBJS += ../../Pico/carthw/svp/svp.o ../../Pico/carthw/svp/Memory.o ../../Pico/carthw/svp/ssp16.o \
|
||||
../../Pico/carthw/svp/compiler.o ../../Pico/carthw/svp/stub_arm.o
|
||||
|
||||
# asm stuff
|
||||
ifeq "$(asm_render)" "1"
|
||||
|
|
@ -159,6 +160,8 @@ up: PicoDrive.gpe
|
|||
@echo ">>>" $<
|
||||
$(GCC) $(COPT) $(DEFINC) -c $< -o $@
|
||||
|
||||
../../Pico/carthw/svp/compiler.o : ../../Pico/carthw/svp/ssp16.o ../../Pico/carthw/svp/gen_arm.c
|
||||
|
||||
../../Pico/draw_asm.o : ../../Pico/Draw.s
|
||||
@echo ">>>" $<
|
||||
$(AS) $(ASOPT) $< -o $@
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue