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https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
32x: poll_detect tweaks, debug unification
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@800 be3aeb3a-fb24-0410-a615-afba39da0efa
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notaz
parent
1d7a28a723
commit
5fadfb1c37
4 changed files with 33 additions and 20 deletions
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@ -105,10 +105,6 @@ static void p32x_start_blank(void)
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static __inline void run_m68k(int cyc)
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{
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if (Pico32x.emu_flags & P32XF_68KPOLL) {
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SekCycleCnt += cyc;
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return;
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}
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#if defined(EMU_C68K)
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PicoCpuCM68k.cycles = cyc;
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CycloneRun(&PicoCpuCM68k);
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@ -158,8 +158,18 @@ static u32 p32x_reg_read16(u32 a)
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if ((a & 0x30) == 0x20)
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return sh2_comm_faker(a);
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#else
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if ((a & 0x30) == 0x20 && p32x_poll_detect(&m68k_poll, a, SekCyclesDoneT(), 0)) {
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SekEndTimeslice(16);
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if ((a & 0x30) == 0x20) {
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// evil X-Men proto polls in a dbra loop and expects it to expire..
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static u32 dr2 = 0;
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if (SekDar(2) != dr2)
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m68k_poll.cnt = 0;
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dr2 = SekDar(2);
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if (p32x_poll_detect(&m68k_poll, a, SekCyclesDoneT(), 0)) {
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SekSetStop(1);
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SekEndTimeslice(16);
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}
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dr2 = SekDar(2);
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}
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#endif
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@ -406,7 +416,8 @@ static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid)
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if ((a & 0x30) == 0x20) {
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u8 *r8 = (u8 *)Pico32x.regs;
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r8[a ^ 1] = d;
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p32x_poll_undetect(&m68k_poll, 0);
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if (p32x_poll_undetect(&m68k_poll, 0))
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SekSetStop(0);
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p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
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return;
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}
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@ -419,7 +430,8 @@ static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid)
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// comm
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if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) {
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Pico32x.regs[a / 2] = d;
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p32x_poll_undetect(&m68k_poll, 0);
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if (p32x_poll_undetect(&m68k_poll, 0))
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SekSetStop(0);
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p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
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return;
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}
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20
pico/debug.c
20
pico/debug.c
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@ -38,19 +38,14 @@ char *PDebugMain(void)
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!!(SRam.flags & SRF_ENABLED), !!(SRam.flags & SRF_EEPROM), SRam.eeprom_type); MVP;
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sprintf(dstrp, "sram range: %06x-%06x, reg: %02x\n", SRam.start, SRam.end, Pico.m.sram_reg); MVP;
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sprintf(dstrp, "pend int: v:%i, h:%i, vdp status: %04x\n", bit(pv->pending_ints,5), bit(pv->pending_ints,4), pv->status); MVP;
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sprintf(dstrp, "pal: %i, hw: %02x, frame#: %i\n", Pico.m.pal, Pico.m.hardware, Pico.m.frame_count); MVP;
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sprintf(dstrp, "pal: %i, hw: %02x, frame#: %i, cycles: %i\n", Pico.m.pal, Pico.m.hardware, Pico.m.frame_count, SekCyclesDoneT()); MVP;
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sprintf(dstrp, "M68k: PC: %06x, SR: %04x, irql: %i\n", SekPc, SekSr, SekIrqLevel); MVP;
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#if defined(EMU_C68K)
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sprintf(dstrp, "M68k: PC: %06x, st_flg: %x, cycles: %u\n", SekPc, PicoCpuCM68k.state_flags, SekCyclesDoneT()); MVP;
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sprintf(dstrp, "d0=%08x, a0=%08x, osp=%08x, irql=%i\n", PicoCpuCM68k.d[0], PicoCpuCM68k.a[0], PicoCpuCM68k.osp, PicoCpuCM68k.irq); MVP;
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sprintf(dstrp, "d1=%08x, a1=%08x, sr=%04x\n", PicoCpuCM68k.d[1], PicoCpuCM68k.a[1], CycloneGetSr(&PicoCpuCM68k)); dstrp+=strlen(dstrp); MVP;
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for(r=2; r < 8; r++) {
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sprintf(dstrp, "d%i=%08x, a%i=%08x\n", r, PicoCpuCM68k.d[r], r, PicoCpuCM68k.a[r]); MVP;
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}
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#elif defined(EMU_M68K)
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sprintf(dstrp, "M68k: PC: %06x, cycles: %u, irql: %i\n", SekPc, SekCyclesDoneT(), PicoCpuMM68k.int_level>>8); MVP;
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#elif defined(EMU_F68K)
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sprintf(dstrp, "M68k: PC: %06x, cycles: %u, irql: %i\n", SekPc, SekCyclesDoneT(), PicoCpuFM68k.interrupts[0]); MVP;
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sprintf(dstrp - 1, ", st_flg: %x\n", PicoCpuCM68k.state_flags); MVP;
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#endif
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for (r = 0; r < 8; r++) {
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sprintf(dstrp, "d%i=%08x, a%i=%08x\n", r, SekDar(r), r, SekDar(r+8)); MVP;
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}
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sprintf(dstrp, "z80Run: %i, z80_reset: %i, z80_bnk: %06x\n", Pico.m.z80Run, Pico.m.z80_reset, Pico.m.z80_bank68k<<15); MVP;
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z80_debug(dstrp); MVP;
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if (strlen(dstr) > sizeof(dstr))
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@ -72,7 +67,8 @@ char *PDebug32x(void)
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i*2, r[i+0], r[i+1], r[i+2], r[i+3], r[i+4], r[i+5], r[i+6], r[i+7]); MVP;
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}
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r = Pico32x.sh2_regs;
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sprintf(dstrp, "SH: %04x %04x %04x IRQs: %02x\n", r[0], r[1], r[2], Pico32x.sh2irqs); MVP;
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sprintf(dstrp, "SH: %04x %04x %04x IRQs: %02x eflags: %02x\n",
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r[0], r[1], r[2], Pico32x.sh2irqs, Pico32x.emu_flags); MVP;
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i = 0;
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r = Pico32x.vdp_regs;
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@ -45,12 +45,15 @@ extern struct Cyclone PicoCpuCM68k, PicoCpuCS68k;
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#define SekEndTimesliceS68k(after) PicoCpuCS68k.cycles=after
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#define SekPc (PicoCpuCM68k.pc-PicoCpuCM68k.membase)
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#define SekPcS68k (PicoCpuCS68k.pc-PicoCpuCS68k.membase)
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#define SekDar(x) PicoCpuCM68k.d[x]
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#define SekSr CycloneGetSr(&PicoCpuCM68k)
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#define SekSetStop(x) { PicoCpuCM68k.state_flags&=~1; if (x) { PicoCpuCM68k.state_flags|=1; PicoCpuCM68k.cycles=0; } }
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#define SekSetStopS68k(x) { PicoCpuCS68k.state_flags&=~1; if (x) { PicoCpuCS68k.state_flags|=1; PicoCpuCS68k.cycles=0; } }
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#define SekIsStoppedS68k() (PicoCpuCS68k.state_flags&1)
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#define SekShouldInterrupt (PicoCpuCM68k.irq > (PicoCpuCM68k.srh&7))
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#define SekInterrupt(i) PicoCpuCM68k.irq=i
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#define SekIrqLevel PicoCpuCM68k.irq
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#ifdef EMU_M68K
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#define EMU_CORE_DEBUG
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@ -69,6 +72,8 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
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#define SekEndTimesliceS68k(after) PicoCpuFS68k.io_cycle_counter=after
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#define SekPc fm68k_get_pc(&PicoCpuFM68k)
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#define SekPcS68k fm68k_get_pc(&PicoCpuFS68k)
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#define SekDar(x) PicoCpuFM68k.dreg[x].D
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#define SekSr PicoCpuFM68k.sr
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#define SekSetStop(x) { \
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PicoCpuFM68k.execinfo &= ~FM68K_HALTED; \
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if (x) { PicoCpuFM68k.execinfo |= FM68K_HALTED; PicoCpuFM68k.io_cycle_counter = 0; } \
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@ -81,6 +86,7 @@ extern M68K_CONTEXT PicoCpuFM68k, PicoCpuFS68k;
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#define SekShouldInterrupt fm68k_would_interrupt()
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#define SekInterrupt(irq) PicoCpuFM68k.interrupts[0]=irq
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#define SekIrqLevel PicoCpuFM68k.interrupts[0]
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#ifdef EMU_M68K
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#define EMU_CORE_DEBUG
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@ -100,6 +106,8 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
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#define SekEndTimesliceS68k(after) PicoCpuMS68k.cyc_remaining_cycles=after
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#define SekPc m68k_get_reg(&PicoCpuMM68k, M68K_REG_PC)
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#define SekPcS68k m68k_get_reg(&PicoCpuMS68k, M68K_REG_PC)
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#define SekDar(x) PicoCpuMM68k.dar[x]
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#define SekSr m68k_get_reg(&PicoCpuMM68k, M68K_REG_SR)
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#define SekSetStop(x) { \
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if(x) { SET_CYCLES(0); PicoCpuMM68k.stopped=STOP_LEVEL_STOP; } \
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else PicoCpuMM68k.stopped=0; \
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@ -117,6 +125,7 @@ extern m68ki_cpu_core PicoCpuMM68k, PicoCpuMS68k;
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m68k_set_irq(irq); \
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m68k_set_context(oldcontext); \
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}
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#define SekIrqLevel (PicoCpuMM68k.int_level >> 8)
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#endif
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#endif // EMU_M68K
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