32x, fix speed regression (wt memory write optimization)

This commit is contained in:
kub 2021-04-02 21:57:08 +02:00
parent bac4eb5136
commit 6138c4df25

View file

@ -1690,18 +1690,23 @@ static void REGPARM(3) sh2_write8_da(u32 a, u32 d, SH2 *sh2)
}
#endif
static void REGPARM(3) sh2_write8_sdram_wt(u32 a, u32 d, SH2 *sh2)
static NOINLINE void REGPARM(3) sh2_write8_sdram_sync(u32 a, u32 d, SH2 *sh2)
{
// xmen sync hack..
if (a < 0x26000200) {
DRC_SAVE_SR(sh2);
sh2_end_run(sh2, 32);
DRC_RESTORE_SR(sh2);
}
sh2_write8_sdram(a, d, sh2);
}
static void REGPARM(3) sh2_write8_sdram_wt(u32 a, u32 d, SH2 *sh2)
{
// xmen sync hack..
if ((a << 8) >> 17) // ((a & 0x00ffffff) < 0x200)
sh2_write8_sdram(a, d, sh2);
else
sh2_write8_sdram_sync(a, d, sh2);
}
// write16
static void REGPARM(3) sh2_write16_unmapped(u32 a, u32 d, SH2 *sh2)
{