Merge from libretro/master:46902e0 for repo synchronization

platform/libretro/3ds/3ds_utils.c

@@ -1,12 +1,31 @@
 
 #include "3ds_utils.h"
 
+#define GET_VERSION_MAJOR(version)    ((version) >>24)
+
 typedef int (*ctr_callback_type)(void);
 
 int srvGetServiceHandle(unsigned int* out, const char* name);
 int svcCloseHandle(unsigned int handle);
 int svcBackdoor(ctr_callback_type);
+int32_t svcGetSystemInfo(int64_t* out, uint32_t type, int32_t param);
+void ctr_clear_cache(void);
 
+static int has_rosalina;
+
+void check_rosalina(void) {
+  int64_t version;
+  uint32_t major;
+
+  has_rosalina = 0;
+
+  if (!svcGetSystemInfo(&version, 0x10000, 0)) {
+     major = GET_VERSION_MAJOR(version);
+
+     if (major >= 8)
+       has_rosalina = 1;
+  }
+}
 
 static void ctr_enable_all_svc_kernel(void)
 {
@@ -40,15 +59,23 @@ static void ctr_clean_invalidate_kernel(void)
 
 void ctr_flush_invalidate_cache(void)
 {
-//   __asm__ volatile("svc 0x2E\n\t");
-//   __asm__ volatile("svc 0x4B\n\t");
-   svcBackdoor((ctr_callback_type)ctr_clean_invalidate_kernel);
+  if (has_rosalina) {
+    ctr_clear_cache();
+   } else {
+    //   __asm__ volatile("svc 0x2E\n\t");
+    //   __asm__ volatile("svc 0x4B\n\t");
+    svcBackdoor((ctr_callback_type)ctr_clean_invalidate_kernel);
+   }
 }
 
 int ctr_svchack_init(void)
 {
+   extern unsigned int __ctr_svchax;
    extern unsigned int __service_ptr;
 
+   if(__ctr_svchax)
+      return 1; /* All services have already been enabled */
+
    if(__service_ptr)
       return 0;
 

platform/libretro/3ds/3ds_utils.h

@@ -4,6 +4,7 @@
 void ctr_flush_invalidate_cache(void);
 
 int ctr_svchack_init(void);
+void check_rosalina(void);
 
 #include <stdio.h>
 #define DEBUG_HOLD() do{printf("%s@%s:%d.\n",__FUNCTION__, __FILE__, __LINE__);fflush(stdout);wait_for_input();}while(0)

platform/libretro/3ds/utils.S

@@ -0,0 +1,25 @@
+  .text
+  .arm
+  .balign 4
+
+  .func ctr_clear_cache_kernel
+ctr_clear_cache_kernel:
+  cpsid aif
+  mov r0, #0
+  mcr p15, 0, r0, c7, c10, 0    @ Clean entire data cache
+  mcr p15, 0, r0, c7, c10, 5    @ Data Memory Barrier
+  mcr p15, 0, r0, c7, c5, 0     @ Invalidate entire instruction cache / Flush BTB
+  mcr p15, 0, r0, c7, c10, 4    @ Data Sync Barrier
+  bx lr
+  .endfunc
+
+  @@ Clear the entire data cache / invalidate the instruction cache. Uses
+  @@ Rosalina svcCustomBackdoor to avoid svcBackdoor stack corruption
+  @@ during interrupts.
+  .global ctr_clear_cache
+  .func ctr_clear_cache
+ctr_clear_cache:
+  ldr r0, =ctr_clear_cache_kernel
+  svc 0x80                      @ svcCustomBackdoor
+  bx lr
+  .endfunc