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https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 15:27:46 -04:00
32x: interpreter-wrap drc works (demos only). SVP drc refactoring.
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@812 be3aeb3a-fb24-0410-a615-afba39da0efa
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notaz
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98da48e418
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19 changed files with 1505 additions and 46 deletions
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@ -1,10 +1,398 @@
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#include "../sh2.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <assert.h>
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#include "sh2.h"
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#include "compiler.h"
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#include "../drc/cmn.h"
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#define BLOCK_CYCLE_LIMIT 100
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typedef enum {
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SHR_R0 = 0, SHR_R15 = 15,
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SHR_PC, SHR_PPC, SHR_PR, SHR_SR,
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SHR_GBR, SHR_VBR, SHR_MACH, SHR_MACL,
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} sh2_reg_e;
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typedef struct block_desc_ {
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u32 addr; // SH2 PC address
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void *tcache_ptr; // translated block for above PC
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struct block_desc_ *next; // next block with the same PC hash
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} block_desc;
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#define MAX_BLOCK_COUNT 1024
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static block_desc *block_table;
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static int block_count;
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#define MAX_HASH_ENTRIES 1024
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#define HASH_MASK (MAX_HASH_ENTRIES - 1)
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#ifdef DRC_DEBUG
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#include "mame/sh2dasm.h"
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#include <platform/linux/host_dasm.h>
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static void *tcache_dsm_ptr = tcache;
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#endif
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static void *tcache_ptr;
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#include "../drc/emit_x86.c"
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extern void sh2_drc_entry(SH2 *sh2, void *block);
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extern void sh2_drc_exit(void);
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// tmp
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extern void __attribute__((regparm(2))) sh2_do_op(SH2 *sh2, int opcode);
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static void *dr_find_block(block_desc *tab, u32 addr)
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{
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for (tab = tab->next; tab != NULL; tab = tab->next)
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if (tab->addr == addr)
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break;
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if (tab != NULL)
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return tab->tcache_ptr;
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printf("block miss for %08x\n", addr);
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return NULL;
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}
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static block_desc *dr_add_block(u32 addr, void *tcache_ptr)
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{
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block_desc *bd;
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if (block_count == MAX_BLOCK_COUNT) {
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// FIXME: flush cache instead
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printf("block descriptor overflow\n");
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exit(1);
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}
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bd = &block_table[block_count];
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bd->addr = addr;
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bd->tcache_ptr = tcache_ptr;
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block_count++;
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return bd;
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}
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#define HASH_FUNC(hash_tab, addr) \
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((block_desc **)(hash_tab))[(addr) & HASH_MASK]
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// ---------------------------------------------------------------
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static void emit_move_r_imm32(sh2_reg_e dst, u32 imm)
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{
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int host_dst = reg_map_g2h[dst];
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int tmp = 0;
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if (host_dst != -1)
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tmp = host_dst;
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emith_move_r_imm(tmp, imm);
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if (host_dst == -1)
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emith_ctx_write(tmp, dst * 4);
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}
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static void emit_move_r_r(sh2_reg_e dst, sh2_reg_e src)
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{
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int host_dst = reg_map_g2h[dst], host_src = reg_map_g2h[src];
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int tmp = 0;
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if (host_dst != -1 && host_src != -1) {
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emith_move_r_r(host_dst, host_src);
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return;
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}
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if (host_src != -1)
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tmp = host_src;
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if (host_dst != -1)
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tmp = host_dst;
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if (host_src == -1)
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emith_ctx_read(tmp, src * 4);
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if (host_dst == -1)
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emith_ctx_write(tmp, dst * 4);
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}
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static void emit_braf(sh2_reg_e reg, u32 pc)
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{
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int host_reg = reg_map_g2h[reg];
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if (host_reg == -1) {
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emith_ctx_read(0, reg * 4);
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} else
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emith_move_r_r(0, host_reg);
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emith_add_r_imm(0, pc);
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emith_ctx_write(0, SHR_PC * 4);
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}
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// FIXME: this is broken, delayed insn shouldn't affect branch
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#define DELAYED_OP \
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if (delayed_op < 0) { \
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delayed_op = op; \
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goto next_op; \
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} \
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delayed_op = -1; \
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pc -= 2 /* adjust back */
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/*
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static int sh2_translate_op4(int op)
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{
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switch (op & 0x000f)
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{
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case 0x0b:
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default:
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emith_pass_arg(2, sh2, op);
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emith_call(sh2_do_op);
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break;
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}
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return 0;
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}
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*/
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static void *sh2_translate(SH2 *sh2, block_desc *other_block)
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{
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void *block_entry = tcache_ptr;
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block_desc *this_block;
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unsigned int pc = sh2->pc;
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int op, delayed_op = -1;
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int cycles = 0;
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u32 tmp;
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this_block = dr_add_block(pc, block_entry);
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if (other_block != NULL) {
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printf("hash collision between %08x and %08x\n", pc, other_block->addr);
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this_block->next = other_block;
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}
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HASH_FUNC(sh2->pc_hashtab, pc) = this_block;
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#ifdef DRC_DEBUG
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printf("== %csh2 block #%d %08x %p\n", sh2->is_slave ? 's' : 'm',
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block_count, pc, block_entry);
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#endif
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while (cycles < BLOCK_CYCLE_LIMIT)
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{
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if (delayed_op >= 0)
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op = delayed_op;
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else {
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next_op:
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op = p32x_sh2_read16(pc, sh2->is_slave);
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#ifdef DRC_DEBUG
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{
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char buff[64];
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DasmSH2(buff, pc, op);
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printf("%08x %04x %s\n", pc, op, buff);
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}
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#endif
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}
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pc += 2;
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cycles++;
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switch ((op >> 12) & 0x0f)
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{
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case 0x00:
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// RTS 0000000000001011
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if (op == 0x000b) {
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DELAYED_OP;
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emit_move_r_r(SHR_PC, SHR_PR);
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cycles++;
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goto end_block;
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}
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// RTE 0000000000101011
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if (op == 0x002b) {
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DELAYED_OP;
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cycles++;
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//emit_move_r_r(SHR_PC, SHR_PR);
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emit_move_r_imm32(SHR_PC, pc - 4);
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emith_pass_arg(2, sh2, op);
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emith_call(sh2_do_op);
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goto end_block;
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}
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// BRAF Rm 0000mmmm00100011
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if (op == 0x0023) {
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DELAYED_OP;
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cycles++;
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emit_braf((op >> 8) & 0x0f, pc);
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goto end_block;
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}
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// BSRF Rm 0000mmmm00000011
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if (op == 0x0003) {
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DELAYED_OP;
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emit_move_r_imm32(SHR_PR, pc);
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emit_braf((op >> 8) & 0x0f, pc);
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cycles++;
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goto end_block;
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}
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goto default_;
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case 0x04:
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// JMP @Rm 0100mmmm00101011
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if ((op & 0xff) == 0x2b) {
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DELAYED_OP;
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emit_move_r_r(SHR_PC, (op >> 8) & 0x0f);
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cycles++;
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goto end_block;
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}
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// JSR @Rm 0100mmmm00001011
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if ((op & 0xff) == 0x0b) {
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DELAYED_OP;
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emit_move_r_imm32(SHR_PR, pc);
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emit_move_r_r(SHR_PC, (op >> 8) & 0x0f);
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cycles++;
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goto end_block;
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}
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goto default_;
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case 0x08: {
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int adj = 2;
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switch (op & 0x0f00) {
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// BT/S label 10001101dddddddd
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case 0x0d00:
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// BF/S label 10001111dddddddd
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case 0x0f00:
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DELAYED_OP;
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cycles--;
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adj = 0;
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// fallthrough
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// BT label 10001001dddddddd
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case 0x0900:
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// BF label 10001011dddddddd
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case 0x0b00:
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cycles += 2;
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emit_move_r_imm32(SHR_PC, pc);
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emith_test_t();
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tmp = ((signed int)(op << 24) >> 23);
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EMIT_CONDITIONAL(emit_move_r_imm32(SHR_PC, pc + tmp + adj), (op & 0x0200) ? 1 : 0);
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goto end_block;
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}
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goto default_;
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}
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case 0x0a:
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// BRA label 1010dddddddddddd
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DELAYED_OP;
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do_bra:
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tmp = ((signed int)(op << 20) >> 19);
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emit_move_r_imm32(SHR_PC, pc + tmp);
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cycles++;
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goto end_block;
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case 0x0b:
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// BSR label 1011dddddddddddd
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DELAYED_OP;
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emit_move_r_imm32(SHR_PR, pc);
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goto do_bra;
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default:
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default_:
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emit_move_r_imm32(SHR_PC, pc - 2);
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emith_pass_arg(2, sh2, op);
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emith_call(sh2_do_op);
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break;
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}
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#ifdef DRC_DEBUG
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host_dasm(tcache_dsm_ptr, (char *)tcache_ptr - (char *)tcache_dsm_ptr);
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tcache_dsm_ptr = tcache_ptr;
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#endif
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}
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end_block:
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if ((char *)tcache_ptr - (char *)tcache > DRC_TCACHE_SIZE) {
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printf("tcache overflow!\n");
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fflush(stdout);
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exit(1);
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}
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if (reg_map_g2h[SHR_SR] == -1) {
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emith_ctx_sub(cycles << 12, SHR_SR * 4);
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} else
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emith_sub_r_imm(reg_map_g2h[SHR_SR], cycles << 12);
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emith_jump(sh2_drc_exit);
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#ifdef DRC_DEBUG
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host_dasm(tcache_dsm_ptr, (char *)tcache_ptr - (char *)tcache_dsm_ptr);
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tcache_dsm_ptr = tcache_ptr;
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#endif
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return block_entry;
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unimplemented:
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// last op
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#ifdef DRC_DEBUG
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host_dasm(tcache_dsm_ptr, (char *)tcache_ptr - (char *)tcache_dsm_ptr);
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tcache_dsm_ptr = tcache_ptr;
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#endif
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exit(1);
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}
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void __attribute__((noinline)) sh2_drc_dispatcher(SH2 *sh2)
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{
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while (((signed int)sh2->sr >> 12) > 0)
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{
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block_desc *bd = HASH_FUNC(sh2->pc_hashtab, sh2->pc);
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void *block = NULL;
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if (bd != NULL) {
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if (bd->addr == sh2->pc)
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block = bd->tcache_ptr;
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else
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block = dr_find_block(bd, sh2->pc);
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}
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if (block == NULL)
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block = sh2_translate(sh2, bd);
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#ifdef DRC_DEBUG
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printf("= %csh2 enter %08x %p\n", sh2->is_slave ? 's' : 'm', sh2->pc, block);
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#endif
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sh2_drc_entry(sh2, block);
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}
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}
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void sh2_execute(SH2 *sh2, int cycles)
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{
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unsigned int pc = sh2->pc;
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int op;
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sh2->cycles_aim += cycles;
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cycles = sh2->cycles_aim - sh2->cycles_done;
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op = p32x_sh2_read16(pc);
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// cycles are kept in SHR_SR unused bits (upper 20)
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sh2->sr &= 0x3f3;
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sh2->sr |= cycles << 12;
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sh2_drc_dispatcher(sh2);
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sh2->cycles_done += cycles - ((signed int)sh2->sr >> 12);
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}
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static int cmn_init_done;
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static int common_init(void)
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{
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block_count = 0;
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block_table = calloc(MAX_BLOCK_COUNT, sizeof(*block_table));
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if (block_table == NULL)
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return -1;
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tcache_ptr = tcache;
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cmn_init_done = 1;
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return 0;
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}
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int sh2_drc_init(SH2 *sh2)
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{
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if (!cmn_init_done) {
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int ret = common_init();
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if (ret)
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return ret;
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}
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assert(sh2->pc_hashtab == NULL);
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sh2->pc_hashtab = calloc(sizeof(sh2->pc_hashtab[0]), MAX_HASH_ENTRIES);
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if (sh2->pc_hashtab == NULL)
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return -1;
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return 0;
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}
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