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fix yet another sync issue..

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This commit is contained in:
notaz 2013-10-09 02:26:52 +03:00
parent 7b3ddc11dc
commit 6901d0e45d
3 changed files with 54 additions and 16 deletions
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35
pico/cd/mcd.c
View file

@ -90,7 +90,32 @@ PICO_INTERNAL int PicoResetMCD(void)
return 0;
}
static __inline void SekRunS68k(unsigned int to)
static void SekRunM68kOnce(void)
{
int cyc_do;
pevt_log_m68k_o(EVT_RUN_START);
if ((cyc_do = SekCycleAim - SekCycleCnt) > 0) {
SekCycleCnt += cyc_do;
#if defined(EMU_C68K)
PicoCpuCM68k.cycles = cyc_do;
CycloneRun(&PicoCpuCM68k);
SekCycleCnt -= PicoCpuCM68k.cycles;
#elif defined(EMU_M68K)
SekCycleCnt += m68k_execute(cyc_do) - cyc_do;
#elif defined(EMU_F68K)
SekCycleCnt += fm68k_emulate(cyc_do, 0) - cyc_do;
#endif
}
SekCyclesLeft = 0;
SekTrace(0);
pevt_log_m68k_o(EVT_RUN_END);
}
static void SekRunS68k(unsigned int to)
{
int cyc_do;
@ -305,7 +330,13 @@ void pcd_run_cpus_normal(int m68k_cycles)
SekCycleCnt = SekCycleAim - (s68k_left * 40220 >> 16);
}
SekSyncM68k();
while (CYCLES_GT(SekCycleAim, SekCycleCnt)) {
SekRunM68kOnce();
if (Pico_mcd->m.need_sync) {
Pico_mcd->m.need_sync = 0;
pcd_sync_s68k(SekCycleCnt, 0);
}
}
}
void pcd_run_cpus_lockstep(int m68k_cycles)

6
pico/cd/memory.c
View file

@ -67,6 +67,12 @@ static void remap_word_ram(u32 r3);
void m68k_comm_check(u32 a)
{
pcd_sync_s68k(SekCyclesDone(), 0);
if (a >= 0x0e && !Pico_mcd->m.need_sync) {
// there are cases when slave updates comm and only switches RAM
// over after that (mcd1b), so there must be a resync..
SekEndRun(64);
Pico_mcd->m.need_sync = 1;
}
if (SekNotPolling || a != Pico_mcd->m.m68k_poll_a) {
Pico_mcd->m.m68k_poll_a = a;
Pico_mcd->m.m68k_poll_cnt = 0;

3
pico/pico_int.h
View file

@ -408,7 +408,8 @@ struct mcd_misc
unsigned int s68k_poll_clk;
unsigned char bcram_reg; // 18: battery-backed RAM cart register
unsigned char dmna_ret_2m;
unsigned short pad3;
unsigned char need_sync;
unsigned char pad3;
int pad4[9];
};