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https://github.com/RaySollium99/picodrive.git
synced 2025-09-05 07:17:45 -04:00
ssp cleanup
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@353 be3aeb3a-fb24-0410-a615-afba39da0efa
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notaz
parent
945c2fdcfd
commit
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1 changed files with 50 additions and 47 deletions
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@ -207,7 +207,7 @@
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#define rXST ssp->gr[SSP_XST].h
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#define rPM4 ssp->gr[SSP_PM4].h // 12
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// 13
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#define rPMC ssp->gr[SSP_PMC] // will keep addr in .h, mode in .l
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#define rPMC ssp->gr[SSP_PMC] // will keep addr in .l, mode in .h
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#define rAL ssp->gr[SSP_A].l
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#define rA32 ssp->gr[SSP_A].v
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@ -215,9 +215,11 @@
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#define IJind (((op>>6)&4)|(op&3))
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#ifndef EMBED_INTERPRETER
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#define GET_PC() (PC - (unsigned short *)svp->iram_rom)
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#define GET_PPC_OFFS() ((unsigned int)PC - (unsigned int)svp->iram_rom - 2)
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#define SET_PC(d) PC = (unsigned short *)svp->iram_rom + d
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#endif
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#define REG_READ(r) (((r) <= 4) ? ssp->gr[r].h : read_handlers[r]())
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#define REG_WRITE(r,d) { \
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@ -326,7 +328,7 @@
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#define OP_CHECK32(OP) \
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if ((op & 0x0f) == SSP_P) { /* A <- P */ \
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read_P(); /* update P */ \
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OP(ssp->gr[SSP_P].v); \
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OP(rP.v); \
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break; \
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}
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@ -411,7 +413,7 @@ static int get_inc(int mode)
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int inc = (mode >> 11) & 7;
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if (inc != 0) {
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if (inc != 7) inc--;
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inc = (1<<16) << inc; // 0 1 2 4 8 16 32 128
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inc = 1 << inc; // 0 1 2 4 8 16 32 128
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if (mode & 0x8000) inc = -inc; // decrement mode
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}
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return inc;
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@ -439,7 +441,7 @@ static u32 pm_io(int reg, int write, u32 d)
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elprintf(EL_SVP, "PM%i (%c) set to %08x @ %04x", reg, write ? 'w' : 'r', rPMC.v, GET_PPC_OFFS());
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ssp->pmac_read[write ? reg + 6 : reg] = rPMC.v;
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ssp->emu_status &= ~SSP_PMC_SET;
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if ((rPMC.v & 0x7f) == 0x1c && (rPMC.v & 0x7fff0000) == 0) {
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if ((rPMC.h & 0x7f) == 0x1c && (rPMC.l & 0x7fff) == 0) {
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elprintf(EL_SVP, "ssp IRAM copy from %06x", (ssp->RAM1[0]-1)<<1);
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#ifdef USE_DEBUGGER
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last_iram = (ssp->RAM1[0]-1)<<1;
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@ -461,15 +463,15 @@ static u32 pm_io(int reg, int write, u32 d)
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unsigned short *dram = (unsigned short *)svp->dram;
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if (write)
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{
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int mode = ssp->pmac_write[reg]&0xffff;
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int addr = ssp->pmac_write[reg]>>16;
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int mode = ssp->pmac_write[reg]>>16;
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int addr = ssp->pmac_write[reg]&0xffff;
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if ((mode & 0xb800) == 0xb800)
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elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: mode %04x", mode);
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if ((mode & 0x43ff) == 0x0018) // DRAM
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{
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int inc = get_inc(mode);
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elprintf(EL_SVP, "ssp PM%i DRAM w [%06x] %04x (inc %i, ovrw %i)",
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reg, CADDR, d, inc >> 16, (mode>>10)&1);
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reg, CADDR, d, inc, (mode>>10)&1);
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if (mode & 0x0400) {
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overwite_write(dram[addr], d);
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} else dram[addr] = d;
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@ -482,14 +484,14 @@ static u32 pm_io(int reg, int write, u32 d)
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if (mode & 0x0400) {
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overwite_write(dram[addr], d);
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} else dram[addr] = d;
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ssp->pmac_write[reg] += (addr&1) ? (31<<16) : (1<<16);
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ssp->pmac_write[reg] += (addr&1) ? 31 : 1;
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}
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else if ((mode & 0x47ff) == 0x001c) // IRAM
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{
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int inc = get_inc(mode);
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if ((addr&0xfc00) != 0x8000)
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elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: invalid IRAM addr: %04x", addr<<1);
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elprintf(EL_SVP, "ssp IRAM w [%06x] %04x (inc %i)", (addr<<1)&0x7ff, d, inc >> 16);
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elprintf(EL_SVP, "ssp IRAM w [%06x] %04x (inc %i)", (addr<<1)&0x7ff, d, inc);
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((unsigned short *)svp->iram_rom)[addr&0x3ff] = d;
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ssp->pmac_write[reg] += inc;
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}
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@ -501,21 +503,19 @@ static u32 pm_io(int reg, int write, u32 d)
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}
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else
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{
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int mode = ssp->pmac_read[reg]&0xffff;
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int addr = ssp->pmac_read[reg]>>16;
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int mode = ssp->pmac_read[reg]>>16;
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int addr = ssp->pmac_read[reg]&0xffff;
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if ((mode & 0xfff0) == 0x0800) // ROM, inc 1, verified to be correct
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{
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elprintf(EL_SVP, "ssp ROM r [%06x] %04x", CADDR,
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((unsigned short *)Pico.rom)[addr|((mode&0xf)<<16)]);
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if ((signed int)ssp->pmac_read[reg] >> 16 == -1)
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ssp->pmac_read[reg]++;
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ssp->pmac_read[reg] += 1<<16;
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ssp->pmac_read[reg] += 1;
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d = ((unsigned short *)Pico.rom)[addr|((mode&0xf)<<16)];
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}
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else if ((mode & 0x47ff) == 0x0018) // DRAM
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{
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int inc = get_inc(mode);
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elprintf(EL_SVP, "ssp PM%i DRAM r [%06x] %04x (inc %i)", reg, CADDR, dram[addr], inc >> 16);
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elprintf(EL_SVP, "ssp PM%i DRAM r [%06x] %04x (inc %i)", reg, CADDR, dram[addr]);
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d = dram[addr];
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ssp->pmac_read[reg] += inc;
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}
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@ -646,17 +646,17 @@ static void write_PM4(u32 d)
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// 14
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static u32 read_PMC(void)
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{
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elprintf(EL_SVP, "PMC r a %04x (st %c) @ %04x", rPMC.h,
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elprintf(EL_SVP, "PMC r a %04x (st %c) @ %04x", rPMC.l,
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(ssp->emu_status & SSP_PMC_HAVE_ADDR) ? 'm' : 'a', GET_PPC_OFFS());
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if (ssp->emu_status & SSP_PMC_HAVE_ADDR) {
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//if (ssp->emu_status & SSP_PMC_SET)
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// elprintf(EL_ANOMALY|EL_SVP, "prev PMC not used @ %04x", GET_PPC_OFFS());
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ssp->emu_status |= SSP_PMC_SET;
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ssp->emu_status &= ~SSP_PMC_HAVE_ADDR;
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return ((rPMC.h << 4) & 0xfff0) | ((rPMC.h >> 4) & 0xf);
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return ((rPMC.l << 4) & 0xfff0) | ((rPMC.l >> 4) & 0xf);
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} else {
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ssp->emu_status |= SSP_PMC_HAVE_ADDR;
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return rPMC.h;
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return rPMC.l;
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}
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}
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@ -667,12 +667,12 @@ static void write_PMC(u32 d)
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// elprintf(EL_ANOMALY|EL_SVP, "prev PMC not used @ %04x", GET_PPC_OFFS());
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ssp->emu_status |= SSP_PMC_SET;
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ssp->emu_status &= ~SSP_PMC_HAVE_ADDR;
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rPMC.l = d;
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elprintf(EL_SVP, "PMC w m %04x @ %04x", rPMC.l, GET_PPC_OFFS());
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rPMC.h = d;
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elprintf(EL_SVP, "PMC w m %04x @ %04x", rPMC.h, GET_PPC_OFFS());
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} else {
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ssp->emu_status |= SSP_PMC_HAVE_ADDR;
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rPMC.h = d;
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elprintf(EL_SVP, "PMC w a %04x @ %04x", rPMC.h, GET_PPC_OFFS());
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rPMC.l = d;
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elprintf(EL_SVP, "PMC w a %04x @ %04x", rPMC.l, GET_PPC_OFFS());
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}
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}
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@ -875,24 +875,13 @@ static u32 ptr2_read(int op)
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// -----------------------------------------------------
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void ssp1601_reset(ssp1601_t *l_ssp)
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{
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ssp = l_ssp;
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ssp->emu_status = 0;
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ssp->gr[SSP_GR0].v = 0xffff0000;
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rPC = 0x400;
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rSTACK = 0; // ? using ascending stack
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rST = 0;
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}
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#ifdef USE_DEBUGGER
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static void debug_dump(void)
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{
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printf("GR0: %04x X: %04x Y: %04x A: %08x\n", ssp->gr[SSP_GR0].h, rX, rY, ssp->gr[SSP_A].v);
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printf("PC: %04x (%04x) P: %08x\n", GET_PC(), GET_PC() << 1, ssp->gr[SSP_P].v);
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printf("PC: %04x (%04x) P: %08x\n", GET_PC(), GET_PC() << 1, rP.v);
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printf("PM0: %04x PM1: %04x PM2: %04x\n", rPM0, rPM1, rPM2);
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printf("XST: %04x PM4: %04x PMC: %08x\n", rXST, rPM4, ssp->gr[SSP_PMC].v);
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printf("XST: %04x PM4: %04x PMC: %08x\n", rXST, rPM4, rPMC.v);
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printf(" ST: %04x %c%c%c%c, GP0_0 %i, GP0_1 %i\n", rST, rST&SSP_FLAG_N?'N':'n', rST&SSP_FLAG_V?'V':'v',
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rST&SSP_FLAG_Z?'Z':'z', rST&SSP_FLAG_L?'L':'l', (rST>>5)&1, (rST>>6)&1);
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printf("STACK: %i %04x %04x %04x %04x %04x %04x\n", rSTACK, ssp->stack[0], ssp->stack[1],
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@ -987,6 +976,23 @@ static void debug(unsigned int pc, unsigned int op)
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#endif // USE_DEBUGGER
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#ifdef EMBED_INTERPRETER
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static
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#endif
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void ssp1601_reset(ssp1601_t *l_ssp)
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{
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ssp = l_ssp;
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ssp->emu_status = 0;
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ssp->gr[SSP_GR0].v = 0xffff0000;
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rPC = 0x400;
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rSTACK = 0; // ? using ascending stack
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rST = 0;
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}
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#ifdef EMBED_INTERPRETER
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static
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#endif
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void ssp1601_run(int cycles)
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{
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SET_PC(rPC);
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@ -1009,7 +1015,7 @@ void ssp1601_run(int cycles)
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if (op == ((SSP_A<<4)|SSP_P)) { // A <- P
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// not sure. MAME claims that only hi word is transfered.
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read_P(); // update P
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rA32 = ssp->gr[SSP_P].v;
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rA32 = rP.v;
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}
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else
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{
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@ -1089,9 +1095,8 @@ void ssp1601_run(int cycles)
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// mpys?
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case 0x1b:
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if (!(op&0x100)) elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: no b bit @ %04x", GET_PPC_OFFS());
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read_P(); // update P
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rA32 -= ssp->gr[SSP_P].v; // maybe only upper word?
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rA32 -= rP.v; // maybe only upper word?
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UPD_ACC_ZN // there checking flags after this
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rX = ptr1_read_(op&3, 0, (op<<1)&0x18); // ri (maybe rj?)
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rY = ptr1_read_((op>>4)&3, 4, (op>>3)&0x18); // rj
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@ -1099,9 +1104,8 @@ void ssp1601_run(int cycles)
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// mpya (rj), (ri), b
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case 0x4b:
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if (!(op&0x100)) elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: no b bit @ %04x", GET_PPC_OFFS());
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read_P(); // update P
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rA32 += ssp->gr[SSP_P].v; // confirmed to be 32bit
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rA32 += rP.v; // confirmed to be 32bit
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UPD_ACC_ZN // ?
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rX = ptr1_read_(op&3, 0, (op<<1)&0x18); // ri (maybe rj?)
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rY = ptr1_read_((op>>4)&3, 4, (op>>3)&0x18); // rj
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@ -1109,7 +1113,6 @@ void ssp1601_run(int cycles)
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// mld (rj), (ri), b
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case 0x5b:
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if (!(op&0x100)) elprintf(EL_SVP|EL_ANOMALY, "ssp FIXME: no b bit @ %04x", GET_PPC_OFFS());
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rA32 = 0;
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rST &= 0x0fff; // ?
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rX = ptr1_read_(op&3, 0, (op<<1)&0x18); // ri (maybe rj?)
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@ -1166,13 +1169,13 @@ void ssp1601_run(int cycles)
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case 0x79: tmpv = rIJ[IJind]; OP_EORA(tmpv); break;
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// OP simm
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case 0x1c: OP_SUBA(op & 0xff); if (op&0x100) elprintf(EL_SVP|EL_ANOMALY, "FIXME: simm with upper bit set"); break;
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case 0x3c: OP_CMPA(op & 0xff); if (op&0x100) elprintf(EL_SVP|EL_ANOMALY, "FIXME: simm with upper bit set"); break;
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case 0x4c: OP_ADDA(op & 0xff); if (op&0x100) elprintf(EL_SVP|EL_ANOMALY, "FIXME: simm with upper bit set"); break;
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case 0x1c: OP_SUBA(op & 0xff); break;
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case 0x3c: OP_CMPA(op & 0xff); break;
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case 0x4c: OP_ADDA(op & 0xff); break;
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// MAME code only does LSB of top word, but this looks wrong to me.
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case 0x5c: OP_ANDA(op & 0xff); if (op&0x100) elprintf(EL_SVP|EL_ANOMALY, "FIXME: simm with upper bit set"); break;
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case 0x6c: OP_ORA (op & 0xff); if (op&0x100) elprintf(EL_SVP|EL_ANOMALY, "FIXME: simm with upper bit set"); break;
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case 0x7c: OP_EORA(op & 0xff); if (op&0x100) elprintf(EL_SVP|EL_ANOMALY, "FIXME: simm with upper bit set"); break;
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case 0x5c: OP_ANDA(op & 0xff); break;
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case 0x6c: OP_ORA (op & 0xff); break;
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case 0x7c: OP_EORA(op & 0xff); break;
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default:
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elprintf(EL_ANOMALY|EL_SVP, "ssp FIXME unhandled op %04x @ %04x", op, GET_PPC_OFFS());
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