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bugfixes for Cyclone r9 change

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git-svn-id: file:///home/notaz/opt/svn/PicoDrive@418 be3aeb3a-fb24-0410-a615-afba39da0efa
This commit is contained in:
notaz 2008-04-09 20:30:57 +00:00
parent 449ecf9257
commit 8527dc450a
3 changed files with 10 additions and 15 deletions
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8
cpu/Cyclone/OpBranch.cpp
View file

@ -47,7 +47,7 @@ static void PopSr(int high)
OpRegToFlags(high); OpRegToFlags(high);
} }
// Pop PC - assumes r11=Memory Base - trashes r0-r3 // Pop PC - trashes r0-r3
static void PopPc() static void PopPc()
{ {
ot(";@ Pop PC:\n"); ot(";@ Pop PC:\n");
@ -55,7 +55,8 @@ static void PopPc()
ot(" add r1,r0,#4 ;@ Postincrement A7\n"); ot(" add r1,r0,#4 ;@ Postincrement A7\n");
ot(" str r1,[r7,#0x3c] ;@ Save A7\n"); ot(" str r1,[r7,#0x3c] ;@ Save A7\n");
MemHandler(0,2); MemHandler(0,2);
ot(" add r0,r0,r11 ;@ Memory Base+PC\n"); ot(" ldr r1,[r7,#0x60] ;@ Get Memory base\n");
ot(" add r0,r0,r1 ;@ Memory Base+PC\n");
ot("\n"); ot("\n");
CheckPc(); CheckPc();
#if EMULATE_ADDRESS_ERRORS_JUMP #if EMULATE_ADDRESS_ERRORS_JUMP
@ -175,7 +176,6 @@ int Op4E70(int op)
case 3: // rte case 3: // rte
OpStart(op,0x10,0,0,1); Cycles=20; OpStart(op,0x10,0,0,1); Cycles=20;
PopSr(1); PopSr(1);
ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");
PopPc(); PopPc();
ot(" ldr r1,[r7,#0x44] ;@ reload SR high\n"); ot(" ldr r1,[r7,#0x44] ;@ reload SR high\n");
SuperChange(op,1); SuperChange(op,1);
@ -195,7 +195,6 @@ int Op4E70(int op)
case 5: // rts case 5: // rts
OpStart(op,0x10); Cycles=16; OpStart(op,0x10); Cycles=16;
ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");
PopPc(); PopPc();
#if EMULATE_ADDRESS_ERRORS_JUMP #if EMULATE_ADDRESS_ERRORS_JUMP
ot(" tst r4,#1 ;@ address error?\n"); ot(" tst r4,#1 ;@ address error?\n");
@ -217,7 +216,6 @@ int Op4E70(int op)
case 7: // rtr case 7: // rtr
OpStart(op,0x10); Cycles=20; OpStart(op,0x10); Cycles=20;
PopSr(0); PopSr(0);
ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");
PopPc(); PopPc();
#if EMULATE_ADDRESS_ERRORS_JUMP #if EMULATE_ADDRESS_ERRORS_JUMP
ot(" tst r4,#1 ;@ address error?\n"); ot(" tst r4,#1 ;@ address error?\n");

4
cpu/Cyclone/OpLogic.cpp
View file

@ -40,7 +40,7 @@ int OpBtstReg(int op)
EaCalcReadNoSE((type>0)?8:-1,0,tea,size,0x003f); EaCalcReadNoSE((type>0)?8:-1,0,tea,size,0x003f);
if (tea>=0x11) if (tea>=0x10)
ot(" and r11,r11,#7 ;@ mem - do mod 8\n"); // size always 0 ot(" and r11,r11,#7 ;@ mem - do mod 8\n"); // size always 0
else ot(" and r11,r11,#31 ;@ reg - do mod 32\n"); // size always 2 else ot(" and r11,r11,#31 ;@ reg - do mod 32\n"); // size always 2
ot("\n"); ot("\n");
@ -94,7 +94,7 @@ int OpBtstImm(int op)
EaCalcReadNoSE(-1,0,sea,0,0); EaCalcReadNoSE(-1,0,sea,0,0);
ot(" mov r11,#1\n"); ot(" mov r11,#1\n");
ot(" bic r10,r10,#0x40000000 ;@ Blank Z flag\n"); ot(" bic r10,r10,#0x40000000 ;@ Blank Z flag\n");
if (tea>=0x11) if (tea>=0x10)
ot(" and r0,r0,#7 ;@ mem - do mod 8\n"); // size always 0 ot(" and r0,r0,#7 ;@ mem - do mod 8\n"); // size always 0
else ot(" and r0,r0,#0x1F ;@ reg - do mod 32\n"); // size always 2 else ot(" and r0,r0,#0x1F ;@ reg - do mod 32\n"); // size always 2
ot(" mov r11,r11,lsl r0 ;@ Make bit mask\n"); ot(" mov r11,r11,lsl r0 ;@ Make bit mask\n");

13
cpu/Cyclone/OpMove.cpp
View file

@ -376,23 +376,20 @@ int OpMovem(int op)
OpStart(op,ea,0,1); OpStart(op,ea,0,1);
ot(" ldrh r11,[r4],#2 ;@ r11=register mask\n");
ot("\n");
ot(";@ Get the address into r6:\n");
EaCalc(6,0x003f,cea,size);
#if !MEMHANDLERS_NEED_PREV_PC #if !MEMHANDLERS_NEED_PREV_PC
// must save PC, need a spare register // must save PC, need a spare register
ot(" str r4,[r7,#0x40] ;@ Save PC\n"); ot(" str r4,[r7,#0x40] ;@ Save PC\n");
#endif #endif
#if !MEMHANDLERS_NEED_CYCLES
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");
#endif
ot(" ldrh r11,[r4],#2 ;@ r11=register mask\n");
ot(";@ r4=Register Index*4:\n"); ot(";@ r4=Register Index*4:\n");
if (decr) ot(" mov r4,#0x40 ;@ order reversed for -(An)\n"); if (decr) ot(" mov r4,#0x40 ;@ order reversed for -(An)\n");
else ot(" mov r4,#-4\n"); else ot(" mov r4,#-4\n");
ot("\n");
ot(";@ Get the address into r6:\n");
EaCalc(6,0x003f,cea,size);
ot("\n"); ot("\n");
ot(" tst r11,r11\n"); // sanity check ot(" tst r11,r11\n"); // sanity check
ot(" beq NoRegs%.4x\n",op); ot(" beq NoRegs%.4x\n",op);