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32x: drc: finish MAC, gen drc entry/exit (for statically alloced regs)
git-svn-id: file:///home/notaz/opt/svn/PicoDrive@837 be3aeb3a-fb24-0410-a615-afba39da0efa
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notaz
parent
20e0619b16
commit
8796b7ee88
7 changed files with 297 additions and 189 deletions
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@ -24,6 +24,7 @@
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#define A_R10M (1 << 10)
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#define A_R11M (1 << 11)
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#define A_R14M (1 << 14)
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#define A_R15M (1 << 15)
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#define A_COND_AL 0xe
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#define A_COND_EQ 0x0
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@ -81,6 +82,7 @@
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#define A_OP_TST 0x8
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#define A_OP_TEQ 0x9
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#define A_OP_CMP 0xa
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#define A_OP_CMN 0xa
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#define A_OP_ORR 0xc
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#define A_OP_MOV 0xd
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#define A_OP_BIC 0xe
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@ -180,8 +182,8 @@
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#define EOP_XXM(cond,p,u,s,w,l,rn,list) \
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EMIT(((cond)<<28) | (1<<27) | ((p)<<24) | ((u)<<23) | ((s)<<22) | ((w)<<21) | ((l)<<20) | ((rn)<<16) | (list))
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#define EOP_STMFD_ST(list) EOP_XXM(A_COND_AL,1,0,0,1,0,13,list)
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#define EOP_LDMFD_ST(list) EOP_XXM(A_COND_AL,0,1,0,1,1,13,list)
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#define EOP_STMFD(rb,list) EOP_XXM(A_COND_AL,1,0,0,1,0,rb,list)
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#define EOP_LDMFD(rb,list) EOP_XXM(A_COND_AL,0,1,0,1,1,rb,list)
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/* branches */
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#define EOP_C_BX(cond,rm) \
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@ -232,9 +234,13 @@ static void emith_op_imm2(int cond, int s, int op, int rd, int rn, unsigned int
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int ror2;
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u32 v;
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if (op == A_OP_MOV)
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if (op == A_OP_MOV) {
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rn = 0;
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else if (imm == 0)
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if (~imm < 0x100) {
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imm = ~imm;
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op = A_OP_MVN;
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}
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} else if (imm == 0)
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return;
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for (v = imm, ror2 = 0; v != 0 || op == A_OP_MOV; v >>= 8, ror2 -= 8/2) {
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@ -294,6 +300,22 @@ static int emith_xbranch(int cond, void *target, int is_call)
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return (u32 *)tcache_ptr - start_ptr;
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}
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#define JMP_POS(ptr) \
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ptr = tcache_ptr; \
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tcache_ptr += sizeof(u32)
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#define JMP_EMIT(cond, ptr) { \
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int val = (u32 *)tcache_ptr - (u32 *)(ptr) - 2; \
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EOP_C_B_PTR(ptr, cond, 0, val & 0xffffff); \
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}
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#define EMITH_JMP_START(cond) { \
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void *cond_ptr; \
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JMP_POS(cond_ptr)
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#define EMITH_JMP_END(cond) \
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JMP_EMIT(cond, cond_ptr); \
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}
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// fake "simple" or "short" jump - using cond insns instead
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#define EMITH_SJMP_START(cond) \
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@ -365,6 +387,9 @@ static int emith_xbranch(int cond, void *target, int is_call)
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#define emith_sbcf_r_r(d, s) \
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EOP_SBC_REG(A_COND_AL,1,d,d,s,A_AM1_LSL,0)
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#define emith_eorf_r_r(d, s) \
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EOP_EOR_REG(A_COND_AL,1,d,d,s,A_AM1_LSL,0)
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#define emith_move_r_imm(r, imm) \
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emith_op_imm(A_COND_AL, 0, A_OP_MOV, r, imm)
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@ -390,12 +415,21 @@ static int emith_xbranch(int cond, void *target, int is_call)
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#define emith_tst_r_imm(r, imm) \
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emith_top_imm(A_COND_AL, A_OP_TST, r, imm)
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#define emith_cmp_r_imm(r, imm) \
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emith_top_imm(A_COND_AL, A_OP_CMP, r, imm)
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#define emith_cmp_r_imm(r, imm) { \
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u32 op = A_OP_CMP, imm_ = imm; \
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if (~imm_ < 0x100) { \
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imm_ = ~imm_; \
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op = A_OP_CMN; \
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} \
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emith_top_imm(A_COND_AL, op, r, imm); \
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}
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#define emith_subf_r_imm(r, imm) \
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emith_op_imm(A_COND_AL, 1, A_OP_SUB, r, imm)
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#define emith_move_r_imm_c(cond, r, imm) \
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emith_op_imm(cond, 0, A_OP_MOV, r, imm)
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#define emith_add_r_imm_c(cond, r, imm) \
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emith_op_imm(cond, 0, A_OP_ADD, r, imm)
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@ -430,6 +464,9 @@ static int emith_xbranch(int cond, void *target, int is_call)
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#define emith_lsr(d, s, cnt) \
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EOP_MOV_REG(A_COND_AL,0,d,s,A_AM1_LSR,cnt)
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#define emith_asr(d, s, cnt) \
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EOP_MOV_REG(A_COND_AL,0,d,s,A_AM1_ASR,cnt)
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#define emith_ror(d, s, cnt) \
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EOP_MOV_REG(A_COND_AL,0,d,s,A_AM1_ROR,cnt)
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@ -484,9 +521,25 @@ static int emith_xbranch(int cond, void *target, int is_call)
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#define emith_ctx_read(r, offs) \
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EOP_LDR_IMM(r, CONTEXT_REG, offs)
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#define emith_ctx_read_multiple(r, offs, count, tmpr) do { \
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int v_, r_ = r, c_ = count; \
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for (v_ = 0; c_; c_--, r_++) \
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v_ |= 1 << r_; \
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EOP_ADD_IMM(tmpr,CONTEXT_REG,30/2,(offs)>>2); \
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EOP_LDMFD(tmpr,v_); \
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} while(0)
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#define emith_ctx_write(r, offs) \
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EOP_STR_IMM(r, CONTEXT_REG, offs)
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#define emith_ctx_write_multiple(r, offs, count, tmpr) do { \
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int v_, r_ = r, c_ = count; \
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for (v_ = 0; c_; c_--, r_++) \
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v_ |= 1 << r_; \
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EOP_ADD_IMM(tmpr,CONTEXT_REG,30/2,(offs)>>2); \
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EOP_STMFD(tmpr,v_); \
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} while(0)
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#define emith_clear_msb_c(cond, d, s, count) { \
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u32 t; \
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if ((count) <= 8) { \
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@ -513,15 +566,6 @@ static int emith_xbranch(int cond, void *target, int is_call)
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EOP_MOV_REG_ASR(d,d,32 - (bits)); \
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}
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#define JMP_POS(ptr) \
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ptr = tcache_ptr; \
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tcache_ptr += sizeof(u32)
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#define JMP_EMIT(cond, ptr) { \
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int val = (u32 *)tcache_ptr - (u32 *)(ptr) - 2; \
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EOP_C_B_PTR(ptr, cond, 0, val & 0xffffff); \
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}
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// _r_r
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// put bit0 of r0 to carry
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#define emith_set_carry(r0) \
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@ -557,7 +601,16 @@ static int emith_xbranch(int cond, void *target, int is_call)
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#define emith_jump(target) \
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emith_jump_cond(A_COND_AL, target)
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#define emith_jump_reg(r) \
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EOP_BX(r)
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/* SH2 drc specific */
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#define emith_sh2_drc_entry() \
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EOP_STMFD(13,A_R7M|A_R14M)
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#define emith_sh2_drc_exit() \
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EOP_LDMFD(13,A_R7M|A_R15M)
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#define emith_sh2_test_t() { \
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int r = rcache_get_reg(SHR_SR, RC_GR_READ); \
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EOP_TST_IMM(r, 0, 1); \
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@ -202,6 +202,11 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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emith_arith_r_imm(4, r, ~(imm))
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// fake conditionals (using SJMP instead)
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#define emith_move_r_imm_c(cond, r, imm) { \
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(void)(cond); \
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emith_move_r_imm(r, imm); \
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}
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#define emith_add_r_imm_c(cond, r, imm) { \
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(void)(cond); \
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emith_add_r_imm(r, imm); \
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@ -365,6 +370,7 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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#define emith_subf_r_r emith_sub_r_r
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#define emith_adcf_r_r emith_adc_r_r
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#define emith_sbcf_r_r emith_sbc_r_r
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#define emith_eorf_r_r emith_eor_r_r
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#define emith_negcf_r_r emith_negc_r_r
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#define emith_lslf emith_lsl
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@ -376,15 +382,27 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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#define emith_rorcf emith_rorc
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// XXX: offs is 8bit only
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#define emith_ctx_read(r, offs) { \
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#define emith_ctx_read(r, offs) do { \
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EMIT_OP_MODRM(0x8b, 1, r, xBP); \
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EMIT(offs, u8); /* mov tmp, [ebp+#offs] */ \
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}
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} while (0)
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#define emith_ctx_write(r, offs) { \
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#define emith_ctx_read_multiple(r, offs, cnt, tmpr) do { \
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int r_ = r, offs_ = offs, cnt_ = cnt; \
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for (; cnt > 0; r_++, offs_ += 4, cnt_--) \
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emith_ctx_read(r_, offs_); \
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} while (0)
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#define emith_ctx_write(r, offs) do { \
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EMIT_OP_MODRM(0x89, 1, r, xBP); \
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EMIT(offs, u8); /* mov [ebp+#offs], tmp */ \
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}
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} while (0)
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#define emith_ctx_write_multiple(r, offs, cnt, tmpr) do { \
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int r_ = r, offs_ = offs, cnt_ = cnt; \
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for (; cnt > 0; r_++, offs_ += 4, cnt_--) \
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emith_ctx_write(r_, offs_); \
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} while (0)
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#define emith_jump(ptr) { \
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u32 disp = (u32)ptr - ((u32)tcache_ptr + 5); \
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@ -401,15 +419,21 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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#define emith_call_cond(cond, ptr) \
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emith_call(ptr)
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// "simple" or "short" jump
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#define EMITH_SJMP_START(cond) { \
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#define emith_jump_reg(r) \
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EMIT_OP_MODRM(0xff, 3, 4, r)
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#define EMITH_JMP_START(cond) { \
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u8 *cond_ptr; \
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JMP8_POS(cond_ptr)
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#define EMITH_SJMP_END(cond) \
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#define EMITH_JMP_END(cond) \
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JMP8_EMIT(cond, cond_ptr); \
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}
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// "simple" jump (no more then a few insns)
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#define EMITH_SJMP_START EMITH_JMP_START
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#define EMITH_SJMP_END EMITH_JMP_END
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#define host_arg2reg(rd, arg) \
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switch (arg) { \
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case 0: rd = xAX; break; \
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@ -430,6 +454,17 @@ enum { xAX = 0, xCX, xDX, xBX, xSP, xBP, xSI, xDI };
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}
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/* SH2 drc specific */
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#define emith_sh2_drc_entry() { \
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emith_push(xBX); \
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emith_push(xBP); \
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}
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#define emith_sh2_drc_exit() { \
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emith_pop(xBP); \
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emith_pop(xBX); \
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EMIT_OP(0xc3); /* ret */\
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}
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#define emith_sh2_test_t() { \
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int t = rcache_get_reg(SHR_SR, RC_GR_READ); \
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EMIT_OP_MODRM(0xf6, 3, 0, t); \
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